Agilent HDJD-S722-QR999
Color Sensor
Data Sheet
Description
Agilent color sensor is a high
performance, small in size, cost
effective light to voltage
converting sensor. The sensor
combines a photodiode array
and three trans-impedance
amplifiers in a single monolithic
CMOS IC solution. With a Red
(R), Green (G) and Blue (B)
color filters coated over the
photodiode array, the sensor
converts R, G, B light to analog
voltage outputs, denoted by
VROUT, VGOUT and VBOUT,
respectively. The sensor is
packaged in a 5x5x1 (mm)
surface mount QFN-16 package.
Applications
Agilent color sensor is ideal for
open-loop color identification
and closed-loop color point
control. The sensor is designed
for low illuminance applications
including color detection,
environmental lighting,
industrial process, etc. With
R, G, B photo-sensor and
amplifier integrated in a single
5x5x1 (mm) package, Agilent
color sensor provides a high
performance, small in size and
cost effective solution to color
sensing.
Features
• Convert light to R, G, B voltage
output
• Monolithic CMOS IC solution with
integrated R, G, B color filter,
photodiode array, transimpedance amplifier in one chip
• 3 sets of 3x3 photodiode array
design minimize the effect of
contamination and optical
aperture misalignment
• Small in size 5x 5x1 mm
• Independent gain selection options
for each R, G, B channel
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
Package Dimension
5
6
7
8
4
9
3
10
2
11
1
12
16
15
14
13
BOTTOM VIEW
16L QFN 5X5
(0.8)
(0.3)
5.0 ± 0.15
(3.2)
(3.2)
5.0 ± 0.15
1.0 ± 0.15
NOTE: DIMENSIONS ARE IN MILLIMETERS (mm)
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
2
Part Numbering System
HDJD-S 7 X X-X X X X X
Gain Selection (GS) Option
999: GS 00,01 or 10
Packaging Type
R: Tape and Reel
Product Packaging
Q: QFN
Product ID
22: Component without IR Filter
Pin Out for HDJD-S722-QR999
Pin
Pin Name
Normal Operation
Pin 1
VBOUT
Analog output voltage for BLUE
Pin 2
VGOUT
Analog output voltage for GREEN
Pin 3
VROUT
Analog output voltage for RED
Pin 4
VDD
5 V DC Supply
Pin 5
GND
Ground
Pin 6
GSGRN1
Gain Selection Green bit 1
Pin 7
GND
Ground
Pin 8
GSRED1
Gain Selection Red bit 1
Pin 9
GSRED0
Gain Selection Red bit 0
Pin 10
NC
No connection
Pin 11
NC
No connection
Pin 12
GSBLUE0
Gain Selection Blue bit 0
Pin 13
GSBLUE1
Gain Selection Blue bit 1
Pin 14
GND
Ground
Pin 15
GSGRN0
Gain Selection Green bit 0
Pin 16
GND
Ground
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
3
Theory of Operation
The integral R, G, B color filters
on the photodiode array detect
the R, G, B components of the
light falling on the sensor. The
photodiode converts the R, G, B
light components into
photocurrents. The integrated
transimpedence amplifiers for
R, G, B components then convert
the photocurrent to analog
voltage outputs. The voltage
output of each R, G, B channel
increases linearly with
increasing light intensity.
Sensor IC Block Diagram
GS (1:0)
RF
CF
VDD5
–
+
GND
VROUT
TRANSIMPEDANCE AMP
GS (1:0)
RF
CF
GSRED (1:0)
GSGRN (1:0)
RED GAIN
SELECTION
–
+
VGOUT
TRANSIMPEDANCE AMP
GREEN GAIN
SELECTION
GS (1:0)
RF
CF
GSBLUE (1:0)
BLUE GAIN
SELECTION
–
+
VBOUT
TRANSIMPEDANCE AMP
Absolute Maximum Ratings[1,2]
Parameter
Symbol
Min.
Max.
Unit
Supply Voltage
VDD
4.5
5.5
V
Storage Temperature
TS
-40
100
°C
Operating Temperature
TA
-40
85
°C
Human Body Model ESD Rating
ESDHBM
1
kV
Notes
Notes:
1. Subjecting the part to stresses beyond those listed under this section may cause permanent damage to the device. These are stress ratings only and
do not imply that the devices will function beyond these ratings. Exposure to the extremes of these conditions for extended periods may affect
device reliability.
2. Unless otherwise specified, voltages are referenced to ground.
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Units
Operating Temperature
TA
0
25
70
°C
Supply Voltage
VDD
4.5
5.0
5.5
V
Notes
A decoupling capacitor of 100 nF
between VDD and ground is recommended.
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
4
Operating Conditions and Electrical Requirements
Electrical Characteristics at VDD = 5 V, TA = 25°C, RL = 68 kΩ
Parameter
Symbol
Remark
Dark Voltage
VD
Ee = 0
Min.
Typ.
Max.
Unit
15
mV
Max. Output Voltage Swing
VOMAX
4.8
V
Supply Current
IDD
Ee = 0
2.5
mA
Output Rise Time
tr
Min Vo = 0 V, Peak Vo = 4.3 V
5
µs
Output Fall Time
tf
Min Vo = 0 V, Peak Vo = 4.3 V
5
µs
GS:10, lP = 460 nm[1]
(Blue Channel)
15
GS:10, lP = 542 nm[2]
(Green Channel)
19
GS:10, lP = 645 nm[3]
(Red Channel)
27
GS:01, lP = 460 nm[1]
(Blue Channel)
9
GS:01, lP = 542 nm[2]
(Green Channel)
11
GS:01, lP = 645 nm[3]
(Red Channel)
16
GS:00, lP = 460 nm[1]
(Blue Channel)
5
GS:00, lP = 542 nm[2]
(Green Channel)
6
GS:00, lP = 645 nm[3]
(Red Channel)
9
GS:10, lP = 460 nm[1]
(Blue Channel)
0.32
GS:10, lP = 542 nm[2]
(Green Channel)
0.25
GS:10, lP = 645 nm[3]
(Red Channel)
0.18
GS:01, lP = 460 nm[1]
(Blue Channel)
0.53
GS:01, lP = 542 nm[2]
(Green Channel)
0.44
GS:01, lP = 645 nm[3]
(Red Channel)
0.30
GS:00, lP = 460 nm[1]
(Blue Channel)
0.96
GS:00, lP = 542 nm[2]
(Green Channel)
0.80
GS:00, lP = 645 nm[3]
(Red Channel)
0.53
Irradiance
Responsivity
Irradiance
Responsivity
Irradiance
Responsivity
Saturation
Irradiance[4]
Saturation
Irradiance[4]
Saturation
Irradiance[4]
Re
Re
Re
V/(mW/cm2)
V/(mW/cm2)
V/(mW/cm2)
mW/cm2
mW/cm2
mW/cm2
Notes:
1.
2.
3.
4.
Test condition: using blue diffuse light of peak wavelength (lP) 460 nm and spectral half width (Dl1/2) 25 nm as light source.
Test condition: using green diffuse light of peak wavelength (lP) 542 nm and spectral half width (Dl1/2) 35 nm as light source.
Test condition: using red diffuse light of peak wavelength (lP) 645 nm and spectral half width (Dl1/2) 20 nm as light source.
Saturation irradiance = (Max. output voltage swing)/(Irradiance responsivity).
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
5
Gain Selection Feedback Resistor Table
GS: Bit 1
Bit 0
Feedback Resistor, RF
0
0
4 MΩ
0
1
7 MΩ
1
0
12 MΩ
Notes:
1. Gains selections, GS: Bit 1 Bit 0 are applicable for each Red, Green and Blue Channel.
2. Gain selections for each channel can be selected independently of each other.
3. Feedback resistor value is proportional to responsivity. Refer to block diagram below.
4. 0 indicates that the pin is connected to ground. 1 indicates no connection.
GS (1:0)
RF
CF
–
+
TRANSIMPEDANCE AMP
Typical Characteristics
1.2
NORMALIZED SENSITIVITY
1.0
RED
0.8
0.6
GREEN
0.4
BLUE
0.2
0
350
450
550
650
750
WAVELENGTH (nm)
Figure 1. Spectral responsivity.
Note:
Test condition is when Gain Selection Jumpers are set to
GSBLUE1=0
GSGRN1=0
GSRED1=0
GSBLUE0=1
GSGRN0=1
GSRED0=1
in which 0 = connect to Ground, 1 = no connection. Refer to Gain Selection Feedback Resistor Table.
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
6
4.8
4.4
0.025
4.0
VOLTAGE OUTPUT – VO (V)
VD – DARK VOLTAGE (V)
0.03
0.02
0.015
0.01
0.005
0
-40
-20
0
20
60
40
80
GS:10
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
4.8
4.4
GS:00
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
0.2
0.4
0.6
0.8
0.4
0.8
0.6
1.0
Figure 3. Voltage output of Blue Channel vs.
irradiance (lp = 460 nm).
VOLTAGE OUTPUT – VO (V)
VOLTAGE OUTPUT – VO (V)
4.0
3.6
0.2
IRRADIANCE – Ee (mW/cm2)
Figure 2. Dark voltage vs. operating
temperature.
GS:10 GS:01
GS:00
3.6
3.2
TA – OPERATING TEMPERATURE (°C)
4.8
4.4
GS:01
1.0
IRRADIANCE – Ee (mW/cm2)
Figure 4. Voltage output of Green Channel vs.
irradiance (lp = 542 nm).
GS:10
4.0
3.6
GS:01
GS:00
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
0.2
0.4
0.6
IRRADIANCE – Ee (mW/cm2)
Figure 5. Voltage output of Red Channel vs.
irradiance (lp = 645 nm).
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
7
Recommended Reflow Profile
It is recommended that Henkel
Pb- free solder paste LF310 be used
for soldering HDJD-S722-QR999.
Below is the recommended reflow
profile.
T-peak
T-reflow
230 ± 5°C/sec.
218°C/sec.
DELTA-FLUX = 2°C/sec. max.
TEMPERATURE
T-max.
T-min.
DELTA-COOLING = 2°C/sec. max.
160°C
120°C
DELTA-RAMP =
1°C/sec. max.
40-60 sec. max.
20-40 sec. max.
t-pre
t-peak
TIME
Figure 6. Recommended reflow soldering profile.
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
8
16 Lead QFN Recommended PCB Land Pad Design
IPC-SM-782 is used as the standard for the PCB land-pad design.
Recommended PCB finishing is OSP.
0.8 mm
0.4 mm
0.8 mm
3.19 mm
5.5 mm
3.19 mm
3.9 mm
5.5 mm
Figure 7.
16 Lead QFN Recommended Stencil Design
A stencil thickness of 2.18 mm (6 mils) for this QFN package is
recommended.
0.8 mm
Recommendations for Handling and
Storage of HDJD-S722-QR999
• Before opening the MBB
(Moisture Barrier Bag)
– The sensor component must
be kept sealed in a MBB
(Moisture Barrier Bag) stored
at 30°C and 70% RH or less at
all times.
• After opening the MBB
(Moisture Barrier Bag)
– The sensor component must
be kept at 30°C and 60% RH
or less.
– The sensor component should
have a MET (Manufacturing
Exposure Time) of 24 hours
starting from the time of
removal from the MBB to the
soldering oven.
– If unused sensor components
remain, it is recommended to
store them back in the MBB.
– If the indicator card has turned
from blue to pink or it has
exceeded the recommended
MET (Manufacturing
Exposure Time) of 24 hrs,
baking treatment should be
performed using the following
conditions before continuing
to IR reflow soldering.
– Baking treatment: 24 hours
at 125°C.
0.4 mm
0.8 mm
2.18 mm
Figure 8.
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
9
Package Tape and Reel Dimensions
Carrier Tape Dimensions
4.00 ± 0.10
SEE NOTE #2
∅1.55 ± 0.05
2.00 ± 0.05
SEE NOTE #2
B
R 0.50 TYP.
1.75 ± .10
5.50 ± 0.05
12.00 ± 0.10
Bo
A
Ko
A
8.00 ± 0.10
B
∅1.50 (MIN.)
SECTION B-B
Ao
Ao:
Bo:
Ko:
PITCH:
WIDTH:
0.30 ± 0.05
SECTION A-A
5.30
5.30
2.20
8.00
12.00
NOTES:
1. Ao AND Bo MEASURED AT 0.3 mm ABOVE BASE OF POCKET.
2. 10 PITCHES CUMULATIVE TOLERANCE IS ± 0.2 mm.
3. DIMENSIONS ARE IN MILLIMETERS (mm).
Reel Dimensions
65°
+1.5*
12.4 –0.0
45°
R10.65
R5.2
∅55.0 ± 0.5
45°
∅178.0 ± 0.5
∅176.0
EMBOSSED RIBS
RAISED: 0.25 mm
WIDTH: 1.25 mm
BACK VIEW
∅512
18.0 MAX.*
NOTES:
1. *MEASURED AT HUB AREA.
2. ALL FLANGE EDGES TO BE ROUNDED.
ESD WARNING: Standard CMOS handling precautions should be observed to avoid static discharge.
10
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March 29, 2005
5989-1984EN