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HSMP-3866-BLKG

HSMP-3866-BLKG

  • 厂商:

    AVAGO(博通)

  • 封装:

    SC74A

  • 描述:

    DIODE PIN ATTEN QUAD PI SOT-25

  • 数据手册
  • 价格&库存
HSMP-3866-BLKG 数据手册
HSMP-3866 Quad PIN Diode Pi Attenuator 300 kHz to 3 GHz in SOT 25 Package Data Sheet Description Features Avago Technology’s HSMP-3866 is a wideband, low insertion loss, low current, Quad PIN Diode Pi Attenuator in a low cost surface mount SOT-25 package. It provides a good match and flat attenuation over an extremely wide band from 300 kHz to 3 GHz. • 4 PIN Diodes in a SOT-25 package The SOT-25 packages gives a reduction in part count and takes up less space on board compared to multi package solutions. • MSL-1 and Lead-free Four PIN Diodes in one package encourages performance repeatability for improved production yield at board level. Package Marking and Pin connections 3 2 • 300 kHz to 3 GHz usable frequency band • Low Current • Low insertion Loss • Tape & Reel packaging option available Specification At 1 GHz, V+=1.2V • IIP3 = 30 dBm (Typical) • Attenuation = 36 dB (Typical) • Insertion Loss = -2.5 dB (Typical) • Return Loss = -18 dB (Typical) 1 Application Note: Package marking provides orientation and identification “BT”= Device Code “x” = Month code indicates the month of manufacture BTx 5 4 Pin 3 : RF In/Out Pin 4 : Shunt Bias Pin 2 : Series Bias Pin 1 : RF In/Out Pin 5 : Shunt Bias • Broadband system application (i.e., CATV, WCDMA, etc) • General purpose Voltage-Control-Attenuator for low current applications. Absolute Max Ratings [1], Tc = +25°C Symbol Parameter Unit Abs Max If Forward Current (1 µs Pulse) Amp 1 PIV Peak Inverse Voltage V 50 Tj Junction Temperature °C 150 Tstg Storage Temperature °C -65 to 150 qjb Thermal Resistance[2] °C/W 167 Notes : 1. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. Thermal Resistance is measured from junction to board using IR method. Electrical Specifications, Tc = +25°C (Each Diode) Test Condition Minimum Breakdown Voltage VBR (V) Typical Series Resistance RS (W) Typical Total Capacitance CT (pF) 50 3.0/1.5* 0.22 VR = VBR Measure IR ≤ 10 µA IF = 10 mA, f = 100 MHz IF = 100 mA* VR = 50 V f = 1 MHz Typical Performance, Tc = +25°C (Each Diode) Test Condition Total Resistance RT (W) Carrier Lifetime t(ns) Reverse Recovery Time Trr (ns) Total Capacitance CT (pF) 22 500 80 0.22 IF = 1 mA f = 1 MHz IF = 10mA IR = 250 mA VR = 50 V IF = 10 mA 90% Recovery VR = 50V f = 1MHz Typical Performance for HSMP-3866 Quad PIN Diode π Attenuator @ +25°C Parameter Test Condition Units Typical Insertion Loss Vc = 5V, V+ = 1.2V, Freq = 1 GHz dB -2.5 Return Loss Vc = 0V, V+ = 1.2V, Freq = 1 GHz dB -18 Attenuation Vc = 0V, V+ = 1.2V, Freq = 1 GHz dB 36 IP3 Vc = 1.5V, V+ = 1.2V, Freq = 1 GHz dBm 30 IP3 Vc = 5.0V, V+ = 1.2V, Freq = 1 GHz dBm 40 IP3 Vc = 1.5V, V+ = 1.2V, Freq = 300 MHz dBm 25 IP3 Vc = 5.0V, V+ = 1.2V, Freq = 300 MHz dBm 37 IP3 Vc = 1.5V, V+ = 1.2V, Freq = 100 MHz dBm 23 IP3 Vc = 5.0V, V+ = 1.2V, Freq = 100 MHz dBm 35 Notes : 1. Measurement above obtained using Wideband RF circuit design shown in Figure 1 & 2  C3 Vc R3 HSMP-3866 C1 C2 RFin RFout R1 R2 R4 R4 C5 C4 V+ Figure 2. Circuit Board Layout. Component Value R1, R2 620 W R3 390 W R4 2200 W C1 - C5 10 nF Figure 1. Wideband Quad PIN Diode π Attenuator Circuit Typical Performance Curves for Single Diode @ Tc = +25°C 100.00 TA = +85˚C TA = +25˚C TA = - 55˚C 100 Forward Current (mA) Resistance (OHMS) 1000 10 1 1.00 0.10 0.01 0.01 0.10 1.00 Forward Current (mA) Figure 3. RF Resistance vs. Forward Bias Current  10.00 10.00 100.00 +125˚C 0 0.2 +25˚C - 50˚C 0.4 0.6 0.8 Forward Voltage (V) Figure 4. Forward Current vs. Forward Voltage 1 1.2 Typical Performance Curves for Single Diode @ Tc = +25°C 0 0.35 Insertion Loss - (dB) Total Capacitance (pF) -10 0.30 1 MHz 0.25 100 MHz 1 GHz 0.20 -20 -30 -40 Vc=0.5V Vc=0.75V Vc=1.0V Vc=1.5V Vc=2.0V Vc=5.0V -50 -60 0.15 -70 0 2 4 6 8 10 12 14 16 18 20 0 500 1000 1500 2000 Frequency - (MHz) Reverse Voltage (V) Figure 5. RF Capacitance vs Reverse Bias 40 1GHz Vc=0V INPUT IP3 (dBm) Return Loss - (dB) -10 -20 Vc=+5V -30 -40 0 500 1000 1500 2000 2500 3000 Frequency - (MHz) Attenuation - (dB) 0.12 GHz 1 GHz 1.8 GHz 2.4 GHz 3.0 GHz 1 1 2 3 Control Voltage - (V) Figure 9. Attenuation vs. Control Voltage  300 Hz 20 10 0 100 MHz 10 20 Figure 8. Input IP3 vs. Attenuation 100 10 30 Attenuation (dB) Figure 7. Return Loss vs. Frequency 0 3000 Figure 6. Insertion Loss vs. Frequency 0 -50 2500 4 5 30 40 Package Outline & Dimension D Dimension E H B e e1 L2 CL PKG A2 A 0.250 A1 SEATING PLANE L GAGE PLANE PCB Footprint 0.074 1.9 0.037 0.95 0.094 2.4 0.039 1.0 0.028 0.7  DIMENSIONS IN Inches mm C Symbol Minimum Nominal Maximum D 2.80 2.90 3.00 H 2.60 2.80 3.00 E 1.50 1.60 1.70 e1 1.88 1.90 1.92 e 0.93 0.95 0.97 B 0.35 A2 0.9 0.50 C 0.08 0.22 L 0.35 0.60 A1 0 0.15 A 0.9 1.40 1.15 1.30 Device Orientation Top View REEL 4 mm End View Top View REEL 4 mm CARRIER TAPE 8 mm BT? USER FEED DIRECTION CARRIER TAPE COVER TAPE BT? Po P2 Po P2 BT? BT? BT? BT? BT? Note: "BT" represents package marking code "?" represents date code Note: "BT" represents package marking code "?" represents date code T1 E Tape Dimension BT? 8 mm USER FEED DIRECTION D COVER TAPE End View E Bo F W 7˚ MAX D Ko T1 P D1 8˚ MAX Ao Bo Ao W F 7˚ MAX P Ko D1 8˚ MAX Milmeters Symbol Nominal Minimum Maximum V 8.00 (0.315) 7.90 (0.311) 8.30 (0.327) P 4.00 (0.157) 3.90 (0.154) 4.10 (0.161) E 1.75 (0.069) 1.65 (0.065) 1.85 (0.073) F 3.50 (0.138) 3.45 (0.136) 3.55 (0.140) J 1.50 (0.059) N/A 1.60 (0.063) J1 1.00 (0.039) N/A 1.25 (0.049) Po 4.00 (0.157) 3.90 (0.154) 4.10 (0.161) P2 2.00 (0.079) 1.95 (0.077) 2.05 (0.081) Ao 3.23 (0.127) 3.13 (0.123) 3.33 (0.131) Jo 3.81 (0.125) 3.08 (0.121) 3.28 (0.129) Fo 1.60(0.063) 1.50 (0.059) 1.70 (0.067) T1 0.254 (0.0100) 0.241 (0.0095) 0.267 (0.0105) For product information and a complete list of distributors, please go to our web site: Part Number Ordering Information Part number No of Device Container HSMP-3866-BLKG 100 Anti-static bag HSMP-3866-TR1G 3000 7” reel HSMP-3866-TR2G 10000 13” reel www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-4497EN AV02-1962EN - June 3, 2009
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