IAM-91563
0.8–6 GHz 3V Downconverter
Data Sheet
Description
Features
Avago’s IAM-91563 is an economical 3V GaAs MMIC mixer
used for frequency down-conversion. RF frequency coverage is from 0.8 to 6 GHz and IF coverage is from 50 to 700
MHz. Packaged in the SOT-363 package, this 4.0 sq. mm.
package requires half the board space of a SOT-143 and
only 15% the board space of an SO‑8 package.
• Lead-free Option Available
At 1.9 GHz, the IAM-91563 provides 9 dB of conversion
gain, thus eliminating an RF or IF gain stage normally
needed with a lossy mixer. LO drive power is nominally
only -5 dBm, eliminating an LO buffer amplifier. The 8.5 dB
noise figure is low enough to allow the system to use a
low cost LNA. The -6 dBm Input IP3 provides adequate
system linearity for most commercial applications, but is
adjustable to 0 dBm.
• Ultra-miniature Package
• +0 dBm Input IP3 at 1.9 GHz
• Single +3V Supply
• 8.5 dB SSB Noise Figure at 1.9 GHz
• 9.0 dB Conversion Gain at 1.9 GHz
Applications
• Downconverter for PCS, PHS, ISM, WLL, and other
Wireless Applications
The circuit uses GaAs PHEMT technology with proven reliability, and uniformity. The MMIC consists of a cascode FET
structure that provides unbalanced gm modulation type
mixing. An on-chip LO buffer amp drives the mixer while
bias circuitry allows a single +3V supply (through a choked
IF port). The LO port is internally matched to 50 Ω. The
RF and IF ports are high impedance and require external
matching networks.
Surface Mount Package: SOT-363 (SC-70)
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Simplified Schematic
IF and Vd
6
LO
1
SOURCE
BYPASS
Pin Connections and Package Marking
MGA-86563 Pkg
RF 3
91
GND 2
5 GND
4 SOURCE
BYPASS
Note:
1. Package marking provides orientation and identification.
4
3
6 IF and Vd
LO 1
RF
GROUND
2, 5
IAM-91563 Absolute Maximum Ratings
Symbol Parameter
Units
Absolute
Maximum[1]
Vd
Device Voltage, RF output to ground
V
6.0
VRF, VLO
RF voltage or LO voltage to ground
V
+0.5, -1.0
Pin
CW RF Input Power
dBm
+13
Tch
Channel Temperature
°C 150
TSTG
Storage Temperature
°C
Thermal Resistance [2]: θch-c = 310°C/W
Notes:
1. Permanent damage may occur if any of
these limits are exceeded.
2. TC = 25°C (TC is defined to be the
temperature at the package pins where
contact is made to the circuit board).
-65 to 150
IAM-91563 Electrical Specifications, TC = 25°C, Vd = 3 V
Symbol
Parameters and Test Conditions
Units
Min.
Typ. Max.
4.0
9.0
G test
Gain in test circuit[1]
RF=1890 MHz, IF=250 MHz
dB
NFtest
Noise Figure in test circuit[1]
RF=1890 MHz, IF=250 MHz
dB
8.5 11.0
Id
Device Current
mA
9.0 12.0
6.0
Std Dev[2]
NF
Noise Figure (RF & IF with external matching,
IF=250 MHz, LO power=-5 dBm)
f = 0.9 GHz
dB
7.0
f = 1.9 GHz
8.5
f = 2.4 GHz 11.0
f = 4.0 GHz 16.5
f = 6.0 GHz 18.0
Gc
Conversion gain (RF and IF with external matching,
IF=250 MHz, LO power=-5 dBm)
f = 0.9 GHz
dB 11.0
f = 1.9 GHz
9.0 1.5
f = 2.4 GHz
7.7
f = 4.0 GHz
4.6
f = 6.0 GHz 1.7
P1 dB
Output power @ 1 dB compression (RF and IF with
external matching, IF=250 MHz, LO power =-5 dBm)
f = 0.9 GHz dBm
f = 1.9 GHz
f = 2.4 GHz
f = 4.0 GHz
f = 6.0 GHz
0.5
-6.7
-8.0 1.3
-8.7
-15.0
-17.8
RLRF
RF port return loss
f = 0.5 - 6.0 GHz
dB
-1.7
0.2
RLLO
LO port return loss
f = 0.5 - 6.0 GHz
dB
-9.4
0.3
RLIF
IF port return loss
f = 50 - 700 MHz
dB
-3.7
0.2
IP3
Input Third Order Intercept Point
RF = 1.9 GHz, IF = 250 MHz
Id = 9.0 mA, LO power = -5 dBm
dBm
-6.0 1.3
IP3
Input Third Order Intercept Point
RF = 1.9 GHz, IF = 250 MHz
Id = 15 mA, LO power = -2 dBm
dBm
0 1.1
ISOLL-R
LO-RF Isolation
ISOLR-I
RF-IF Isolation (No Match)
dB 2
ISOLR-I
LO-IF Isolation (No Match)
dB
RF = 1.9 GHz
dB 18
4
Notes:
1. Guaranteed specifications are 100% tested in the circuit in Figure 18 in the Applications Information section.
2. Standard deviation number is based on measurement of at least 500 parts from three non-consecutive wafer lots during the initial characterization
of this product, and is intended to be used as an estimate for distribution of the typical specification.
IAM-91563 Typical Performance, TC = 25°C, Vd = 3.0 V, RF=1890 MHz, LO = -5 dBm, IF = 250 MHz, unless otherwise stated.
12
20
TA = +85 C
TA = +25 C
TA = –40 C
18
6
4
2
0
16
14
12
10
8
0
1
2
3
4
5
6
6
0
1
2
5
6
-20
6
4
2
1
2
3
4
16
5
10
-14
DEVICE CURRENT (mA)
IF
-5
-6
-7
LO
-8
0
1
2
3
4
5
-20
6
1
2
3
4
0
1
5
FREQUENCY (GHz)
Figure 7. RF, LO, and IF Return Loss vs.
Frequency.
6
3
4
5
6
Figure 6. Output Power (@ 1 dB Compression)
vs. Frequency and Voltage.
8
6
TA = +85 C
TA = +25 C
TA = -40 C
4
0
2
FREQUENCY (GHz)
12
2
-9
0
Vd = 3.3V
Vd = 3.0V
Vd = 2.7V
-18
10
-4
6
-12
12
RF
5
-10
-16
Figure 5. Noise Figure (into 50 ) vs.
Frequency and Supply Voltage.
0
4
Figure 3. Output Power (@ 1 dB Compression)
vs. Frequency and Temperature.
FREQUENCY (GHz)
-1
3
-8
12
6
6
Figure 4. Available Conversion Gain vs.
Frequency and Voltage.
-3
2
-6
14
FREQUENCY (GHz)
-2
1
-4
8
0
0
FREQUENCY (GHz)
P1 dB (dBm)
NOISE FIGURE (dB)
GAIN (dB)
4
Vd = 3.3V
Vd = 3.0V
Vd = 2.7V
18
8
RETURN LOSS (dB)
3
20
Vd = 3.3V
Vd = 3.0V
Vd = 2.7V
10
TA = +85 C
TA = +25 C
TA = –40 C
-18
Figure 2. Noise Figure (into 50 ) vs. Frequency
and Temperature.
12
-14
FREQUENCY (GHz)
Figure 1. Available Conversion Gain vs.
Frequency and Temperature.
-10
-12
-16
FREQUENCY (GHz)
0
-8
-10
SSB NOISE FIGURE (dB)
GAIN (dB)
8
-6
P1 dB (dBm)
NOISE FIGURE (dB)
10
-4
TA = +85 C
TA = +25 C
TA = –40 C
0
1
2
3
4
5
SUPPLY VOLTAGE (V)
Figure 8. Device Current vs. Supply Voltage and
Temperature.
10
8
6
Vd = 3.3V
Vd = 3.0V
Vd = 2.7V
4
2
0
100
200 300 400
500 600
700
IF FREQUENCY (MHz)
Figure 9. SSB Noise Figure vs. Frequency and
Supply Voltage.
12
12
10
10
10
8
TA = +85 C
TA = +25 C
TA = -40 C
4
2
0
100
200 300 400
500 600
8
6
4
2
700
TA = 3.3V
TA = 3.0V
TA = 2.7V
0
100
200 300 400
IF FREQUENCY (MHz)
6
TA = +85 C
TA = +25 C
TA = -40 C
4
2
0
700
100
P1 dB and INPUT IP3 (dBm)
NF
10
8
GAIN
6
500 600
700
Figure 12. Conversion Gain vs. Frequency and
Temperature.
0
0
-2
-2
-4
IP3
-4
-6
P1 dB
-8
200 300 400
IF FREQUENCY (MHz)
Figure 11. Conversion Gain vs. Frequency and
Supply Voltage.
14
CONVERSION GAIN and
NOISE FIGURE (dB)
8
IF FREQUENCY (MHz)
Figure 10. SSB Noise Figure vs. Frequency and
Temperature.
12
500 600
ISOLATION (dB, No Match)
6
CONVERSION GAIN (dB)
12
CONVERSION GAIN (dB)
SSB NOISE FIGURE (dB)
IAM-91563 Typical Performance, TC = 25°C, Vd = 3.0 V, RF=1890 MHz, LO = -5 dBm, IF = 250 MHz, unless otherwise stated.
RF-IF
LO-IF
-6
-8
LO-RF
-10
-12
-14
-16
-18
4
-10
-9
-8
-7
-6
-5 -4
-3
-2
-1
-8
-7
-6
-5 -4
-3
-2
-1
LO POWER (dBm)
LO POWER (dBm)
Figure 14. One dB Compression and Input Third
Order Intercept vs. LO Drive Power.
0
RF-LO
-8
ISOLATION (dB)
-20
-9
Figure 13. Available Conversion Gain and Noise
Figure vs. LO Drive Power.
-4
-12
-16
-20
-24
RF-IF
-28
-32
LO-IF
-36
-40
0
1
2
3
4
5
6
RF FREQUENCY (GHz)
Figure 16. Isolation (RF-LO, RF-IF, LO-IF) vs.
Frequency with RF and IF Matching Networks.
-10
-10
0
1
2
3
4
5
6
RF FREQUENCY (GHz)
Figure 15. Isolation (LO-RF, RF-IF, LO-IF) vs.
Frequency with no RF and IF Matching
Networks.
IAM-91563 Typical Reflection Coefficients, TC=25°C, ZO = 50 Ω, Vd =3 V
Frequency (GHz)
RF (Mag)
RF (Ang)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.91
-18
0.9
0.91
-21
1
0.91
-23
1.1
0.92
-25
1.2
0.91
-28
1.3
0.88
-29
1.4
0.87
-32
1.5
0.85
-33
1.6
0.84
-34
1.7
0.83
-35
1.8
0.82
-37
1.9
0.82
-37
2
0.81
-39
2.1
0.81
-40
2.2
0.81
-41
2.3
0.81
-42
2.4
0.81
-44
2.5
0.80
-45
2.6
0.80
-45
2.7
0.81
-46
2.8
0.81
-48
2.9
0.81
-50
3
0.82
-51
3.1
0.83
-53
3.2
0.83
-55
3.3
0.83
-56
3.4
0.85
-59
3.5
0.86
-61
3.6
0.87
-64
3.7
0.85
-67
3.8
0.83
-71
3.9
0.83
-71
4
0.82
-73
4.1
0.83
-76
4.2
0.83
-79
4.3
0.84
-82
4.4
0.84
-85
4.5
0.84
-87
4.6
0.85
-91
4.7
0.84
-95
4.8
0.85
-97
4.9
0.85
-100
5
0.85
-103
5.1
0.86
-106
5.2
0.85
-108
5.3
0.84
-113
5.4
0.84
-115
5.5
0.84
-117
5.6
0.83
-121
5.7
0.83
-123
5.8
0.81
-125
5.9
0.81
-128
6
0.80
-130
LO (Mag)
0.43
0.39
0.39
0.39
0.39
0.39
0.40
0.39
0.39
0.38
0.39
0.39
0.40
0.39
0.39
0.39
0.39
0.39
0.38
0.39
0.38
0.38
0.37
0.37
0.36
0.36
0.35
0.35
0.34
0.34
0.33
0.33
0.32
0.32
0.31
0.32
0.31
0.30
0.30
0.29
0.29
0.28
0.29
0.27
0.28
0.26
0.28
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.27
0.25
0.26
0.24
LO (Ang)
IF (Mag)
-1
0.64
-6
0.63
-8
0.63
-9
0.63
-10
0.62
-11
0.62
-14
0.62
-14
-16
-17
-17
-19
-22
-22
-24
-25
-26
-27
-29
-29
-31
-31
-32
-33
-34
-35
-36
-36
-37
-37
-38
-39
-39
-40
-40
-42
-42
-45
-43
-46
-45
-47
-48
-49
-50
-51
-52
-52
-54
-54
-57
-56
-58
-58
-61
-61
-64
-65
-67
-65
IF (Ang)
-8
-9
-10
-10
-11
-12
-13
The IAM-91563 is a miniature downconverter developed
for use in superheterodyne receivers for commercial wireless applications with RF bands from 800 MHz to 6 GHz.
Operating from only 3 volts, the IAM-91563 is an excellent
choice for use in low current applications such as: 1.9 GHz
Personal Communication Systems (PCS) & Personal Handy
System (PHS), 2 GHz Digital European Cordless Telephone
(DECT), and 800 MHz cellular telephones (e.g., GSM, NADC,
JDC). Combined with Avago’s other RFICs and discrete
components housed in the same ultra-miniature SOT-363
package, the IAM-91563 also provides flexible, buildingblock solutions for WLAN’s and wireless datacomm such
as PCMCIA RF modems as well as many Industrial, Scientific and Medical (ISM) systems operating at 900 MHz,
2.5 GHz, and 5.8 GHz.
The IAM-91563 is a 3-port, downconverting RFIC mixer of
the cascode (common source - common gate) type that
uses a low level (-5 dBm) local oscillator (LO) to convert an
RF signal in the 800 MHz to 6 GHz range to an IF between
50 and 700 MHz. The basic mixing function takes place in
a cascode connected pair of FETs as shown in Figure 17.
IF
LO
FET 2
Using a minimum of external components with a standard
bias of 3 volts/9 mA and LO power of ‑5 dBm, the IAM-91563
mixer achieves an RF to IF conversion gain of 9 dB at 1.9 GHz
with a noise figure of 8.5 dB and an input third order intercept point of ‑6 dBm. LO-to-IF isolation is greater than 35
dB. Setting the bias for the higher linearity/higher current
mode (approximately 16 mA) along with an LO drive level
of -2 dBm will boost the input IP3 to approximately 0 dBm.
Test Circuit
The circuit shown in Figure 18 is used for 100% RF and DC
testing. The test circuit is impedance matched for an RF of
1890 MHz and an IF of 250 MHz. The LO is set at 1640 MHz and
-5 dBm for low side conversion. (High side conversion with an
LO of 2240 MHz would produce similar performance.) The RF
choke at the IF port is used to provide DC bias. Tests in this circuit are used to guarantee the Gtest, NFtest, and Device Current
(Id) parameters shown in the table of Electrical Specifications.
0.5 pF
Vd
220 nH
100 pF
(2)
Z = 50
500 pF 68 nH
IF
250 MHz
Z = 110
I=10.4 mm
91
IAM-91563 Applications Information Introduction
RF
1890 MHz
Z = 50
4.7 pF
LO
1640 MHz
Figure 18. Test Circuit.
Specifications and Statistical Parameters
Figure 17. Cascode FET Mixer.
Several categories of parameters appear within this data
sheet. Parameters may be described with values that are
either “minimum or maximum,”“typical,” or “standard deviations.”
The received RF signal is connected to the gate of FET1
and the LO is applied to the gate of FET2. The purpose of
FET2 is to vary the transconductance of FET1 over a highly
nonlinear region at the rate of the LO frequency. This produces the nonlinearity required for frequency mixing to
take place. This type of mixer is also known as a “transconductance mixer.” The IF is taken from the drain of FET2.
The values for parameters are based on comprehensive
product characterization data, in which automated measurements are made on of a minimum of 500 parts taken
from 3 non-consecutive process lots of semiconductor
wafers. The data derived from product characterization
tends to be normally distributed, e.g., fits the standard “bell
curve.”
An advantage of the cascode type of design is the inherent isolation between the gates of the two FETs which results in very good LO-to-RF isolation. An integrated buffer
amplifier between the LO input and the gate of FET2 not
only increases the LO-RF isolation but also reduces the
amount of LO input power required by the mixer.
Parameters considered to be the most important to system
performance are bounded by minimum or maximum values. For the IAM‑91563, these parameters are: Conversion
Gain (Gtest), Noise Figure (NFtest), and Device Current (Id). Each
of these guaranteed parameters is 100% tested.
RF
FET 1
The IAM-91563 uses an innovative bias regulation circuit
that realizes several benefits to the designer. First, the
IAM-91563 operates with a single, positive device voltage
from 1.5 to 5 volts with stable performance over a wide
temperature range. Second, a unique feature of the IAM91563 allows the device current to be easily increased by
adding an external resistor to boost device current and
increase linearity.
Values for most of the parameters in the table of Electrical Specifications that are described by typical data are the
mathematical mean (µ), of the normal distribution taken
from the characterization data. For parameters where measurements or mathematical averaging may not be practical,
such as the Typical Reflection Coefficients table or performance curves, the data represents a nominal part taken
from the “center” of the characterization distribution. Typical values are intended to be used as a basis for electrical
design.
To assist designers in optimizing not only the immediate circuit using the IAM-91563, but to also optimize and
evaluate trade-offs that affect a complete wireless system,
the standard deviation (σ) is provided for many of the Electrical Specifications parameters (at 25°) in addition to the
mean. The standard deviation is a measure of the variability about the mean. It will be recalled that a normal distribution is completely described by the mean and standard
deviation.
Standard statistics tables or calculations provide the probability of a parameter falling between any two values,
usually symmetrically located about the mean. Referring
to Figure 12 for example, the probability of a parameter
being between ±1σ is 68.3%; between ±2σ is 95.4%; and
between ±3σ is 99.7%.
68%
99%
-2σ
-1σ Mean (µ) +1σ +2σ
(typical)
R
Figure 21. RF Layout.
It is recommended that the PCB pads for the ground pins
not be connected together underneath the body of the
package. PCB traces hidden under the package cannot be
adequately inspected for SMT solder quality.
PCB Material
95%
-3σ
C
+3σ
Parameter Value
Figure 19. Normal Distribution.
Phase Reference Planes
The positions of the reference planes used to specify Reflection Coefficients for this device are shown in Figure 20.
As seen in the illustration, the reference planes are located
at the point where the package leads contact the test circuit.
REFERENCE
PLANES
FR-4 or G-10 printed circuit board materials are a good
choice for most low cost wireless applications. Typical board thickness is 0.020 to 0.031 inches. Thicknesses
greater than 0.031 inch began to introduce excessive
inductance in the ground vias. The width of the 50Ω microstriplines on PC boards in this thickness range is also
very convenient for mounting chip components such as
the series inductor at the input or DC blocking and bypass
capacitors.
For applications using higher frequencies such as the 5.8
GHz ISM band, the additional cost of PTFE/glass dielectric
materials may be warranted to minimize transmission line
loss at the mixer’s RF input. An additional consideration
of using lower cost materials at higher frequencies is the
degradation in the Q’s of transmission lines used for impedance matching.
Biasing
TEST CIRCUIT
Figure 20. Phase Reference Planes.
RF Layout
An RF layout similar to the one in Figure 21 is suggested
as a starting point for microstripline designs using the
IAM-91563 mixer. This layout shows the capacitor for the
Source Bypass pin and the optional resistor used to increase bias current. Adequate grounding is important to
obtain maximum performance and to maintain stability.
Both of the ground pins of the MMIC should be connected to the RF groundplane on the backside of the PCB by
means of plated through holes (vias) that are placed near
the package terminals. As a minimum, one via should be
located next to each of the ground pins to ensure good
RF grounding. It is a good practice to use multiple vias to
further minimize ground path inductance.
The IAM-91563 is a voltage-biased device and is designed
to operate in the “normal mode” from a single, +3 volt
power supply with a typical current drain of only 9 mA.
The internal current regulation circuit allows the mixer to
be operated with voltages as high as +5 volts or as low as
+1.5 volt.
The device current can be increased up to 20 mA by
adding an external resistor from the Source Bypass pin
to ground. This feature makes it possible to operate the
IAM-91563 in the “high power mode” to achieve greater
linearity. Refer to the section titled “High Linearity Mode”
for information on applications and performance when
using this feature.
Application Guidelines
Several design considerations should be taken into account to ensure that maximum performance is obtained
from the IAM‑91563 downconverter. The RF and IF ports
must be impedance matched at their respective frequencies to the circuits to which they are connected. This is
typically 50 ohms when the mixer is used as a building
block component in a 50-ohm system. These ports have
been left untuned on the MMIC to allow the mixer to be
used over a wide range of RF and IF bands. The LO port is
already sufficiently well matched (less than 1 dB of mismatch loss) for most applications.
As with most mixers, appropriate filters must be placed at
the RF port and IF port such as in Figure 22. The filter in
front of the RF port eliminates interference from the image frequency and the IF filter prevents RF and LO signal
leakage into the IF signal processing circuitry.
RF
HP Filter
IF
LO
LP Filter
Figure 22. Image and IF Filters.
Additional design considerations relate to the use of higher bias current where greater linearity is required, bypassing of the Source Bypass pin, bias injection, and DC blocking and bypassing.
Each of these design factors will be discussed in greater
detail in the following sections.
RF Port
A well matched RF port is especially important to maximize the conversion gain of the IAM-91563 mixer. Matching is also necessary to realize the specified noise figure
and RF-to-LO isolation. The amount the conversion gain
can be increased by impedance matching is equal to the
mismatch loss at the RF port. The impedance of the RF
port is characterized by the measured reflection coefficients shown in Typical Reflection Coefficients Table. The
maximum “mismatch gain” that results from eliminating
the mismatch loss is expressed in dB as a function of the
reflection coefficient as:
GRF, mm = 10 log10
1
1 – ΓRF2
(1)
For wireless bands in the 800 MHz to 6 GHz range, the
magnitude of the reflection coefficient of the RF port varies from 0.91 to 0.80, which corresponds to a mismatch
gain of 7.6 to 4.4 dB.
The impedance of the RF port is capacitive, and for frequencies from 800 MHz to 2.4 GHz, falls very near the R=1
circle of a Smith chart. While these impedances could be
easily matched to 50 ohms with a simple series inductor,
it is advantageous to use a 2-element matching network
of the series C, shunt L type as shown in Figure 23 instead. There are two main reasons for this choice. The first
is to incorporate a high pass filter characteristic into the
matching circuit. Second, the series C, shunt L combination will match the entire range of RF port impedances to
50 Ω. Most wireless communication bands are sufficiently
narrow that a single (mid-band) frequency approach to
impedance matching is adequate.
RF
Input
C
RF
L
IF
LO
Figure 23. RF Input HPF Matching.
Impedance matching can be accomplished with lumped
element components, transmission lines, or a combination of both. The use of surface mount inductors and capacitors is convenient for lower frequencies to minimize
printed circuit board space. The use of high impedance
transmission lines works well for higher frequencies where
lumped element inductors may have excessive parasitics
and/or self-resonances.
If other types of matching networks are used, it should be
noted that while the RF input terminal of the IAM-91563
is at ground potential, it should not be used as a current
sink. If the input is connected directly to a preceding stage
that has a voltage present, a DC blocking capacitor should
be used.
IF port
The IAM-91563 can be used for downconvesion to intermediate frequencies in the 50 to 700 MHz range. Similar to
the RF port, the reflection coefficient at the IF is fairly high
and Equation 1 can be used to predict a mismatch gain
of up to 2.2 dB by impedance matching. A well matched
IF port will also provide the optimum output power and
LO-to-IF isolation. Reflection coefficients for the IF port are
shown in the Typical Reflection Coefficients Table.
The IF port impedance matching network should be of
the low pass filter type to reflect RF and LO power back
into the mixer while allowing the IF to pass through. The
shunt C, series L type of network in Figure 24 is a very
practical choice that will meet the low pass filter requirement while matching any IF impedances over the 50 - 700
MHz range to 50 ohms.
RF
IF
LO
Figure 24. IF Output LPF Matching.
IF
Output
Bypass
Capacitor
Vd
RFC
IF
LO
LO Port
The LO input port is internally matched to 50 Ω within a
2.2:1 VSWR over the entire operating frequency range. Additional matching will normally not be needed. However,
if desired, a small series inductor can be used to provide
some improvement in the LO match and thus reduce the
LO drive level requirement by up to 0.7 dB. Reflection coefficients for the LO port are shown in the table of Typical
Reflection Coefficients.
Source Bypass Pin
The Source Bypass pin should be RF bypassed to ground
at both the RF and LO frequencies as well as the IF. Many
capacitors with values large enough to adequately bypass
lower intermediate frequencies contain parasitics that
may have resonances in the RF band. It is often practical
to use two capacitors in parallel for this purpose instead
of one. A small value, high quality capacitor is used to bypass the RF/LO frequencies and a large value capacitor for
the IF. When biased in the high linearity mode, a resistor is
added from the Source Bypass pin to ground.
High Linearity Mode
The IAM-91563 has a feature that allows the user to place
an external resistor from the Source Bypass pin to ground
and increase the device current from a nominal 9 mA to
as high as 20 mA. The additional current increases mixer
linearity (IP3) and output power(P1dB). Mixer performance
at higher device current is shown in Figures 26 and 27.
10
GAIN
8
6
4
Figure 25. Bias Connection.
NF
12
IF
Output
7
9
11
13
15
17
19
DEVICE CURRENT (mA)
1000 56
21
9
5
3
Approximate Resistor Value ( )
Figure
26.26.Available
Gainand
andSSB
SSB
Noise Figure vs. Device Current
Figure
AvailableConversion
Conversion Gain
Noise
(Source
FigureResistor).
vs. Device Current (Source Resisitor).
0
P1 dB and INPUT IP3 (dBm)
RF
14
CONVERSION GAIN and NF (dB)
The DC bias is also applied to the mixer through the IF
port. Figure 25 shows how an inductor (RFC) is used to
isolate the IF from the DC supply. The bias line is bypassed
to ground with a capacitor to keep RF off of the DC supply
lines and to prevent dips or peaks in the response of the
mixer.
-2
IP3
-4
P1 dB
-6
-8
-10
7
9
11
13
15
17
19
DEVICE CURRENT (mA)
1000 56
21
9
5
3
Approximate Resistor Value ( )
Figure
27.27.One
andInput
Input
Third
Order Intercept Point vs. DeFigure
OnedB
dBCompression
Compression and
Third
Order
viceIntercept
CurrentPoint
(Resistor).
vs. Device Current (Resistor).
As an example of improved linearity, the use of a 15 Ω resistor at the Source Bypass pin increases the device current to 14 mA. At 1.9 GHz, the input IP3 is increased from
-6.5 dBm to -3 dBm. Increasing the LO drive level from -5
dBm to -1 dBm further increases the input IP3 to 0 dBm.
Application Example
The printed circuit layout in Figure 28 is a general purpose
layout that will accommodate components for using the
IAM‑91563 for RF inputs from 800 MHz to 6 GHz. This layout is a microstripline design (solid groundplane on the
backside of the circuit board) with 50 Ω interfaces for the
RF input, IF output, and LO input. The circuit is fabricated
on 0.031-inch thick FR-4 dielectric material. Plated through
holes (vias) are used to bring the ground to the top side of
the circuit where needed. Multiple vias are used to reduce
the inductance of the paths to ground.
ries C - shunt L network (from the 50 Ω source to ΓRF) will
be used to match ΓRF to 50 Ω. Addition of a 6.5 nH shunt
inductance moves the impedance trajectory from Point A
to Point B. The match to 50 Ω is completed with a 0.6 pF
series capacitance, C1, that moves the match to Point C,
the center of the Smith chart.
1
0.5
2
B
0.2
LO
0.2
RF
C
-0.2
B
RF C1
Input
IF
1
C
0.5
2
A
L
A
-2
-0.5
+V
-1
IAM-91
Figure 30. RF Input Impedance Match.
Figure 28. PCB Layout.
1.9 GHz Design Example
To illustrate a design approach for using the IAM-91563, a
PCS band downconverter with an RF of 1.9 GHz and IF of
110 MHz is presented. The PCB layout above was used to
assemble the mixer and verify performance.
A schematic diagram of the 1.9 GHz circuit is shown in Figure 29.
LO
Input
RF
Input
C7
C1
L1 = 0
91
MLIN
C5
Vd
C6
L3
C3
L2
C2
RFC
At the IF output, the low pass filter and impedance match is
formed by shunt capacitor C2 and series inductor L2. Referring again to the table of Reflection Coefficients, the IF output port ΓIF = 0.64 ∠ -8° at 100 MHz, which is the frequency
point closest to the desired IF of 110 MHz. ΓIF is plotted as
Point A in Figure 31.
IF
Output
1
0.5
C4
Figure 29. Schematic of Example Application Circuit.
At the RF input port, series capacitor C1 and transmission
line MLIN form the input matching network and high pass
filter. (Note: The PCB layout above has provision for an inductor, L1, in series with MLIN. Inductor L1 is not used in
this design.)
Referring to the table of Reflection Coefficients, the RF
input port ΓRF = 0.82 ∠−37° at 1.9 GHz. This point is plotted as Point A on the Smith chart in Figure 30. For reasons
previously discussed in the “RF Port” section above, a se-
10
For this example, the shunt inductor was realized with the
transmission line, MLIN in Figure 29 (Z O = 90Ω, length =
0.35 in.). A high quality capacitor should be selected for
C1 to minimize the effects of the capacitor’s parasitic inductance and resistance. Series capacitor C1 also serves
to block any DC that may be present at the output of the
stage preceding the mixer.
2
A
0.2
B
L2
C2
0.2
0.5
1
C
-0.2
C
IF
Output
2
A
B
-2
-0.5
-1
Figure 31. IF Input Impedance Match.
Adding a shunt capacitance (C2) of 11.3 pF brings the impedance to Point B. The match to Point C at the center of
the chart is completed with a series inductance (L2) of 150
nH.
Although not necessary for many applications, the match
at the LO port can be improved by the addition of series
inductor L3 with a value of approximately 8 nH. Design information (ΓLO) for matching the LO port is obtained from
the table of Reflection Coefficients. Capacitor C7 is a DC
block for the LO port.
DC bias is applied to the IAM‑91563 through the RFC at
the IF Output pin. The power supply is bypassed to ground
with capacitor C5 to keep RF, IF, and LO signals off of the
DC bias lines and to prevent gain dips or peaks in the response of the mixer. C4 is a DC blocking capacitor for the
output.
The values of the RF bypass capacitors and DC blocking
capacitors that are not part of a impedance matching
structure (i.e., C3 - C7) should be chosen to provide a small
reactance (typically < 5 ohms) at the lowest frequency at
the port for which they are used. The reactance of the RF
choke (RFC) should be high (e.g., several hundred ohms)
at the lowest IF.
The completed 1.9 GHz mixer from the design example
above with all components and SMA connectors in place
is shown in Figure 32. Again, L1 is not used and is replaced
by a metal tab. The length of the shunt transmission line,
MLIN, is adjustable by moving the position of the shorting tab between the line and the ground pad. Provision is
made for an additional bypass capacitor, C6, to be added
to the bias line near the Vd connection to eliminate unwanted RF feedback through bias lines.
When multiple bypass capacitors are used, consideration
should be given to potential resonances. It is important
to ensure that the capacitors, when combined with additional parasitic L’s and C’s on the circuit board, do not form
resonant circuits. The addition of a small value resistor in
the bias supply line between bypass capacitors will often
“de-Q” the bias circuit and eliminate resonance effects.
Table 1 summarizes the component values for the 1.9 GHz
design.
Table 1. Component Values for 1.9 GHz Downconverter.
Component
Value
C1
0.5 pF
C2
9 pF
C3, C5, C7
100 pF
C4
500 pF
L1
(not used)
L2
100 nH
L3
8.2 nH
MLIN
Zo=90 Ω
l = 0.41 in.
RFC
320 nH
The values shown in Table 1 may vary from those used
above to describe the basic impedance matching approach. The final component values take into consideration additional effects such as, the various line lengths
between components, parasitics in components (e.g., the
series inductance in C1), as well as other circuit parasitics.
A CAD program such as Avago Touchstone® may be used
to fully analyze and account for these circuit variables.
LO
C2
C7
RF
L2
L3
C1
C3
L1
MUN 1
IAM-91
C4
RFC
C5
IF
+V
C6
Figure 32. Complete 1.9 GHz Mixer.
The following performance was measured for a 1.9 GHz
circuit:
Measured results:
Conversion Gain = 9.0 dB
LO-RF Isolation = 17 dB
SSB Noise Figure = 8.5 dB
LO-IF Isolation = 34 dB
P1dB (output) = -8.1 dB
RF-IF Isolation = 23 dB
IP3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 1.89 GHz
LO Drive Level = -5 dBm
LO Frequency = 1.78 GHz
DC Power = 3.0V @ 9 mA
IF Frequency = 110 MHz
11
Designs for Other Frequencies
100 pF
100 pF
0.9 pF
Vd
50 Ω
GC
180 nH
50 Ω
1000 pF
IF
91
GN
IF
250
MHz
RF
LO
50 Ω
68 nH
50 Ω
500 pF
IF
LO
2200
MHz
RF
GND
LO
4.7 pF
3.3 nH
50 Ω
LO
2200
MHz
Conversion Gain = 7.7 dB
LO-RF Isolation = 16 dB
SSB Noise Figure = 11 dB
LO-IF Isolation = 35 dB
1 dB Compression = -8.7 dB
RF-IF Isolation = 27 dB
IP3 (Input) = -7 dBm
Measured results:
Conversion Gain = 10.6 dB
LO-RF Isolation = 21 dB
SSB Noise Figure = 7.1 dB
LO-IF Isolation = 33 dB
1 dB Compression = -7.0 dB
RF-IF Isolation = 17 dB
P3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 2.45 GHz
LO Drive Level = -5 dBm
IF Frequency = 250 MHz
DC Power = 3.0V @ 9 mA
LO Frequency = 2.2 GHz
Figure 34. 2.4 GHz ISM Band Mixer.
Operating conditions:
RF Frequency = 900 MHz
LO Drive Level = -5 dBm
IF Frequency = 80 MHz
DC Power = 3.0V @ 9 mA
LO Frequency = 980 MHz
Figure 33. 800-900 MHz Cellular and ISM Band Mixer.
SOT-363 PCB Footprint
A recommended PCB pad layout for the miniature SOT363 (SC-70) package used by the IAM-91563 is shown in
Figure 35 (dimensions are in inches). This layout provides
ample allowance for package placement by automated
assembly equipment without adding parasitics that could
impair the high frequency RF performance of the IAM91563. The layout is shown with a nominal SOT-363 package footprint superimposed on the PCB pads.
0.026
0.079
0.039
0.018
Dimensions in inches.
Figure 35. Recommended PCB Pad Layout for Avago’s SC70 6L/SOT-363
Products.
12
RF
2450
MHz
110 Ω, 3 mm
GC
GN
IF
250
MHz
50 Ω
Measured results:
10 nH
GND
15 pF
100 pF
220 nH
RF
2450
MHz
220 pF
220 nH
0.5 pF
91
The same design methodology described above can be
applied to other wireless frequency bands. Design examples and measurement results for the 900 MHz and 2.4
GHz bands are shown in Figures 33 and 34.
Vd
Package Dimensions
Outline 63 (SOT-363/SC-70)
HE
E
e
D
Q1
A2
A
c
A1
L
b
DIMENSIONS (mm)
SYMBOL
MIN.
MAX.
E
D
HE
A
A
A
Q
e
b
c
L
.5
.80
.80
0.80
0.80
0.00
0.0
.35
.5
.40
.0
.00
0.0
0.40
0.650 BCS
0.5
0.0
0.0
0.30
0.0
0.30
NOTES:
. All dimensions are in mm.
. Dimensions are inclusive of plating.
3. Dimensions are exclusive of mold flash & metal burr.
4. All specifications comply to EIAJ SC70.
5. Die is facing up for mold and facing down for trim/form,
ie: reverse trim/form.
6. Package surface to be mirror finish.
Part Number Ordering Information
Part Number
No. of
Devices
Container
3000
7" Reel
IAM-91563-TR1
IAM-91563-TR2 10000 13" Reel
IAM-91563-BLK 100
IAM-91563-TR1G
IAM-91563-TR2G 10000 13" Reel
IAM-91563-BLKG 100
Note:
13
3000
antistatic bag
7" Reel
antistatic bag
For lead-free option, the part number will have the character “G”
at the end.
Device Orientation
REEL
TOP VIEW
END VIEW
4 mm
8 mm
CARRIER
TAPE
91
91
91
91
USER
FEED
DIRECTION
COVER TAPE
Tape Dimensions and Product Orientation
For Outline 63
P
P2
D
P0
E
F
W
C
D1
t1 (CARRIER TAPE THICKNESS)
K0
10 MAX.
A0
DESCRIPTION
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
PERFORATION
DIAMETER
PITCH
POSITION
CARRIER TAPE
WIDTH
THICKNESS
COVER TAPE
WIDTH
TAPE THICKNESS
DISTANCE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
Tt (COVER TAPE THICKNESS)
10 MAX.
B0
SYMBOL
SIZE (mm)
SIZE (INCHES)
A0
B0
K0
P
D
D
P0
E
.40 ± 0.0
.40 ± 0.0
.0 ± 0.0
4.00 ± 0.0
.00 + 0.5
0.094 ± 0.004
0.094 ± 0.004
0.047 ± 0.004
0.57 ± 0.004
0.039 + 0.00
.55 ± 0.0
4.00 ± 0.0
.75 ± 0.0
0.06 + 0.00
0.57 ± 0.004
0.069 ± 0.004
W
t
C
Tt
F
8.00 + 0.30 - 0.0
0.54 ± 0.0
0.35 + 0.0
0.000 ± 0.0008
5.40 ± 0.0
0.06 ± 0.00
0.05 + 0.004
0.005 ± 0.0004
3.50 ± 0.05
0.38 ± 0.00
P
.00 ± 0.05
0.079 ± 0.00
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2008 Avago Technologies. All rights reserved. Obsoletes 5989-4218EN
AV02-1701EN - December 9, 2008
工商网监
湘ICP备2023018690号
