Application Note 1067
Application Notes for AP3770 System Solution
Prepared by Su Qing Hua
System Engineering Dept.
Regulation (PSR). AP3770 has the special technique to
suppress the audio noise, internal line compensation to
reduce the number of system components, fixed cable
compensation to compensate the voltage drop on different
output cable for achieving good CV regulation.
1. Introduction
The AP3770 uses Pulse Frequency Modulation (PFM)
method to realize Discontinuous Conduction Mode (DCM)
operation for FLYBACK power supplies. The principle of
PFM is different with that of Pulse Width Modulation
(PWM), so the design of transformer is also different.
The AP3770 can achieve low standby power less than
30mW.
The AP3770 can provide accurate constant voltage,
constant current (CV/CC) regulation by using Primary Side
Figure 1. 5V/1A Output for Battery Charger of Mobile Phone
Figure 1 is AP3770 typical application circuit, which is a
FLYBACK converter controlled by AP3770 with a
3-winding transformer---Primary winding (Np), Secondary
winding (Ns) and Auxiliary winding (Na). The AP3770
senses the auxiliary winding feedback voltage at FB pin
and obtains power supply at VCC pin.
Vdri---A simplified driving signal of primary transistor
Ip---The primary side current
Is ---The secondary side current
VSEC---The voltage of secondary
tSW---The period of switching frequency
tONP ---The time of primary side “ON”
tONS ---The time of secondary side “ON”
tOFF ---The discontinuous time
tOFFS --- The time of secondary side “Off”
IPK---Peak current of primary side
IPKS---Peak current of secondary side
VS---the sum of Vo and forward voltage of rectification
diode
Figure 2 is the typical operation waveforms of PFM
controller. In this figure, a series of relative idea operation
waveforms are given to illustrate some parameters used in
following design steps. And the nomenclature of the
parameters in Figure 2 is illustrated.
Sep. 2011
Rev. 1. 0
BCD Semiconductor Manufacturing Limited
1
Application Note 1067
tONP
Vdri
tSW
IPK
IP
IPKS
IS
tONS
VS
VSEC
tOFFS
tOFF
Figure 2. Operation Waveforms
Zero-Startup-Current technique, the startup up resistors
R3+R4 should be higher to 10M to 14MΩ to further lower
the power loss. The recommended value of dummy load
resistor R13 is 4.7KΩ to 10KΩ for an model with 5V
output voltage. The selection of dummy load resistor is a
tradeoff between standby power and I-V Curve.
2. Five Aspects for System Design
1.
2.
3.
4.
5.
Low Standby Power Design
Switching Frequency Design
Transformer and Power Devices Design
Feedback Resistors Design
Line Compensation Design
2.2 Switching Frequency Design
2.1 Low Standby Power Design
In order to achieve low standby power, AP3770 decreases
the minimum operating voltage. And due to proprietary
VH=0.5V
VCS_REF
1.4V
VCPC
fSW
fSW
47.6kHz
20kHz
IO
42%IO
Figure 3. Relationship Between VCPC, fSW and IO with Constant Peak Current
Sep. 2011
Rev. 1. 0
BCD Semiconductor Manufacturing Limited
2
Application Note 1067
Where, the fSW is the switching frequency. When the peak
current IPK is constant, the output power depends on the
switching frequency fSW. fSW is linearly increased with load
increasing.
When the constant peak current is adopted, the voltage of
CPC pin is increased linearly with load increasing. The
maximum value of VCPC is equal to
t ONS
4
⋅ VDD = ⋅ 3.5V = 1.4V
t SW
10
(1)
In AP3770, two-segmented peak current is used to realize
audio noise suppression. The peak current is about 0.5V
when IO>42%IOmax, and the peak current is about
0.5V/1.5 when IO
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