PAM3101DAB300

NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 300mA HIGH PSRR LOW-DROPOUT CMOS LINEAR REGULATOR Description Pin Assignments The PAM3101 series of positive voltage linear regulators feature low quiescent current (65µA typ.) and low dropout voltage, making them ideal for battery powered applications. Their high PSRR make them useful in applications where AC noise on the input power supply must be suppressed. Space-saving SOT-23, SOT-89, SC70 and DFN1.6x1.6-6L packages are attractive for portable and handheld applications. They have both thermal shutdown and current limit features to prevernt device failure from extreme operating conditions. They are stable with an output capacitor of 2.2µF or greater. Features  Low Dropout Voltage: 180mV@300mA (VO = 3.3V)             Output Voltage Accuracy within ±2% Supply Voltage Range: 2.5V to 5.5V Quiescent Current: 65µA typ. High PSRR: 70dB@1kHz Excellent Line and Regulation Fast Discharge Current Limiting Short Circuit Protection Low Temperature Coefficient Shutdown Current: 0.5µA Thermal Shutdown Space Saving Packages: SOT-23, SOT-89, SC70 and DFN1.6x1.6 Pb-Free Packages  Applications  Cellular Phones      Bluetooth Earphones Digital Cameras Portable Electronics WLANs MP3 Players PAM3101 Document number: DS36419 Rev. 3 - 3 1 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Applications Circuit Pin Configuration and Description Package Type SOT23-3 SOT23-5 SOT89-3 SOT89-5 SC-70-3L SC70-4L SC70-5L DFN1.6x1.6-6L Pin Name VIN GND VOUT EN BYP NC Pin Number 1 2 3 4 5 6 GND VIN VOUT VIN VIN GND VOUT VOUT VIN EN VIN EN VOUT VIN — — — VOUT GND — — — GND VIN — — — GND EN BYP VOUT — GND EN NC VOUT — VIN VOUT — — — GND VIN — — — GND NC EN VIN — VOUT GND — — — GND VOUT VIN — — GND EN BYP VOUT — NC VIN VOUT NC GND Function Input Ground Output Chip Enable (active high) PAM3101BABXXX----EN default floating Other part no----EN default pull high Bypass Pin, need a 10nF capacitor connect to GND No Connection PAM3101 Document number: DS36419 Rev. 3 - 3 2 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Functional Block Diagram Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.) These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. All voltages are with respect to ground. Parameter Input Voltage Output Current Output Pin Voltage Lead Soldering Temperature Storage Temperature ESD Rating Rating 6.0 300 Unit V mA GND -0.3 to VIN +0.3V V 300, (5sec) -65 to +150 Class B °C °C — Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.) Rating Unit Supply Voltage Range Parameter 2.5 to 5.5 V Junction Temperature -40 to +125 Operation Temperature -40 to +85 PAM3101 Document number: DS36419 Rev. 3 - 3 3 of 25 www.diodes.com °C May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Thermal Information Parameter Symbol θJC Thermal Resistance Junction to Case) θJA Thermal Resistance (Junction to Ambient) Internal Power Dissipation (@TA = +25°C) PD Package Max SOT23 130 SOT-89 100 SC70 160 DFN1.6x1.6 65 SOT23 250 SOT-89 180 SC70 300 DFN1.6x1.6 175 SOT23 400 SOT-89 550 SC70 300 DFN1.6x1.6 570 Unit °C/W mW Electrical Characteristics (@TA = +25°C, VCE1 = VCE2 = VIN = VO +1V, CIN = 2.2µF, CO = 2.2µF, unless otherwise specified.) Parameter Symbol Test Conditions Input Voltage VIN — Output Voltage VO IO = 1mA Output Current IO Dropout Voltage VDROP Ground Current IGND Quiescent Current Line Regulation Load Regulation IQ LNR LDR IO = 300mA Min Typ Max Note 1 — 5.5 Units V -2 — +2 % 300 — Note 2 mA VO = 1.5V — 1150 1400 VO = 1.8V — 850 1100 2.5V ≤ VO < 3.3V — 370 450 VO ≥ 3.3V mV — 180 230 IO = 1mA to 300mA — 70 90 µA IO = 0mA — 65 90 µA IO = 1mA, VO < 2V, VIN = 2.8V to 3.8V -0.15 0.10 0.15 IO = 1mA, 2V ≤ VO < 3.3V, VIN = VO +0.5V to VO +1V -0.10 0.03 0.10 IO = 1mA, VO ≥ 3.3V, VIN = VO +0.5V to VO +1V -0.4 0.2 0.4 %/V IO = 1mA to 300mA, VO ≥ 2V -2 1 +2 % 30 60 mV IO = 1mA to 300mA, VO < 2V — TC IO = 1mA — 40 — ppm/°C Over Temperature Shutdown OTS IO = 1mA — 150 — °C Over Temperature Hysteresis OTH IO = 1mA — 30 — °C f = 100Hz — 70 — f = 1kHz — 65 — Temperature Coefficient Power Supply Ripple Rejection PSRR IO = 100mA CBYP = 10nF VO = 3.3V dB Output Noise VN f = 10Hz to 100kHz, CBYP = 10nF — 50 — µVRMS CE Input High Threshold VTH VIN = 2.5V to 5V 1.5 — — V CE Input Low Threshold VTL VIN = 2.5V to 5V — — 0.3 V Shutdown Current ISD VEN = 0V — 0.01 1 µA Notes: 1. The minimym input voltage (VIN(MIN) of the PAM3101 is determined by output voltage and dropout voltage. The minimum input voltage is defined as: VIN(MIN) = VO +VDROP 2. Output current is limited by PD, maximum IO = PD/(VIN(MAX) – VO). PAM3101 Document number: DS36419 Rev. 3 - 3 4 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 5 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (cont.) (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 6 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (cont.) (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 7 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (cont.) (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 8 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (cont.) (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 9 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Typical Performance Characteristics (cont.) (@TA = +25°C, VEN = VIN, CIN = 1µF, CO = 2.2µF, CBYP = 10nF unless otherwise specified.) PAM3101 Document number: DS36419 Rev. 3 - 3 10 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Application Information Capacitor Selection and Regulator Stability Similar to any low dropout regulator, the external capacitors used with the PAM3101 must be carefully selected for regulator stability and performance. A capacitor CIN of more than 1μF can be employed in the input pin, while there is no upper limit for the capacitance of CIN. Please note that the distance between CIN and the input pin of the PAM3101 should not exceed 0.5 inch. Ceramic capacitors are suitable for the PAM3101. Capacitors with larger values and lower ESR (equivalent series resistance) provide better PSRR and line-transient response. The PAM3101 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is >2.2μF with ESR>5mΩ ensures stability. A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series connection with an internal 200kΩ resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will slightly decrease the output noise, but increase the start-up time. Load Transient Consideration Curve 10 of the PAM3101 load-transient response on page 10 shows two components of the output response: a DC shift from the output impedance due to the load current change and transient response. The DC shift is quite small due to excellent load regulation of the PAM3101. The transient spike, resulting from a step change in the load current from 1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to the transient spike. A larger capacitance with smaller ESR results in a smaller spike. Shutdown Input Operation The PAM3101 is shut down by pulling the EN input low, and is turned on by tying the EN input to VIN. Internal P-Channel Pass Transistor The PAM3101 features a 0.75Ω P-Channel MOSFET device as a pass transistor. The PMOS pass transistor enables the PAM3101 to consume only 65μA of ground current during low dropout, light-load, or heavy-load operations. This feature increases the battery operation life time. Input-Output (Dropout) Voltage A regulator's minimum input-output voltage difference (or dropout voltage) determines the lowest usable supply voltage. The PAM3101 has a typical 300mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage. Current Limit and Short Circuit Protection The PAM3101 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to 400mA by regulating the gate voltage. The PAM3101 also has a built-in short circuit current limit. Thermal Considerations Thermal protection limits power dissipation in the PAM3101. When the junction temperature exceeds +150°C, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below +120°C. For continuous operation, the junction temperature should be maintained below +125°C. The power dissipation is defined as: PD  VIN  VOUT  * IO  VIN * IGND The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula:   PD(MAX )  TJ(MAX )  TA / JA Where TJ(MAX) is the maximum allowable junction temperature +125°C , TA is the ambient temperature and θJA is the thermal resistance from the junction to the ambient. PAM3101 Document number: DS36419 Rev. 3 - 3 11 of 25 www.diodes.com May 2016 © Diodes Incorporated NOT RECOMMENDED FOR NEW DESIGN USE AP2125/2127 PAM3101 Application Information (cont.) For example, as θJA is 250°C/W for the SOT-23 package and 180°C/W for the SOT-89 package based on the standard JEDEC 51-3 for a singlelayer thermal test board, the maximum power dissipation at TA +25°C can be calculated by following formula: PD(MAX )  125C  25C / 250  0.4W SOT-23 PD(MAX )  125C  25C / 180  0.55W SOT-89 It is also useful to calculate the junction temperature of the PAM3101 under a set of specific conditions. Suppose the input voltage VIN = 3.3V, the output current IO = 300mA and the case temperature TA = +40°C measured by a thermalcouple during operation, the power dissipation for the VO = 2.8V version of the PAM3101 can be calculated as: PD  3.3V  2.8V  * 300mA  3.3V * 70A  150mW And the junction temperature, TJ can be calculated as follows: TJ = TA + PD*θJA TJ = 40°C +0.15W*250°C/W = 40°C +37.5°C = 77.5°C