PI2PCIE2442ZHEX

PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Features Description • • • • • • • • Pericom Semiconductor’s PI2PCIE2442 is a differential exchange switch featuring pass-through pinout. It supports two full PCI Express lanes operating at 5.0Gbps PCIe® 2.0 performance. 8 Differential Channel (2-lane) Exchange Switch PCI Express® 2.0 performance, 5.0 Gbps Low Bit-to-Bit Skew: 10ps (between +/- signals) Low Crosstalk: -28dB @ 2.5 GHz (5Gbps) Low Insertion Loss: -2.1dB @ 2.5 GHz (5Gbps) VDD Operating Range: +1.5V to +1.8V ±10% ESD Tolerance: 2kV HBM Packaging: 42-contact TQFN (ZH42) With the select control input low, Port A connects to Port B, and Port C connects to port D for an 8-channel differential pass-though. When the select control input is high Port A connects to Port D, and Port B connects to Port C. Truth Table Function SEL OE# Ax = Bx Cx = Dx L 0 Ax = Dx Cx =Bx H 0 Ax, Bx, Cx, DX = Hi-Z x 1 C3+ C3- 14-0034 1 GND A1+ 5 34 B1+ A1- 6 33 B1- C1+ 7 32 D1+ 31 D1- 30 VDD 39 D0- 40 D0+ 35 42 36 4 C1- 8 SEL 9 A2+ 10 29 B2+ A2- 11 28 B2- C2+ 12 27 D2+ C2- 13 26 D2- A3+ 14 25 B3+ A3- 15 24 B3- C3+ 16 23 D3+ 22 D3- C3- D3+ D3- VDD VDD B3+ B3- 3 C0- 17 GND 21 A3+ A3- D2+ D2- C0+ GND C2+ C2- B2+ B2- B0- 20 A2+ A2- D1+ D1- B0+ 37 VDD C1+ C1- B1+ B1- 38 2 19 A1+ A1- D0+ D0- 1 A0- GND C0+ C0- A0+ 18 A0+ A0- B0+ B0- VDD OE# SEL OE# Pin Diagram 41 Block Diagram www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Pin Description Pin # 1 2 5 6 10 11 14 15 38 37 34 33 29 28 25 24 3 4 7 8 12 13 16 17 36 35 32 31 27 26 23 22 Pin Name A0+ A0– A1+ A1– A2+ A2– A3+ A3– B0+ B0− B1+ B1− B2+ B2− B3+ B3− C0+ C0– C1+ C1– C2+ C2– C3+ C3− D0+ D0− D1+ D1− D2+ D2− D3+ D3− I/O Description I/O Signal I/O, Channel 0, Port A I/O Signal I/O, Channel 1, Port A I/O Signal I/O, Channel 2, Port A I/O Signal I/O, Channel 3, Port A I/O Signal I/O, Channel 0, Port B I/O Signal I/O, Channel 1, Port B I/O Signal I/O, Channel 2, Port B I/O Signal I/O, Channel 3, Port B I/O Signal I/O, Channel 0, Port C I/O Signal I/O, Channel 1, Port C I/O Signal I/O, Channel 2, Port C I/O Signal I/O, Channel 3, Port C I/O Signal I/O, Channel 0, Port D I/O Signal I/O, Channel 1, Port D I/O Signal I/O, Channel 2, Port D I/O Signal I/O, Channel 3, Port D 41 OE# I 9 SEL I 18, 20, 30, 40, 42 19, 21, 39, Center Pad VDD Pwr Output Enable, active low. When OE# = 0 the device I/O is enabled. When OE#=1, all I/O are high impedance Operation mode Select (when SEL=0: A→B, C→D, when SEL=1: A→D, C→B) 1.5V to 1.8V (±0.1V) Positive Supply Voltage GND Pwr Power ground 14-0034 2 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Storage Temperature........................................................ –65°C to +150°C Supply Voltage to Ground Potential.................................... –0.5V to +2.5V DC Input Voltage...................................................................–0.5V to VDD DC Output Current........................................................................... 120mA Power Dissipation............................................................................... 0.5W Power Supply Characteristics Parameters Test Conditions(1) Description IDD Quiescent Power Supply Current Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Min. Typ.(2) VDD = Max., VIN = GND or VDD Max. Units 400 µA Max Units 0.35 x VDD V Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VDD = 1.8V, Ta = 25°C ambient and maximum loading. DC Electrical Characteristics for Switching over Operating Range (TA = –40°C to +85°C, VDD = 1.5V to 1.8V ±10%) Parameter Description Test Conditions Min Typ(1) VIH Input HIGH Voltage, SEL and OE# Guaranteed HIGH level VIL Input LOW Voltage, SEL and OE# Guaranteed LOW level VIK Clamp Diode Voltage, SEL and OE# VDD = Max., IIN = –18mA Input HIGH Current, SEL and OE# VDD = Max., VIN = VDD ±5 Input LOW Current, SEL and OE# VDD = Max., VIN = GND ±5 IIH IIL 0.65 x VDD –0.5 –0.7 –1.2 VO/VI >95%, RL = 10K-Ohms –0.4 2.5 VIDC DC Signal Voltage Range, channel I/O (Ax, Bx, Cx, Dx) VO/VI >80%, RL = 50-Ohms –0.3 1.2 RON Channel On Resistance VDD = Min., VIN = 1.3V, IIN = 40mA Channel On Capacitance VIN = 0, VDD = 1.8V CON(AB) 2.2 µA V 10 Ohm 3.0 pF Note: 1. Typical values are at VDD = 1.8V, Ta = 25°C ambient and maximum loading. 14-0034 3 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Switching Characteristics (TA= -40º to +85ºC, VDD = 1.5V to 1.8V ±10%) Paramenter Description Min. Typ. Max. tPZH, tPZL Line Enable Time - SEL to AN, BN 0.5 8 tPHZ, tPLZ Line Disable Time - SEL to AN, BN 0.5 8 tb-b Bit-to-bit skew within same differential pair 4 tch-tch Channel-to-channel timing skew 35 Units ns ps Dynamic Electrical Characteristics Over the Operating Range (TA= -40º to +85ºC, VDD = 1.5V to 1.8V ±10%) Parameter Description BW Bandwidth (-3dB) Max Signal Frequency Range VI F 1 dB Compression Input Signal P-1dB RLOSS Return Loss XTALK Crosstalk OIRR OFF Isolation ILOSS Differential Insertion Loss Test Conditions Min. Typ.(1) 3.4 Insertion loss 1.5dB, VIN=0.6Vpp, DC=0V 1.6 Insertion loss 1.5dB, VIN=0.6Vpp, DC=0.9V 1.6 Insertion loss 3dB, VIN=0.6Vpp, DC=0V 3.0 Insertion loss 3dB, VIN=0.6Vpp, DC=0.9V 3.0 RL = 50, f=625MHz, sin wave, DC=0V 1.2 RL = 50, f=625MHz, sin wave, DC=0.45V 2.0 RL = 50, f=625MHz, sin wave, DC=0.9V 2.4 Max. Units GHz GHz Vpp f = 2.5 GHz -18 f = 2.5 GHz –28 f = 100 MHz –60 f = 2.5 GHz –22 f = 100 MHz –55 f = 2.5 GHz -2.1 dB Notes: 1. Guaranteed by design. Typical values are at VDD = 1.8V, TA = 25°C ambient and maximum loading. 14-0034 4 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Crosstalk (VDD = 1.8V, 25°C) Differential Off Isolation(VDD = 1.8V, TA = 25°C) 14-0034 5 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Insertion Loss (VDD = 1.8V, 25°C) Differential Return Loss (VDD = 1.8V, 25°C) 14-0034 6 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch + BALANCED PORT1 – + BALANCED – PORT2 BALANCED PORT1 + – + 50 – 50 BALANCED PORT1 BALANCED PORT2 BALANCED PORT2 + – DUT + + 50 – – 50 + + 50 – – 50 DUT Diff. Insertion Loss and Return Test Circuit Diff. Off Isolation Test Circuit Test Circuit for Electrical Characteristics(1-5) 200-Ohm VIN D.U.T VOUT 4pF CL RT Diff. Near End Xtalk Test Circuit Switch Positions 2 x VDD VDD Pulse Generator DUT Test Switch tPLZ, tPZL 2 x VDD tPHZ, tPZH GND Prop Delay Open 200-Ohm Notes: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator 3. Output 1 is for an output with internal conditions such that the output is low except when disabled by the output control. output 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 4. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns. 5. The outputs are measured one at a time with one transition per measurement. Switching Waveforms VDD SEL VDD/2 VDD/2 0V Output tPZL tPLZ VDD/2 VOH VOL +0.3V tPHZ tPZH VOH –0.3V VDD/2 VOL VOH VOL Output Voltage Waveforms Enable and Disable Times 14-0034 7 www.pericom.com 03/25/14 PI2PCIE2442 PCI Express® 2.0, 2-lane Exchange Switch Packaging Mechanical: 42-Contact TQFN (ZH) Notes: 1. All dimensions are in millimeters. Angles in degrees. 2. Coplanarity applies to the exposed pad as well as the terminals. 3. Refer JEDEC MO-220. 4. Recommended land pattern is for reference only. 5. Thermal pad soldering area DATE: 11/14/12 DESCRIPTION: 42-contact Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH42 DOCUMENT CONTROL #: PD-2035 REVISION:D 12-0529 • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code PI2PCIE2442ZHEX Package Code Package Description ZH 42-contact, Thin Fine Pitch Quad Flat No-Lead (TQFN) Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Lead-free and green 2. X suffix = tape and reel Pericom Semiconductor Corporation •  1-800-435-2336 •  www.pericom.com 14-0034 All trademarks are property of their respective owners. 8 www.pericom.com 03/25/14