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PI3EQXDP1201ZBE

PI3EQXDP1201ZBE

  • 厂商:

    BCDSEMI(美台)

  • 封装:

    48-VFQFN裸露焊盘

  • 描述:

    Buffer, ReDriver 4 Channel 5.4Gbps 48-TQFN (7x7)

  • 数据手册
  • 价格&库存
PI3EQXDP1201ZBE 数据手册
COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with Aux Listener/AutoTest mode Features Description ÎÎCompliant with VESA DisplayPort 1.2 specification PI3EQXDP1201 provides the ability to reduce signal jitter by transmission line effects to enable longer cable length on the 5.4Gbps DisplayPort1.2 signals. Integrated AUX decoder can support Displayport link training. It can decipher the link training message and automatically configure Displayport differential signal outputs with the best pre-emphasis and output swing level settings. Input Equalization, Output level swing and pre-emphasis are controlled by either Aux link snooping or pin configuration. Decoding of the Aux command happens during link training. Built-in Sync Request Auto Test mode enables users to complete DisplayPort link status through Aux channels in minutes. PI3EQXDP1201 is intended for use in any systems, DP signal compliance is required, including notebook PC and docking stations, Graphic cards and digital video systems. LE TE for HBR2, HBR, RBR rate (5.4/2.7/1.62Gbps) ÎÎDual mode DisplayPort Outputs by providing DDC signals across the Aux sink pin ÎÎBuilt-in Aux interception circuit only listen to the link training, but does not affect link training ÎÎSink Request Auto Test Mode through Aux Channels ÎÎDynamic EQ through Aux configuration register programming for deterministic jitter reduction ÎÎCable Detection pins, toggle between DP and TMDS mode ÎÎAutomatic power down state when HPD signal is low ÎÎLow insertion loss across the Aux signal path ÎÎDedicated pin control mode for Equalization setting control ÎÎInternally Biased AC coupled in Aux channel ÎÎSingle Power Supply: 3.3V ÎÎIntegrated ESD protection ÎÎPackage : 48-pin TQFN, 7mm x 7mm O Applications ÎÎNotebook and Dock station ÎÎPC system boards BS ÎÎDigital video systems DP++ Source Device 5-10” trace length recommended DP Mux DP Redriver Functional Block Diagram IN1P/N IN2P/N Equalizer Pre-Emphasis IN3P/N HPD_SRC ENABLE CNTRL CAD_SRC AUX_SRC SCL/SDA 15-0021 OUT0P/N IN0P/N Connector O Typical Application 1 OUT1P/N OUT2P/N OUT3P/N Control Logic & Configuration Registers Aux Listener, Aux Pass-through, DDC pass-through Blocks HPD_SNK CAD_SNK AUX_SNK www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode 37 IN0P 38 IN0N EQ 39 IN1P 41 IN1N 42 DNC 43 IN2P 44 IN2N OC_0 45 46 IN3P 47 IN3N 48 V3P3 AUX_SRCN 29 ENABLE GND AUX_SRCP 31 AUX_SNKN V3P3 32 AUX_SNKP SCL_DDC 33 26 27 25 24 GND 23 OUT0P 22 OUT0N 21 DNC 20 OUT1P 19 OUT1N 18 GND 17 OUT2P 16 OUT2N 15 DNC 14 OUT3P 13 OUT3N LE 40 28 30 SDA_DDC 34 35 V3P3 AUTO_EQ TE DNC 36 Package Pinout 6 7 8 9 10 11 12 CNTRL CAD_SRC HPD_SRC CAD_SNK HPD_SNK V3P3 OP_1 OP_0 V3P3 5 4 3 2 DNC OC_1 O V3P3 BS 1 O GND 15-0021 2 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Pin Description Pin # Pin Name Pin Type Description 1 V3P3 Power 3.3V +/10% Power rail 2 DNC NC 3 OC_1 Input Swing control bit 1. Pulled-up internally with 100kOhm See truth tables for functionality 4 OP_0 Input Pre-emphasis control bit 1. Internally pulled-up with 100kOhm See truth tables for functionality 5 OP_1 Input Pre-emphasis control bit 0. Internally pulled-up with 100kOhm See truth tables for functionality 6 V3P3 Power 3.3V +/-10% Power rail 7 CNTRL Input Configure Output Voltage Swing and Pre-Emphasis (See truth table for functionality) TE Do Not Connect; leave pin floating 8 CAD_SRC LE Cable Adapter Detection from DP connector CAD_SRC = "0" : no cable adapter; enable DP ReDriver mode with AUX listening and link Output training active CAD_SRC = "1" & Installed cable adapter; enable TMDS ReDriver mode and disable AUX interception 9 HPD_SRC Output Hot Plug detect to system DP source. 3.3V CMOS output. 10 CAD_SNK Input 11 HPD_SNK Input 12 V3P3 Power 13 OUT3N Output Lane 3 data negative output 14 OUT3P Output Lane 3 data positive output 15 DNC 16 OUT2N Output Lane 2 data negative output 17 OUT2P Output Lane 2 data positive output 18 GND 19 OUT1N Output Lane 1 data negative output 20 OUT1P Output Lane 1 data positive output 21 DNC 22 OUT0N Output Lane 0 data negative output 23 OUT0P Output Lane 0 data positive output 24 GND Power Ground 25 V3P3 Power 3.3V +/10% Power rail 26 ENABLE Input External Power Down pin "1"=Enable ; "0"=Disable ; Pulled-up internally with 100kOhm 27 AUX_SNKN I/O AUX negative channel connected to DP sink device 28 AUX_SNKP I/O AUX positive channel connected to DP sink device Cable detect from sink side. O Hot Plug Detect from the sink side 200kOhm Pull-down O BS 3.3V +/- 10% Power rail NC Power NC Do Not Connect Ground Do Not Connect continued > 15-0021 3 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Pin Description Pin # Pin Name Pin Type 29 AUX_SRCN I/O AUX negative channel connected to DP source device 30 AUX_SRCP I/O AUX positive channel connected to DP source device 31 GND Power Ground 32 V3P3 Power 3.3V +/10% Power rail 33 SCL_DDC I/O DDC clock channel from source side when CAD_SNK=1 34 SDA_DDC I/O DDC Data channel from source side when CAD_SNK=1 AUTO_EQ Input TE 35 Description Auto EQ Control pin. Enable = “1”, Disable = “0”. This pin is internally pulled up through 100kOhm. EQ-pin (Pin 40) can control Auto EQ mode 0, 1 and 2. V3P3 Power 3.3V +/10% Power rail 37 DNC NC 38 IN0P Input Lane 0 data positive input 39 IN0N Input Lane 0 data negative input 40 EQ Input Be able to configure Fixed EQ setting, when disable Auto-EQ mode (AUTO_EQ pin =“0”). This pin is internally biased to 50% of V3P3. 41 IN1P Input Lane 1 data positive input 42 IN1N Input 43 DNC NC 44 IN2P Input Lane 2 data positive input 45 IN2N Input Lane 2 data negative input LE 36 O Do Not Connect Lane 1 data negative input BS Do Not Connect Output Control pin. See Output Control truth table for functionality 46 OC_0 Input 47 IN3P Input Lane 3 data positive input 48 IN3N Input Lane 3 data negative input Internally pulled-high with 100kOhm O 15-0021 4 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Control Pin Functional Tables Control Pins Normal Mode Test Mode Output Swing Pre-emphasis EQ setting 800mV 0dB Follow Auto EQ & Fixed EQ Table Follow listener Follow listener Follow Auto EQ & Fixed EQ Table 11 400mV 0dB` Pin Control 00 00 400mV 3.5dB Pin Control 00 01 400mV 6dB Pin Control X 00 10 400mV 9.5dB Pin Control 1 X 01 11 600mV 0dB Pin Control 1 X 01 00 600mV 3.5dB Pin Control 1 X 01 01/ 600mV 6dB Pin Control 1 X 11 0dB Pin Control 1 X 11 CNTRL CAD SINK OC_1, OC_0 OP_1, OP_0 0 1 XX XX 0 0 X, X X,X 1 X 00 1 X 1 X 1 TE Mode 10 800mV LE 11 0X/ 800mV 3.5dB Pin Control 1200mV 0dB Pin Control 10 1 X 10 XX Normal Mode Auto EQ mode 0 EQ Auto EQ mode 1 M Fixed Eq. 2.5dB @ 2.7GHz H L BS L Auto EQ mode 2 Auto EQ H Fixed Eq. 5.1dB @ 2.7GHz Fixed Eq. 7.2dB @ 2.7GHz O Normal Mode H H L M L Notes EQ pin is internally biased to ~50% of V3P3 at "M(Middle)" or floating statue. Measured Gains H L 1.62G 2.7G 5.4G Unit L -1.42 -2.01 -2.79 dB M 2.41 3.9 5.16 dB H 6.96 9.28 10.8 dB Auto EQ pin has a internal pull-up. O EQ Setting in Auto EQ Mode Auto EQ mode 0 Auto EQ mode 1 Auto EQ mode 2 PRE-EMPHASIS_SET Bit[4:3] in DPCD registers 1.62G 2.7G 5.4G 1.62G 2.7G 5.4G 1.62G 2.7G 5.4G Unit 00 2.26 2.74 2.49 3.97 5.92 7.3 3.97 7.27 8.69 dB 01 0.34 0.57 0.22 1.44 2.5 3.41 3.21 5.1 6.42 dB 10 -1.42 -2.01 -2.79 0.34 0.57 0.22 1.44 2.5 3.41 dB 11 -2.39 -3.62 -4.71 -1.42 -2.01 -2.79 0.34 0.57 0.22 dB 15-0021 5 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode 00600h Functional Description The AUX listener support Sink request Test sequence. After HPD IRQ event and DP source read 00201h AUX register and if bit 1 is high, the DP source will enter a Sink request test mode and initiate a sequence of AUX read request cycle. During the read cycle, data matching the following registers address are stored in the listener. Intelligent Power Management TE Pericom’s block based design and intelligent detection scheme allow portions, or all of the IC, to be disabled for power savings. For example, in DP mode, if only one or two lanes are active, the other lanes will be automatically powered off. If there is no input video signal the entire IC will be powered down. If there is no monitor detected, Pericom’s PI3EQXDP1201 can also automatically power down the IC. This intelligent power management concept not only saves system power, but also stops the device from outputting useless data or noise when no signal is present at the input of the IC. The power-down mode can also be entered using hard pin ENABLE, or through DPCD register (AUX link training) 00206h ADJUST_REQUEST_LANE0_1 00207h ADJUST_REQUEST_LANE2_3 00218h Test Request 00219h Test link rate 00220h Test Lane count LE DisplayPort AUX Listener Power Down After the read request cycle, the DP source will write 1 to Bit 0 register 00260h if the DP source enters sink request mode, or 1 to Bit 1 of register 00260h if the source declined the sink test request. The data stored in registers 002xx above will override the value set in 00101h to 00106h registers when the sink entered the Sink Test mode. O PI3EQXDP1201 integrates an AUX listener(decoder), which enables the device to receive and decipher all AUX link training data and use this extracted information for its own configuration. The intercepted DPCD data is used to adjust the active lane count, output swing level, output pre-emphasis level, and to manage the device’s D3 power saving state. Sink Test Request Acknowledgement 00260h mode Buffer configuration outputs DP AUX listener will support Native AUX CH Syntax. Mapping of I2C onto AUX CH Syntax is not supported. AUX listener monitors AUX channel from requester and replier for transactions and stored AUX command from requester and reply command from sinks that are related to the link settings. AUX listener recovered the clock from AUX data input by cycle counting the synchronization pulse at the beginning of the AUX cycle. In a AUX write request cycle, the AUX address compare the addresses with the following registers’ address, data is extracted and stored into the respective registers when the addresses matches. These registers are set during link training sequence following hot plug detection. xxxxxx00b No action 00100 : 00106h xxxxxx01b Sink Test mode 00206h,00207h,00219h,00220h Override 00100,1,3,4,5,6h register settings xxxxxx10b Sink test mode 00100h : 00106h declined xxxxxx11b Not Legal code 00100h : 00106h O BS AUX Listener Specification 00100h Data Rate Register 00101h LANE_COUNT_SET 00103h TRAINING_LANE0_SET 00104h TRAINING_LANE1_SET 00105h TRAINING_LANE2_SET 00106h TRAINING_LANE3_SET 00260h 15-0021 Sink Test request response 6 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode A complete two way AUX transaction is defined as one of the following 1. AUX write and Sink issue ACK reply From Source Sync From Source Start/Start 4-bit cmd 20-bit 8-bit Pattern 1000 address length Data Stop Sync Start bit 00000000 cmd 20-bit adr 00001000 data = 0 From sink NACK 00010000 Stop Stop AUX listener stores the last transaction in the register to identify the current transaction type. Source side AUX ACK 00201h AUX reply 00201h AUX read 00218h to 0027Fh 8-bit length Data 8-bit data byte M Sink side AUX ACK 00201h.. AUX ACK 00218h to 0027Fh AUX write 00260h Stop AUX write 00260h O 1000 Start bit Start bit AUX reply 00218h 4-bit Sync length LE From Source Start bit 8-bit address Typical AUX Test request handshake sequences with HPD_IRQ Stop 2. AUX write and Sink issue NACK reply For Write transaction: A data byte “M” must follow AUX NACK, “M” indicates the number of data bytes successfully written. When a Source Device is writing a DPCD address not supported by the Sink Device, the Sink Device shall reply with AUX NACK and “M” equal to zero. Sync 20-bit 1001 From Sink NACK From sink ACK Sync 4-bit cmd TE Sync Start bit Enable Test registers If bit0=1, do nothing if bit1=1. Stop BS 3. AUX Read and Sink issue ACK reply For Read transaction: Ready to reply to Read request with data following. DisplayPort receiver may assert a STOP condition before transmitting the total number of requested data bytes when not all the bytes are available. From Source Start bit 4-bit cmd O Sync 1001 20-bit ad- 8-bit dress length Stop From sink ACK Sync Start bit 00000000 Data Stop 4. AUX Read and Sink issue NACK reply For Read transaction: A Sink Device receiving a Native AUX CH read request for an unsupported DPCD address must reply with an AUX ACK and read data set equal to zero instead of replying with AUX NACK. 15-0021 7 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Start up Sequence and Hot Plug Detect (HPD) Usage HPD Detection & Control Circuit State Diagram TE After Power on, HPD_SNK control state machine goes to Low Power state 1 and then state 2, and then monitor HPD_ SNK. At Power on Reset state, low power state 1 and low power state 2, all outputs are HiZ, equalizer is powered down, HPD _SRC is HiZ. At Lower Power Mode State 2, if HPD_SNK is asserted, it will turn output signals active. If output port is active and HPD_SNK = 0, then it will go to a debounce timer and wait for 300ms, if HPD_SNK is still =0, the controller will return to Low Power mode wait state 2. If HPD_SNK is 1 then the controller will return to output port active state. HPD_SNK will pass through HPD _SRC. LE Power On Reset BS O Low Power Mode 1 Wait 2ms Low Power Mode 2 HPDA=1 O Port A active HPDA=0 HPDA=1 Port A wait HPDA=0 15-0021 8 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Maximum Ratings(1) (Above which useful life may be impaired. For user guidelines, not tested.) Note: Storage Temperature.......................................................... –65°C to +150°C 1) Stresses greater than those listed under MAXIMUM RAT- V3P3 I/O supply voltage to ground potential....................... -0.5V to 4.0V INGS may cause permanent damage to the device. This is a stress DC Signal Voltage........................................................ -0.5V to V3P3 +0.5V Power Dissipation Continous...........................................................500mW Operating Temperature............................................................ -40 to +85°C ESD Protection 2 any other conditions above those indicated in the operational TE Current Output...................................................................-25mA to+25mA rating only and functional operation of the device at these or sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2) ESD results are for single supply mode only DC Electrical Characteristics Symbol Parameters V3P3 3.3V Power Supply Control Pin ENABLE LE All Pins, HBM..................................................................................2kV Condition Min. Typ. Max. Units 3.0 3.3 3.6 V 2.4 V3P3 V GND 0.8 V LVTTL input high voltage VIL LVTTL input low voltage IIH Input High-level current VIH=2V to V3P3 -5 5 uA IIL Input Low-level current VIL=GND to 0.8V -50 -15 uA HPD_SRC and HPD_SNK Pins O VIH LVTTL input high voltage 2.4 V3P3 V VIL LVTTL input low voltage 1/3*V3P3 2/3*V3P3 V IIH Input High-level current GND 0.6 uA IIL Input Low-level current  20 40 uA VOH LVTTL high level output voltage IOH=-8mA VOL LVTTL low level output voltage IOL= 8mA BS VIH   2.4 V 0.4 V AUXP/N, SCL/SDA When Configure SCL/SDA pins O IIH Input High-level current  VIH=V3P3 -1   1 uA Input Low-level current When configure as Aux pins  VIL=0 -1   1 uA Vcom Common mode voltage   0   2.0 V VAUX-PP Peak to peak differential voltage 0.19   1.26 V RON On resistance   11 20 Ω BW 3dB Bandwidth IIL 15-0021 Vin = -0.3V to +0.4V ION=-40mA 1 9 dB www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode DC Electrical Characteristics Symbol Parameters Condition Min. Typ. Max. Units mV DP differential Input VID Peak to peak differential input voltage 400   1200 VODO Differential overshoot voltage     15%*V3P3 Differential undershoot voltage Ioff Single end standby current Isc Output short current Differential pk-pk level 1 Vtx diff-lev2 Differential pk-pk level 2 Vtx diff-lev3 Differential pk-pk level 3 Vtx diff-lev4 Differential pk-pk level 4 Pre-emphasis level 0dB Vtx diff = 0.8V 3.5dB (1.5x) Vtx diff = 0.8V 6dB (2x) Vtx diff = 0.8V 9.5dB (3x) Vtx diff = 0.8V   25%*V3P3   10 uA     60 mA 340 400 460 mV 510 600 680 mV 690 800 920 mV 1020 1200 1380 mV LE DP differential Output Vtx diff-lev1     V3P3 TE VODU V3P3 0 0 0 dB 2.8 3.5 4.2 dB 4.8 6 7.2 dB 7.6 9.5 11.4 dB 80 115 150 ps O DP differential output CML driver AC Switching Characteristics Rise and Fall Time 20% to 80 % Tsk(D) Intrapair differential skew 50 ps Tsk(O) Intrapair differential skew 50 ps BS Trise / Tfall Power Consumption Symbol Condition Icc_V3P3 ENABLE = High, HPD_SNK = High 4 DP lanes active, Pre-emphasis = 0dB, Output Swing = 400mV ENABLE = Low Iccq_V3P3 PowerDown_V3P3 15-0021 Typ 5.4Gbps 340 2.7Gbps 310 1.62Gbps 300 Max Units mA 1.4 5 mA ENABLE = High, HPD_SNK = Low 4 20 mA AUX Reg 600h = 02h, ENABLE= High, HPD_SNK = High, CNTRL = Low 5 O Icc_V3P3_SB Min 10 mA www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Measured Output Waveforms As following is shown the actual measured output waveforms on the condition of 5.4Gbps with PRBS27-1 pattern. Auto EQ=High; CAD_Snk=0; HPD=High; OC_1=High; OC_0=OP_0=Low; OP_1=Low; Input Level is 0.6V differential peakpeak with 12-in FR4 Length and 36-in output Coaxial Cable Swing=600mV, Swing=800mV, Preemph=0dB Preemph=0dB Preemph=0dB Swing=400mV, Preemph=3.5dB Swing=600mV, Preemph=3.5dB LE Swing=400mV, Preemphasis=6dB O Swing=800mV, Preemph=3.5dB Swing=400mV, Preemphasis=9.5dB BS Swing=600mV, Swing=1200mV, Preemph=0dB TE Swing=400mV, O Preemph=6dB 15-0021 11 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 2012 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode O LE 1 TE Packaging Mechanical: 48-Contact TQFN (ZBE) Notes: DATE: 03/25/10 DESCRIPTION: 48-Pin, Thin Fine Pitch Quad Flat No-Lead (TQFN) BS PACKAGE CODE: ZB48 DOCUMENT CONTROL #: PD-2080-T REVISION: A Note: For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information Ordering Code Package Code Package Type PI3EQXDP1201ZBE ZB Pb-free & Green, 48-pin TQFN O 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel 15-0021 12 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Related Products Product Description PI3HDX1204-B HDMI2.0 6Gbps ReDriver & Level Shifter PI3DPX1203 DP1.3 8Gbps ReDriver PI3HDX511D/E/F 3.4G HDMI1.4 Redriver for Source application, supporting Dual mode DisplayPort PI3HDX412BD 1:2 Active 3.4Gbps HDMI1.4 compliant Splitter/DeMux/Redriver PI3HDX414 1:4 Active 3.4Gbps HDMI1.4 compliant Splitter/DeMux/Redriver PI3HDX621 2:1 3.4Gbps HDMI1.4 Switch/Re-driver with ARC and Fast Switching support for Sink Application PI3PCIE3242 PCIe 3.0, 1-lane (2-Channel), Differential 2-Lane Exchange (2x2 matrix) switch. 3.3V for Type-C connector PI3WVR12412 Wide Voltage Range DisplayPort™ & HDMI Video Switch PI3VDP12412 4-Lane DisplayPort1.2 Compliant Switch Reference Information LE TE Part Number Description AN PI3EQXDP1201 Design Guideline for DisplayPort Source Application Note O BS O Document 15-0021 13 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Appendix: TE 1. Displayport Compliance Test Report Notebook Docking application example O BS O LE Notebook application example 15-0021 14 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode LE TE 2. Reference Schematics O BS O Dual-mode DP Source Application Diagram with Separate AUX and DDC Channels from Source Dual-mode DP Source Application Diagram with Combined AUX and DDC Channels from Source 15-0021 15 www.pericom.com 02/27/15 COMPANY CONFIDENTIAL PI3EQXDP1201 3.3V, 4-Ch DisplayPort 1.2 Redriver with AUX Listener/AutoTest mode Revision History Changes 2015/2/4 Removed 3.3/1.5V power supply and SMBus option for new design. Please contact Pericom if you need this function support. O BS O LE TE Version 15-0021 16 www.pericom.com 02/27/15
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