PI3VST01ZEEX

PI3VST01 HPD signal Generator for VGA Features Description ÎÎHot Plug Detect Signal Generator for VGA connectors The VGA connector does not have a hot-plug pin to tell the system that a monitor is connected. More recent video standards, such as HDMI and DisplayPort, save power by adding a hot-plug pin which allows graphics outputs to be powered down when a monitor is not connected. ÎÎGenerates hot plug output signal telling system when monitor is present or not ÎÎPower Supply, 3.3V and 5.0V ÎÎESD tolerance on pin 7 is up to +/-4kV contact per IEC61000-4-2 specification Pericom’s PI3VST01 HPD signal generator generates a monitor detection signal from a VGA source connector to tell the VGA source if an external monitor is connected or not. ÎÎ-3dB BW of 1.7GHz (typ) ÎÎ4.75 Ohm On Resistance with 0.5 Ohm flatness (typ) ÎÎLow input/output capacitance (Con = 4.5pF, typ) ÎÎPackaging (Pb-free and Green): PI3VST01 allows notebook makers to shut off the VGA DAC when a monitor is not connected, thus saving 170 mW per DAC. PI3VST01 dissipates only 0.66 mW. àà 8-contact MSOP (U) àà 10-contact TDFN (ZE) The monitor detection scheme within the PI3VST01 will not affect normal operation of the video driver. Block Diagram Pin Configuration-U8 (Top View) V V 5 V BOUT Rref Pin Configuration-ZE10 (Top View) HPD_OUT 10 9 8 NC 7 BOUT 6 Rref 4 5 1 VDD3 3 BIN VSYNC 2 NC HPD_OUT 1 GND VDD5 RREF 12-0303 VDD3 6 Detector HPD_OUT 7 Logic Control 8 VSYNC 4 VSYNC 3 BIN 2 VDD5 BOUT BIN 1 GND 01/04/13 PI3VST01 HPD signal Generator for VGA Pinout Table ZE-10 Pin # U-8 Pin # Pin Name 1 1 GND Ground Ground 2 2 VDD5 Power 5V ± 10% power rail 4 3 BIN I Blue input from VGA source 5 4 VSYNC I Vertical Synchronization signal, internal 250KOhm pulldown 10 8 HPD_OUT O Open drain output, telling the system the status of the external VGA monitor. If VGA monitor is present, this pin will be pulled low. If VGA monitor is not present, this pin will be Hi-z 9 7 VDD3 Power 3.3V ± 10% power rail 7 6 BOUT O Blue output to VGA connector 6 5 Rref I/O Determines IC mode in terms of impedance detection levels. connect to external resistor to GND. Resistor values can be determined by looking at truth table 12-0303 I/O Type Description 2 01/04/13 PI3VST01 HPD signal Generator for VGA Absolute Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Note: VDD3 (Power Supply)……….......……….…..-0.5V to 4.0V Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. VDD5 (Power Supply)..........................................-0.5V to 6V This is a stress rating only and functional operation of the o o Storage Temperature…………........………-55 C to +150 C device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics for Video Switching over Operating Range (TA= –40°C to +85°C, VDD3 = 3.3V±10%, VDD5 = 5.0V±10%) Parameters Description Test Conditions Min. Typ. Max. Switch On-Resistance, BIN to BOUT VDD = Min., 0V ≤ Vinput ≤ 1.2V, Iinput = –40mA - 4.75 5.5 R FLAT(ON) On-Resistance Flatness, BIN to BOUT VDD = Min., Vinput @ 0V and 1.2V, Iinput = –40mA - VIH,VSYNC Input High Voltage, VSYNC 2.4 VIL,VSYNC Input Low Voltage, VSYNC 0 0.5 V VOL,HPD_OUT Output Low Voltage, HPD_OUT IOL=2mA 0 0.4 V IIL Input leakage current, BIN VIN = 0V -1 1 uA IIH Input leakage current, BIN VIN = 3.6V -1 1 uA IOZL Output leakage current, BOUT VOUT= 0V -1 1 uA IOZH Output leakage current, BOUT VOUT = 3.6V -1 1 uA IOZH,HPD_OUT Output Leakage Current, HPD_OUT VOZ =VDD 1 uA RON Units ohm 0.5 1 V Power Supply Characteristics (TA= –40°C to +85°C) Parameters Description IDD3 IDD5 12-0303 Min. Typ. Max. Units Current Consumption for 3.3V Rail, case 75//75 or 150//75 200 400 uA Current Consumption for 5V Rail, case 75//75 or 150//75 0.5 1 uA 3 01/04/13 PI3VST01 HPD signal Generator for VGA Dynamic Electrical Characteristics over Operating Range (TA=-40º to+85ºC, VDD3 =3.3V±10%, GND=0V, VDD5 = 5.0V±10%) Parameters Description OFF Isolation, OIRR BIN to BOUT Test Conditions Min. Typ. Max. Units f = 250MHz - -46 - dB - 2.0 - GHz - 90 - ps Typ. Units Bandwidth –3dB, BW BIN to BOUT Propagation Delay, tPD BIN to BOUT Capacitance (TA = 25°C, f = 1MHz) Parameters Description Test Conditions COFF Capacitance, Switch OFF 2.4 pF CON Switch Capacitance between BIN and BOUT, Switch ON 5.6 pF Applications VGA-DACs in chipsets as well as video chips (MXM, GPU, DP-to-VGA, PCIe, etc.) typically dissipate about 170 mW. The VGA standard does not have a monitor detect feature, so the DAC dissipates power whether the monitor is connected or not. PI3VST01 provides an HPD_OUT signal that detects the presence of a monitor. This HPD_OUT signal can be routed to the chipset, directly, or through an MPU, to turn off the VGA DAC when a monitor is not connected. Using the PI3VST01, the system can save 170 mW when the monitor is not connected. PI3VST01 can also be used to enable automatic switching between two monitors. Another Pericom product, PI3V724 integrates 2 monitor detection circuits with a 1:2 VGA switch and offers both automatic and manual monitor switching. VGA Termination PI3VST01 can support two different termination schemes: 1. Case_75//75: Reverse termination for the monitor is provided by a 75 Ohm resistor at the connector, as per the VESA VSIS specification. 2. Case_150//75: Reverse termination for the monitor is split between a 150 Ohm resistor at the connector and a 150 Ohm resistor at the video DAC, as required by some chipsets. An external resistor must be supplied between the Rref pin and ground to tell the detection circuit which termination scheme is being used. Values for this resistor are shown below. Rref Application Case Supported 330Kohm +/-5% Case _150//75 200Kohm +/-5% Case _75//75 12-0303 4 01/04/13 PI3VST01 HPD signal Generator for VGA Application Schematics In order to ensure accurate color balance, gain and frequency response are matched between the R, G, and B channels using: • 4.7 Ohm resistors in series with the R and G lanes, • 8.2 pF capacitors to ground from the R and G lanes, and • a 2 pF capacitor to ground on the B lane. To pass the VESA VSIS specification, many VGA DACs require series inductors to reduce overshoot and undershoot. A 47 kOhm resistor is used as a pullup for the open-drain HPD_OUT signal from the PI3VST01 to the VGA DAC control. 4.7 uF capacitors should be used to bypass both VDD5 and VDD3. The schematic below illustrates the recommended design for the 150//75 case. 12-0303 5 01/04/13 PI3VST01 HPD signal Generator for VGA The schematic below illustrates the recommended design for the 75//75 case. Total power dissipation of this solution is very small. PI3VST01 power dissipation is 0.66 mW typical, which is a small fraction (