PI49FCT806ATQ

PI49FCT805T PI49FCT2805T PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver Product Features Product Description • • • • • • • Extremely low output skew: 0.5ns Monitor output pin Clock busing with Hi-Z state control TTL input and CMOS output compatible Extremely low static power (1mW, typ.) Hysteresis on all inputs Packages available: – 20-pin 209 mil wide SSOP (H) – 20-pin 300 mil wide SOIC (S) – 20-pin 150 mil wide QSOP (Q) • Device models available on request • Industrial Operation at -40ºC to +85ºC Pericom Semiconductor’s PI49FCT series of logic circuits are produced using the Company’s advanced 0.8 micron CMOS technology, achieving industry leading speed grades. PI49FCT805T/2805T Logic Block Diagram PI49FCT806T Logic Block Diagram The PI49FCT805T and PI49FCT2805T are non-inverting clock drivers. The PI49FCT806T is an inverting clock driver designed with two independent groups of buffers that have Hi-Z state Output Enable inputs (active LOW) with a 1-in, 5-out configuration per group. Each clock driver consists of two banks of drivers, driving five outputs each from a standard TTL-compatible CMOS input. The PI49FCT2805T also features a 25-ohm on-chip resistor for lower noise. OEA OEA 5 INA 5 OA0–4 INA OB0–4 INB 5 INB OA0–4 5 OEB OB0–4 OEB MON MON 1 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin N ame D e s cription O EA, O EB Hi- Z State O utput Enable Inputs (Active LO W) IN A, IN B C lock Inputs O AN, O BN C lock O utputs (PI49FC T805T/PI49FC T2805T) O AN, O BN C lock O utput (PI49FC T806T) MO N Monitor O utput GN D Ground VCC Power PI49FCT805T/2805T Truth Table(1) Inputs OEA, OEB L L H H INA, INB L H L H PI49FCT806T Truth Table(1) Outputs OAN, OBN MON L L H H Z L Z H Inputs OEA, OEB L L H H INA, INB L H L H Outputs OAN, OBN MON H H L L Z H Z L Note: 1. H= High Voltage Level L = Low Voltage Level Z = High Impedance PI49FCT805T/2805T Product Pin Configuration VccA OA0 OA1 OA2 GNDA OA3 OA4 GNDB OEA INA 1 20 2 19 3 18 4 20-Pin 17 5 H, Q, S 16 6 15 7 14 8 13 9 12 10 11 PI49FCT806T Product Pin Configuration VccB OB0 OB1 OB2 GNDB OB3 OB4 MON OEB INB VccA OA0 OA1 OA2 GNDA OA3 OA4 GNDB OEA INA 2 1 20 2 19 3 18 4 20-Pin 17 5 H, Q, S 16 6 15 7 14 8 13 9 12 10 11 VccB OB0 OB1 OB2 GNDB OB3 OB4 MON OEB INB PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................. –65°C to +150°C Ambient Temperature with Power Applied .............................. -40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) ....... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) .... –0.5V to +7.0V DC Input Voltage ..................................................................... –0.5V to +7.0V DC Output Current ............................................................................... 120mA Power Dissipation ................................................................................... 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 5%) Test Conditions(1) Parameters Description Min. Typ(2) 2.4 3.3 Max. Units VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –24.0mA VOL Output LOW Current VCC = Min., VIN = VIH or VIL IOL = 64mA 0.3 0.55 V IOL = 12mA (25Ω) 0.3 0.50 V VIH Input HIGH Voltage Guaranteed Logic HIGH Level VIL Input LOW Voltage Guaranteed Logic LOW Level IIH Input HIGH Current VCC = Max. IIL Input LOW Current IOZH High Impedance IOZL Output Current II Input HIGH Current VCC = Max., VIN =VCC (Max.) VIK Clamp Diode Voltage VCC = Min., IIN = –18mA IOS Short Circuit Current VCC = Max.(3), VOUT = GND VH Input Hysteresis VCC = 5 V V 2.0 V 0.8 V VIN = VCC 1 µA VCC = Max. VIN = GND –1 µA VCC = Max. VOUT = VCC 1 µA VOUT = GND –1 µA 20 µA –0.7 –1.2 V –120 –225 mA –60 200 mV Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) Description Test Conditions Typ Max. Units CIN Input Capacitance VIN = 0 V 6 10 pF COUT Output Capacitance VOUT = 0 V 8 12 pF Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. 3 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units 3 30 µA ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 2.0 mA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open OEA = OEB = GND Per Output Toggling 50% Duty Cycle VIN = VCC VIN = GND 0.15 0.25 mA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fI = 10 MHZ 50% Duty Cycle OEA = OEB = GND Five Outputs Toggling VIN = VCC VIN = GND 7.7 14.0(5) mA VIN = 3.4V VIN = GND 8.0 15.0(5) VIN = VCC VIN = GND 4.3 8.4(5) VIN = 3.4V VIN = GND 4.8 10.4(5) VCC = Max., Outputs Open fI = 2.5 MHZ 50% Duty Cycle OEA = OEB = GND Eleven Outputs Toggling Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 4 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI49FCT805/806T Switching Characteristics over Operating Range 805T/2805T/ 805AT/2805AT/ 805BT/2805BT/ 805CT/2805CT/ 806T 806AT 806BT 806CT Com. Parame te rs Conditions (1) De s cription Com Com. Com M in. M ax. M in. M ax. M in. M ax. M in. M ax. tPLH tPHL Propagation Delay INA to OAN, INB to OBN 1.5 6.5 1.5 5.8 1.5 5.0 1.5 4.5 tPZH tPZL O utput Enable Time O EA to OAN, OEB to OBN 1.5 8.0 1.5 8.0 1.5 8.5 1.5 6.2 tPHZ tPLZ Output Disable Time(4) OEA to OAN, OEB to OBN 1.5 7.0 1.5 7.0 1.5 6.0 1.5 5.0 tSKEW(o)(3) Skew twx two outputs of same package (same transition) tSKEW(p)(3) tSKEW(t)(3) CL = 50pF RL = 500Ω Units ns — 0.7 — 0.5 — 0.4 — 0.4 Skew twx opposite transitions (tPHL- tPLH) of same output — 1.0 — 0.7 — 0.5 — 0.5 Skew twx two outputs of different package at same temperature (same transition) — 1.5 — 1.0 — 1.0 — 1.0 Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew measured at worse cast temperature (max. temp). 4. This parameter is guaranteed but not production tested. Tests Circuits For All Outputs(1) Switch Position VCC 7.0V 500Ω VIN Test Switch Open Drain Disable LOW Enable LOW Closed All Other Inputs Open VOUT Pulse Generator Definitions: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. D.U.T. 50pF RT CL 500Ω 5 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Waveforms Output Skew – tSK(o) Propagation Delay 3V 3V Input Input 1.5V 1.5V 0V tPLHx 0V tPHLx VOH tPHL tPLH Ox VOH Output 1.5V VOL 1.5V tSK(o) tSK(o) VOL VOH Oy 1.5V Enable and Disable Times VOL tPLHy Enable tPHLy Disable 3V OE tSK(o) = | tPLHy – tPLHx | or | tPHLy – tPHLx | 1.5V 0V tPZL Output Normally Low Output High 3.5V 3.5V Switch Closed 3V 1.5V 0.3V tPZH Normally Pulse Skew – tSK(p) tPLZ Input 0V tPHZ Switch Open 0.3V 1.5V VOL tPLH VOH tPHL VOH 1.5V Output 1.5V 0V 0V VOL Package Skew – tSK(t) tSK(p) = | tPHL – tPLH | 3V Input 1.5V 0V tPLH1 tPHL1 VOH Package 1 1.5V Output VOL tSK(t) tSK(t) VOH Package 2 1.5V Output VOL tPLH2 tPHL2 tSK(t) = | tPLH2 – tPLH1 | or | tPHL2 – tPHL1 | 6 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-Pin 209-Mil SSOP (H) 20 .197 .220 5.00 5.60 1 0.09 0.25 .004 .009 .272 .295 6.90 7.50 0.55 .022 0.95 .037 .078 2.00 Max .291 .322 7.40 8.20 SEATING PLANE .002 Min 0.050 .0098 Max. 0.25 .0256 BSC 0.65 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 20-Pin 150-Mil QSOP (Q) 20 .008 0.20 MIN. .150 .157 .008 .013 0.20 0.33 3.81 3.99 Guage Plane .010 0.254 1 Detail A .337 8.56 .344 8.74 .058 REF 1.47 .041 1.04 REF .015 x 45˚ 0.38 .053 1.35 .069 1.75 Detail A .007 .010 SEATING PLANE .016 .050 .025 BSC 0.635 0˚-6˚ .016 .035 0.41 0.89 .004 0.101 .010 0.254 .008 0.203 .012 0.305 0.178 0.254 0.41 1.27 .228 .244 5.79 6.19 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 7 PS7006C 06/27/01 PI49FCT805T PI49FCT2805T/PI49FCT806T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS Buffer/Clock Driver 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 20-Pin 300-Mil SOIC (S) 20 .2914 .2992 7.40 7.60 .010 .029 0.254 x 45˚ 0.737 1 .496 12.60 .511 12.99 .020 0.508 REF .030 0.762 .013 .020 0.33 0.51 0.23 0.32 0.41 .016 1.27 .050 .0926 .1043 2.35 2.65 SEATING PLANE .050 BSC 1.27 .0091 .0125 0-8˚ .0040 .0118 .394 .419 10.00 10.65 0.10 0.30 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS Ordering Information Orde ring Code M arking Code PI49FCT805xTp PI49FCT805Tpx PI49FCT2805xTp PI49FCT2805Tpx PI49FCT806xTp PI49FCT806Tpx Note: x = Speed Grades: “blank”, A, B, C. p = Package Type: H = 209-mil SSOP Q = 150-mil QSOP S = 300-mil SOIC Example: PI49FCT2805ATH = A grade, H pkg marked as PI49FCT2805THA Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 8 PS7006C 06/27/01