PI4IOE5V6408ZTAEX

PI4IOE5V6408 Low-voltage translating 8-bit I2C-bus I/O Expander Features Description                PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 1 January 2018 © Diodes Incorporated PI4IOE5V6408 Pin Configuration Fig 1. UQFN Top View Pin Description Table 1: Pin Description Pin Name Pin No. INT 1 Active-low interrupt output. Connect to VDD(I2C_bus) through a pull-up resistor. VDD(P) P7 P6 P5 P4 P3 P2 ADDR 2 3 4 5 6 7 8 9 RESET 10 P1 P0 SCL SDA 11 12 13 14 15 16 Supply voltage of PI4IOE5V6408 GPIO-port GPIO-port input/output (push-pull design structure). At power on, P7 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P6 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P5 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P4 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P3 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P2 is configured as an input. Address input. Connect directly to VDD(I2C_bus) or ground. Active-low reset input. Connect to VDD(I2C_bus) through a pull-up resistor, if no active connection is used. GPIO-port input/output (push-pull design structure). At power on, P1 is configured as an input. GPIO-port input/output (push-pull design structure). At power on, P0 is configured as an input. Serial clock bus. Connect to VDD(I2C_bus) through a pull-up resistor. Serial data bus. Connect to VDD(I2C_bus) through a pull-up resistor. Supply voltage of I2C bus. Ground VDD(I2C_bus) GND PI4IOE5V6408 Document Number DS40583 Rev 1-2 Description www.diodes.com 2 January 2018 © Diodes Incorporated PI4IOE5V6408 Maximum Ratings Power supply......................................................................................................-0.5V to +4.6V Voltage on an I/O pin (Input / Output ).......................................................-0.5V to +4.0V Input current.....................................................................................................................±20mA Output current on an I/O pin ......................................................................................±50mA Supply current...............................................................................................................±100mA Ground supply current.................................................................................................±100mA Operation temperature............................................................................................... -40~85℃ Storage temperature ................................................................................................-65~150℃ Maximum junction temperature ,T j(max) .................................................................125℃ ESD ( HBM ) ........................................................................................................................2kV Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operating Conditions Table 2: Recommended operating conditions Symbol Parameter 2 VDD(I2C-bus) I C-bus supply voltage Conditions Min. 1.65 Typ. - Max. 3.6 Unit V - 4 V VDD(P) GPIO port supply voltage 1.65 VIN Input voltage on IO pins 0 4 V VOUT Output Voltage 0 VDD(P) V PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 3 January 2018 © Diodes Incorporated PI4IOE5V6408 Static Characteristics VDD(I2C_bus) = 1.8 V to 3.6 V; GND = 0 V; Temp = -40 °C to +85 °C; unless otherwise specified. Typical values are at Temp = 25 °C. Table 3: Static characteristics Symbol Parameter Condition Min. Power supply Typ.[1] Max. Unit - 1.2 1.5 μA - - 300 μA -10 - - 10 10 1.25 μA μA V -0.5 - 0.3 VDD(I2C-bus) V - 3.6 V 5 10 10 mA μA pF - mA 2.1 10 pF - 0.3 VDD(I2C-bus) V - 3.6 V 1 μA 10 pF VDD(I2C_bus) = 1.8 to 3.6 V; Standby mode VI on SDA, ADDR and RESET IDD[2] Supply current = VDD(I2C-bus) or GND; VI on P port = VDD(P) or GND; IO = 0 mA; = inputs; fSCL = 0 kHz VDD(I2C_bus) = 1.8 to 3.6 V; Active mode VI on RESET = VDD(I2C-bus); VI on P port VDD(P) or GND; IO = 0 mA; I/O = inputs; fSCL = 400 kHz, continuous register read IOFF IIN VPOR I/O = Power off leakage current Input leakage current 0 ≤ VIN ≤ VDD(I2C_bus) Power-on reset voltage Input SCL, input/output SDA VIL Low level input voltage VIH High level input voltage IOL IL Ci Low level output current Leakage current Input capacitance VOL= 0.4 V VIN = VDD(I2C_bus) or GND VIN = GND 0.7 VDD(I2C-bus) 20 -10 - Interrupt INT IOL Low level output current Co Output capacitance VOL=0.4V 6 Select inputs ADDR and RESET VIL Low level input voltage VIH High level input voltage IL Input leakage current Ci Input capacitance PI4IOE5V6408 Document Number DS40583 Rev 1-2 -0.5 0.7 VDD(I2C-bus) -1 2.4 www.diodes.com 4 January 2018 © Diodes Incorporated PI4IOE5V6408 Static Characteristics Cont. Symbol I/Os Parameter VIL Low-level input voltage VIH High-level input voltage Condition P0 – P7 Typ.[1] Max. Unit -0.5 - +0.3*VDD( V P) P0 – P7 P port; IOH = -100 μA; VDD(P) = 3.6 V High-level output voltage 0.7*VDD(P) - 4.0 V - - V - - V - - V - - V - - V - - 0.2 0.2 0.2 V V V - - 0.5 V - - 0.45 V VDD(P) 0.2 VDD(P) 0.2 VDD(P) 0.2 VDD(P) = 1.8 V VOH Min. VDD(P) = 4.0 V P port; IOH = -6 mA VDD(P) 0.2 VDD(P) 0.2 VDD(P) = 1.8 V VDD(P) = 3.6 V VOL Low-level output voltage P port; IOL = 100 μA; VDD(P) = 1.8 V VDD(P) = 3.6 V VDD(P) = 4.0 V P port; IOL = 6 mA VDD(P) = 1.8 V VDD(P) = 3.6 V IOL Low-level output current P0 – P7 6.0 - - mA IOH High-level output current -6.0 - - mA IIH[3] High-level input current -50 - 50 μA IIL[3] Low-level input current P0 – P7 P port; VI = VDD(P); VDD(P) = 1.65 V to 4.0 V P port; VI = GND; VDD(P) = 1.65 V to 4.0 V Input/Output -50 - 50 μA - 100 - kΩ - 100 - kΩ Rpu(int) Rpd(int) Internal pull-up resistance Internal pull-down resistance Input/Output Note: [1] Includes all internal circuitry consumption from the VDD(I2C_bus) supply. Does not include the I/O buffers, which are supplied by VDD(P) and are load dependent. [2] IIL and IIH specifications only apply when the outputs are configured with pull-down or pull-up resistors, respectively. Specification value assume VIN ≤ VDD(P) PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 5 January 2018 © Diodes Incorporated PI4IOE5V6408 Dynamic Characteristics Table 4: Dynamic characteristics Symbol fSCL Parameter SCL clock frequency tSU;STA Bus free time between a STOP and START condition Hold time (repeated) START condition Set-up time for a repeated START condition tSU;STO Set-up time for STOP condition tBUF tHD;STA Standard mode I2C Fast mode I2C Fast mode Plus I2C Unit Min Max Min Max Min Max 0 100 0 400 0 1000 kHz 4.7 - 1.3 - 0.5 - μs 4.0 - 0.6 - 0.26 - μs 4.7 - 0.6 - 0.26 - μs 4.0 - 0.6 - 0.26 - μs tVD;ACK[1] Data valid acknowledge time - 3.45 - 0.9 - 0.45 μs tHD;DAT[2] Data hold time 0 - 0 - 0 - ns tVD;DAT Data valid time - 3.45 - 0.9 - 0.45 ns tSU;DAT Data set-up time 250 - 100 - 50 - ns tLOW LOW period of the SCL clock 4.7 - 1.3 - 0.5 - μs tHIGH HIGH period of the SCL clock 4.0 - 0.6 - 0.26 - μs - 300 300 - 120 ns - 1000 300 - 120 ns - 50 - 50 50 ns - 4 - 4 - 4 μs tf tr tSP Fall time of both SDA and SCL signals Rise time of both SDA and SCL signals Pulse width of spikes that must be suppressed by the input filter Interrupt timing tV(INT) Valid time on pin INT Reset timing tw(rst) Reset pulse width 150 - 150 - 150 - ns trst_glitch Reset recovery time[4] 50 150 50 150 50 150 ns trst Reset time - 150 - 150 - 150 ns Note: [1]: tVD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW. [2]: tVD;DAT = minimum time for SDA data out to be valid following SCL LOW. PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 6 January 2018 © Diodes Incorporated PI4IOE5V6408 /RESET Fig 2: Reset Pulse Duration and Input Glitch Rejection Timing Diagram /RESET /INT Fig 3:Reset Pulse Duration and Input Glitch Rejection Timing Diagram /INT Fig 4: Time to INT from Change in Input Default State PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 7 January 2018 © Diodes Incorporated PI4IOE5V6408 PI4IOE5V6408 Block Diagram Block diagram VDD（I2C-BUS） Note: All I/Os are set to inputs at reset. Fig 5: Block diagram PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 8 January 2018 © Diodes Incorporated PI4IOE5V6408 Functional Description a. Device Address Table 5: Device address ADDR B7 ( MSB ) 0 1 1 1 B6 0 0 B5 0 0 B4 0 0 B3 0 1 B2 1 0 B1 1 0 B0 R/W R/W b. Register Map Table 6: Register Map Pointer Register Bits Command bye (hexadecimal ) Register Protocol Power-up default B7 B6 B5 B4 B3 B2 B1 B0 0 0 0 0 0 0 0 1 01h Device ID and Control R/W 1010 0010 0 0 0 0 0 0 1 1 03h I/O Direction R/W 0000 0000 0 0 0 0 0 1 0 1 05h Output State R/W 0000 0000 0 0 0 0 0 1 1 1 07h Output Highimpedance R/W 1111 1111 0 0 0 0 1 0 0 1 09h Input Default State R/W 0000 0000 0 0 0 0 1 0 1 1 0Bh Pull-up/down Enable R/W 1111 1111 0 0 0 0 1 1 0 1 0Dh Pull-up/down Select R/W 0000 0000 0 0 0 0 1 1 1 1 0Fh Input Status R xxxx xxxx 0 0 0 1 0 0 0 1 11h Interrupt Mask R/W 0000 0000 0 0 0 1 0 0 1 1 13h Interrupt Status R/W xxxx xxxx Reserved R/W 02h, 04h, 06h, 08h, 0Ah, 0Ch, OEh, 10h, 12h PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 9 January 2018 © Diodes Incorporated PI4IOE5V6408 c. Register Descriptions i. Register 01h : Device ID and Control     Table 7: Device ID and Control register (address 01h) Bit B7 B6 B5 Name Default ii. B4 0 0 0 B1 Reset interrupt 1 B4 P4 0 B3 P3 0 B2 P2 0 B1 P1 0 B0 P0 0 B4 P4 0 B3 P3 0 B2 P2 0 B1 P1 0 B0 P0 0 Manufacture ID 1 0 B3 B2 Firmware Revision 1 B0 Software reset R/W Register 03h : I/O Direction   Table 8: I/O Direction register (address 03h) Bit B7 B6 B5 Name P7 P6 P5 Default 0 0 0 iii. Register 05h : Output Port Register    Table 9: Output Port Register (address 05h) Bit B7 B6 B5 Name P7 P6 P5 Default 0 0 0 iv. Register 07h : Output High-Impedance    PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 10 January 2018 © Diodes Incorporated PI4IOE5V6408 Table 10: Output High-Impedance Register (address 07h) Bit B7 B6 B5 Name P7 P6 P5 Default 1 1 1 v. B4 P4 1 B3 P3 1 B2 P2 1 B1 P1 1 B0 P0 1 B4 P4 0 B3 P3 0 B2 P2 0 B1 P1 0 B0 P0 0 B4 P4 1 B3 P3 1 B2 P2 1 B1 P1 1 B0 P0 1 B4 P4 0 B3 P3 0 B2 P2 0 B1 P1 0 B0 P0 0 Register 09h : Input Default State    Table 11. Bit Name Default Input Default State Register (address 09h) B7 B6 B5 P7 P6 P5 0 0 0 vi. Register 0bh : Pull-Up/-Down Enable   Table 12. Pull-up/-down Enable Register (address 0Bh) Bit B7 B6 B5 Name P7 P6 P5 Default 1 1 1 vii. Register 0Dh : Pull-Up/-Down Select   Table 13. Pull-up/-down Select Register (address 0Dh) Bit B7 B6 B5 Name P7 P6 P5 Default 0 0 0 viii. Register 0Fh : Input Status Register    PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 11 January 2018 © Diodes Incorporated PI4IOE5V6408 Table 14. Input Status Register (address 0Fh) Bit Name Default B7 P7 X B6 P6 X B5 P5 X B4 P4 X B3 P3 X B2 P2 X B1 P1 X B0 P0 X B4 P4 0 B3 P3 0 B2 P2 0 B1 P1 0 B0 P0 0 B4 P4 X B3 P3 X B2 P2 X B1 P1 X B0 P0 X ix. Register 11h – Interrupt Mask Register    Table 15. Bit Name Default x. Interrupt Mask Register (address 11h) B7 B6 B5 P7 P6 P5 0 0 0 Register 13h – Interrupt Status Register    Table 16. Bit Name Default Interrupt Status Register (address 13h) B7 B6 B5 P7 P6 P5 X X X d. I/O Port e. Power-on Reset PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 12 January 2018 © Diodes Incorporated PI4IOE5V6408 f. Reset Input (RESET) g. Software Reset h. Interrupt output (INT)   PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 13 January 2018 © Diodes Incorporated PI4IOE5V6408 I2C Read /Write Procedures Fig 6. I2C Write Sequence Note : if register is not specified , the master reads from the current register Fig 7. I2C Read Sequence PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 14 January 2018 © Diodes Incorporated PI4IOE5V6408 Application Design-In Information Fig 8. Typical Application Part Marking ZTA Packaging PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 15 January 2018 © Diodes Incorporated PI4IOE5V6408 Packaging Mechanical 16-UQFN (ZTA) Ordering Information Part No. PI4IOE5V6408ZTAEX Package Code ZTA Package 16-Pin, 1.8x2.6 (UQFN) Notes: 1. EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3). Compliant. All applicable RoHS exemptions applied. 2. See http://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, “Green” and Lead-free. 3. Thermal characteristics can be found on the company web site at www.diodes.com/design/support/packaging/ 4. E = Pb-free and Green 5. X suffix = Tape/Reel PI4IOE5V6408 Document Number DS40583 Rev 1-2 www.diodes.com 16 January 2018 © Diodes Incorporated PI4IOE5V6408 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. 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