PI6C49006AE

PI6C49006 Embedded Clock Generator Features Description ÎÎ3.3V supply voltage The new PI6C49006 is a high performance clock generator intended for all kinds of embedded applications, which include Wireless AP & Femtocell BTS, Multi Function Printer, and other PCIe/Networking applications. It is the most cost effective way to generate a high quality, high frequency clock output from a crystal and reference clock. The device can generate 100/125MHz HCSL outputs for PCIe, selectable 33/50/66/100/133 LVMOS clock for network processor and DSP and 25MHz Ethernet clock combination. ÎÎ25MHz XTAL or reference clock input O ÎÎOutput BS àà 4 x PCIe 2.0 100MHz/125MHz clock with spread spectrum support àà (2+2) x selectable 33/50/66/100/133MHz LVCMOS clock with ±10% frequency margin àà 1 x 125MHz LVCMOS clock àà 2 x 25MHz LVCMOS clock àà 1 x 25MHz Differential clock (HCSL type) ÎÎ Packaging (Pb free and Green) àà 48-pin TSSOP (A) LE O Block Diagram 4 PLL Clock Synthesis 2 & Spread Spectrum Crystal Oscillator OutB_(0~1) TE X1/ICL K PCIE(0~3) & Control Circuit 2 OutB_(2~3) X2 FS0 125MHz_Out 0 FS1 2 FS2 25MHz_Out (1~2) FS3 FS4 SCLK SDATA RESET# 25MHz_Out Diff I2C Control Circuit 12-0212 1 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Pin Description 1 48 GND 2 47 VDDA PCIE0N 3 46 PCIE1N PCIE0 4 45 PCIE1 GND 5 44 PCIE2 GND 6 43 PCIE2N VDD 7 42 VDD OutB_0 8 41 PCIE3N OutB_1 9 40 PCIE3 SCLK 10 39 NC SDATA 11 38 NC GND 12 37 GND OutB_2 13 36 FS0 OutB_3 14 35 FS1 VDD 15 34 FS2 VDD 16 33 FS3 GND 17 32 FS4 25M_Out1 18 31 GND 25M_Out2 19 30 125M_Out0 VDD 20 29 VDD 25M_Out Diff+ 21 28 GND_XTAL 25M_Out Diff- 22 27 VDD_XTAL GND 23 26 X2 RESET# 24 25 X1 Pin List Pin Name Pin Type Pin Description 1 VDD Power 3.3V Supply Pin 2 IREF Output Connect to 475 ohm resistor to set HCSL output drive current 3 PCIE0N Output 100/125MHz HCSL output 4 PCIE0 Output 100/125MHz HCSL output 5 GND Power Ground 6 GND Power Ground 7 VDD Power 3.3V Supply Pin 8 OutB_0 Output 33/50/66 MHz selectable LVCMOS output 9 OutB_1 Output 33/50/66MHz selectable LVCMOS output 10 SCLK Input I2C compatible clock 11 SDATA Input I2C compatible data 12 GND Power Ground 13 OutB_2 Output 50/66/100/133 MHz selectable LVCMOS output 14 OutB_3 Output 50/66/100/133 MHz selectable LVCMOS output 15 VDD Power 3.3V Supply Pin All trademarks are property of their respective owners. 12-0212 TE Pin# LE O BS O VDD IREF 2 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Pin List Pin Name Pin Type Pin Description 16 VDD Power 3.3V Supply Pin 17 GND Power Ground 18 25M_Out1 Output 25.MHz LVCMOS output 19 25M_Out2 Output 25MHz LVCMOS output 20 VDD Power 3.3V Supply Pin 21 25M_Out Diff+ Output 25MHz HCSL output, follow matching circuit in Figure 4 22 25M_Out Diff- Output 25MHz HCSL output, follow matching circuit in Figure 4 23 GND Power Ground 24 RESET# Input Power down reset - When low all PLLs are powered down and outputs tristated. SMBus registers are reset to default values X1 Input Crystal input. Integrated 6pF capacitance X2 Output Crystal output. Integrated 6pF capacitance VDD_XTAL Power 3.3V Supply Pin for XTAL GND_XTAL Power Ground for XTAL VDD Power 3.3V Supply Pin 125M_Out0 Output 125MHz LVCMOS output Power Ground Input Frequency select pin for Bank C 25/125MHz LVCMOS output Input Frequency select pin for Bank B 33/50/66/100/133MHz LVCMOS output Input Frequency select pin for Bank B 33/50/66/100/133MHz LVCMOS output Input Frequency select pin for Bank B 33/50/66/100/133MHz LVCMOS output Input Frequency select pin for Bank A 100/125MHz HCSL output 25 26 27 28 29 LE O 30 BS O Pin# GND 32 FS4 33 FS3 34 FS2 35 FS1 36 FS0 37 GND Power Ground 38 NC - Do Not Connect 39 NC - Do Not Connect 40 PCIE3 Output 100/125MHz HCSL output 41 PCIE3N Output 100/125MHz HCSL output 42 VDD Power 3.3V Supply Pin 43 PCIE2N Output 100/125MHz HCSL output 44 PCIE2 Output 100/125MHz HCSL output 45 PCIE1 Output 100/125MHz HCSL output 46 PCIE1N Output 100/125MHz HCSL output 47 VDDA Power Analog Power Supply Pin. See Application Circuit in Figure 5 48 GND Power Ground All trademarks are property of their respective owners. 12-0212 TE 31 3 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Selection Table 1 – 100MHz/125MHz PCIe clock in bank A Selection Table 2 – Spread Spectrum SS1 SS0 SSC FS0 PCIE(0~3) 0 0 No spread 0 100MHz 1 125MHz 0 1 1 1 0 1 Down -0.75% Down -0.5% No spread O Selection Table 3 – 33/50/66/100/133MHz LVCMOS clock in bank B FS2 FS3 OutB_0/1 OutB_2/3 0 0 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 1. Output disable in hardware control mode, internal pull-down 2. Output = 50MHz in software control mode 33M 50M 66M 33M 33M 66M 66M 1. Output disable in hardware control mode, internal pull-down 2. Output = 133MHz in software control mode 66M 100M 133M 50M 100M 50M 100M LE O 0 0 0 1 1 1 1 BS FS1 Selection Table 4 – 25/125MHz LVCMOS/25MHz Diff clock in bank C 125M_Out0 0 Output disable, internal pull-down 125MHz Output disable, internal pull-down 1 NC All trademarks are property of their respective owners. 25M_Out1 25M_Out2 25M_Out Diff 25MHz 25MHz 25MHz 25MHz Output disable, internal pull-down Output disable, internal pull-down Output disable, internal pull-down Output disable, internal pull-down 25MHz Diff 12-0212 4 TE FS4 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator OutB_1 Frequency Margining Table FM2 FM1 FM0 OutB_(2~3) 0 0 0 0 nominal 0 0 0 1 nominal + 1% 0 0 1 0 nominal + 2% 0 0 1 1 nominal + 3% 0 1 0 0 nominal + 4% 0 1 0 1 nominal + 5% 0 1 1 0 nominal + 6% 0 1 1 1 nominal + 8% 1 0 0 0 nominal + 10% 1 0 0 1 nominal - 1% 1 0 1 0 nominal - 2% 1 0 1 1 nominal - 3% 1 1 0 0 nominal - 4% 1 1 0 1 nominal - 6% 1 1 1 0 nominal - 8% 1 1 1 1 nominal - 10% TE LE O BS O FM3 All trademarks are property of their respective owners. 12-0212 5 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Serial Data Interface (SMBus) PI6C49006 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit address and read/write bit as shown below. Address Assignment A6 A5 A4 A3 A2 A1 A0 R/W 1 1 0 1 0 0 1 0/1 O How to Write 8 bits 1 8 bits 1 8 bits 1 8 bits 1 Start bit D2H Ack Register offset Ack Byte Count = N Ack Data Byte 0 Ack Note: 1. BS 1 bit … 8 bits 1 1 bit Data Byte N-1 Ack Stop bit Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0. How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock) 1 bit M: Send "D2h" 1 bit S: sends Ack 8 bits M: send starting databyte location: N 1 bit 1 bit 8 bits 1 bit 8 bits S: sends # of data bytes that will be sent: X 1 bit 8 bits S: sends starting data byte N 1 bit … LE O M: Start bit 8 bits S: sends Ack M: Start bit M: Send "D3h" S: sends Ack M: sends Ack M: sends Ack … 8 bits 1 bit 1 bit S: sends data byte N+X1 M: Not Acknowledge M: Stop bit Byte 0: Spread Spectrum Control Register Description 7 OE for OutB_2 6 5 Enables hardware or software control of OE bits (see Byte 0–Bit 6 and Bit 5 Functionality table) Software RESET# bit. Enables or disables all outputs (see Byte 0–Bit 6 and Bit 5 Functionality table) Type Power Up Condition Output(s) Affected Notes RW 1 50/66/100/133 MHz selectable LVCMOS output 0 = disabled 1 = enabled RW 0 RESET# pin, bit 5 0 = hardware cntl 1 = software ctrl RW 1 All outputs 0 = disabled 1 = enabled OutB_2,3 See OutB_2,3 Frequency Margining Table on Page 5 50/66/100/133 MHz selectable LVCMOS output 0 = disabled 1 = enabled 4 Frequency margining select bit FM3 RW 1 3 2 Frequency margining select bit FM2 Frequency margining select bit FM1 RW RW 0 1 1 Frequency margining select bit FM0 RW 0 0 OE for OutB_3 RW 1 All trademarks are property of their respective owners. 12-0212 6 TE Bit www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Byte 0 - Bit 6 and Bit 5 Functionality Bit 6 0 1 Bit 5 X 0 1 1 Description (RESET# = "H" will enable all outputs; SMBus cannot control each output.) Disables all outputs and tri-states the outputs, RESET# HW pin/signal = DO NOT CARE Enable outputs according to the SMBus default values; SMBus can control each output. RESET# HW pin/signal, FS1, FS2, FS3 and FS4 = DON'T CARE O Byte 1: Control Register Description Type Power Up CondiOutput(s) Affected tion 7 OE for 25M_Out Diff RW 1 25M_Out Diff 6 OE for 25M_Out2 RW 1 25M_Out2 5 OE for 25M_Out1 RW 1 25M_Out1 4 OE for 125_Out0 RW 1 125_Out0 3 OE for OutB_1 RW OutB_1 2 1 Spread Spectrum Selection for 100MHz HCSL PCI Express clocks Bit 1: SS1, Bit 0:SS0 1 OE for OutB_0 RW 1 RW 0 RW 0 Type Power Up CondiOutput(s) Affected tion R Undefined Byte 2: Control Register Bit Description 7 to 0 Reserved LE O 0 BS Bit OutB_0 All 100MHz HCSL PCI Express outputs Notes 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled See Selection Table 2 - Spread Spectrum Notes Not Applicable TE All trademarks are property of their respective owners. 12-0212 7 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Byte 3: Control Register Description Type Power Up Condition Output(s) Affected 7 Reserved RW Undefined Not Applicable 6 Reserved RW 1 Not Applicable 5 Reserved RW 1 Not Applicable 4 OE for 100M_Out3 HCSL Output RW 1 100M_Out3 3 OE for 100M_Out2 HCSL Output RW 1 100M_Out2 2 OE for 100M_Out1 HCSL Output RW 1 100M_Out1 1 OE for 100M_Out0 HCSL Output RW 1 100M_Out0 0 Reserved R Undefined Not Applicable BS O Bit Notes 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled 0 = disabled 1 = enabled Byte 4 & 5: Control Register Bit Description Type Power Up CondiOutput(s) Affected tion 7 to 0 Reserved R Undefined Type Power Up CondiOutput(s) Affected tion R 0 Not Applicable R 0 Not Applicable R R R R R R 0 0 0 0 1 1 Not Applicable Not Applicable Not Applicable Not Applicable Not Applicable Not Applicable Description 7 Revivsion ID bit 3 6 Revivsion ID bit 2 5 4 3 2 1 0 Revivsion ID bit 1 Revivsion ID bit 0 Vendor ID bit 3 Vendor ID bit 2 Vendor ID bit 1 Vendor ID bit 0 All trademarks are property of their respective owners. 12-0212 Notes TE Bit Not Applicable LE O Byte 6: Control Register Notes 8 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Recommended Operation Conditions1 (Over operating free-air temperature range) Symbol Parameters Min. Max. -0.5 4.6 3.3V I/O Supply Voltage VIH Input High Voltage VIL Input Low Voltage -0.5 Ts Storage Temperature -65 VESD ESD Protection 2000 BS O VDD Units 4.6 V 150 °C V Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics LE O Maximum Supply Voltage, VDD............................................................... 7V All Inputs and Outputs................................................. –0.5V to VDD +0.5V Ambient Operating Temperature............................................ 0°C to +70°C Storage Temperature......................................................... –65°C to +150°C Junction Temperature.........................................................................125°C Peak Soldering Temperature..............................................................260°C Unless otherwise specified, VDD=3.3V±5%, Ambient Temperature 0°C to +70°C Parameter Input Low Voltage Operating Supply Current IDD at Output Disable Condition Internal Pull-Up/PullDown Resistor VDD VDDA VIH VIL VIH VIL Conditions Min SDATA, SCLK, FS4 SDATA, SCLK, FS4 All trademarks are property of their respective owners. 3.135 3.465 3.135 2 –0.3 0.7VDD 3.465 VDD 0.8 VDD 197 V 230 4.3 RESET# 216 All single-ended outputs 75 All input pins 6 k–Ohm pF 470 12-0212 Units mA RESET# = 0 Input Capacitance CIN Pin FS4 External PullRFS4Ext Up/Pull-Down Resistor Max 0.3VDD IDD RPU/RPD Typ TE Operating Supply Voltage Analog Supply Voltage Input High Voltage Input Low Voltage Input High Voltage Symbol 9 Ohm www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Electrical Characteristics - Single-Ended Unless otherwise specified, VDD=3.3V±5%, Ambient Temperature 0°C to +70°C Parameter Symbol Input Clock Frequency FIN Conditions Min Typ 25 SCLK Frequency 400 100 tr, tf FM0, FM3 = 0 0 20% to 80% 1 2 ns 50 57 % Measured at VDD/2 45 BS IOH = -4mA VDD-0.4 VOH IOH = -8mA 2.4 VOL IOL = 8mA Clock Stabilization Time from Power Up ppm V 0.4 125MHz clock output 33/50/66/100/133MHz clock output 25MHz clock output 140 200 125 175 115 150 120 175 120 160 120 160 LE O Cycle-to-Cycle Jitter kHz ns VOH Peak-to-Peak Jitter Units MHz 100 O Minimum Pulse Width of RESET# Input Output Frequency Error Output Rise/Fall Time Output Clock Duty Cycle High-Level Output Voltage High-Level Output Voltage Low-Level Output Voltage Max 125MHz clock output 33/50/66/100/133MHz clock output 25MHz clock output 3 10 ps ms TE All trademarks are property of their respective owners. 12-0212 10 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Electrical Characteristics - 100MHz Differential HCSL Outputs Unless otherwise specified, VDD=3.3V±5%, Ambient Temperature 0°C to +70°C Parameter Symbol Conditions Min Typ Output Frequency Cycle-to-Cycle Jitter O PCIe 2.0 RMS Phase Jitter JRMS2.0 100 MHz ps Using PCIe jitter measurement method 86 PCIe 2.0 Test Method @ 100MHz Output 3.1 ps 0 % Spread Modulation Percentage -0.5 BS Spread Modulation Frequency 32 Duty Cycle TDC SE Rise/Fall Time Measured from 0.175V to 0.525V Tor , Tof 1. R L=50-Ohm with CL = 2pF 2. Single-ended waveform Output Skew TOSKEW VT = 50%(measurement threshold) High-Level Output Voltage VOH Low-Level Output Voltage VOL IOH @ 6*IREF IOH Absolute Crossing Point Voltage VCROSS Variation of VCROSS over all rising clock edges VCROSS Delta Average Clock Period Accuracy TPERIOD AVG Note 3, 9, 10 –300 Absolute Period (including jitter and spread spectrum) TPERIOD ABS Note 3, 7 9.847 45 kHz 50 175 LE O Note 2, (RS=33-Ohm, RT=50-Ohm) 0.65 Note 2, 5, 6 0.71 700 ps 200 ps 0.95 V 0 0.05 –13 –14.2 –19 mA 0.55 V 140 mV 0.25 11 % –0.20 Note 2, 5, 8 12-0212 55 TE All trademarks are property of their respective owners. Units 150 TCC/Jitter Peak-to-Peak Phase Jitter Max 2800 ppm 10.203 ns www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Notes: 1. Measured at the end of an 8-inch trace with a 5pF load. 2. Measurement taken from a single-ended waveform. 3. Measurement taken from a differential waveform. 4. Measured from -150 mV to +150 mV on the differential waveform. The signal is monotonic through the measurement region for rise and fall time. The 300 mV measurement window is centered on the differential zero crossing. 5. Measured at crossing point where the instantaneous voltage value of the rising edge of 100M+ equals the falling edge 100M–. O 6. Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing points for this measurement. 7. Defines as the absolute minimum or maximum instantaneous period. This includes cycle-to-cycle jitter, relative PPM tolerance, and spread spectrum modulation. 8. Defined as the total variation of all crossing voltages of rising 100M+ and falling 100M–. 9. Refer to section 4.3.2.1 of the PCI Express Base Specification, Revision 1.1 for information regarding PPM considerations. BS 10. 10) PPM refers to parts per million and is a DC absolute period accuracy specification. 1 PPM is 1/1,000,000th of 100 MHz exactly or 100 Hz. For 300 PPM there is an error budget of 100Hz/PPM * 300 PPM = 30 kHz. The period is measured with a frequency counter with measurement window set at 100 ms or greater. With spread spectrum turned off the error is less than ±300 ppm. With spread spectrum turned on there is an additional +2500 PPM nominal shift in maximum period resulting from the -0.5% down spread. TE LE O All trademarks are property of their respective owners. 12-0212 12 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Application Notes Crystal circuit connection The following diagram shows PI6C49006 crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1= 18pF, C2= 18pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts. Crystal Oscillator Circuit O C1 18pF Crystal�(CL�=�18pF) BS SaRonix-eCera CG2500003 XTAL_IN XTAL_OUT C2 18pF Pericom recommends: LE O Recommended Crystal Specification a) GC2500003 XTAL 49S/SMD(4.0 mm), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/GC_GF.pdf b) FY2500081, SMD 5x3.2(4P), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf c) FL2500047, SMD 3.2x2.5(4P), 25M, CL=18pF, +/-20ppm, http://www.pericom.com/pdf/datasheets/se/FL.pdf TE All trademarks are property of their respective owners. 12-0212 13 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator Configuration test load board termination for HCSL Outputs Rs 33Ω 5% PI6C49006 O TLA Rs 33Ω 5% Clock# TLB Rp 49.9Ω 1% BS 475Ω 1% Clock 2pF 5% 2pF 5% Rp 49.9Ω 1% Figure 4. Configuration Test Load Board Termination LE O 3.3V ± 5% VDD 5.1ohm 0.1μF TE VDDA 0.1μF 10μF Figure 5. Power Supply Filter All trademarks are property of their respective owners. 12-0212 14 www.pericom.com P-0.1 07/02/12 PI6C49006 Embedded Clock Generator DOCUMENT CONTROL NO. PD - 1501 48 REVISION: G DATE: 03/09/05 .236 .244 6.0 6.2 See Note 4 O 1 .488 12.4 .496 12.6 See Note 3 1 BS .047 1.20 Max X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .004 0.09 .008 0.20 0.45 .018 0.75 .030 .002 .006 0.05 0.15 .007 .010 .0197 BSC 0.50 SEATING PLANE 0.17 0.27 .319 BSC 8.1 LE O Note: 1. Controlling dimensions in millimeters. 2. Ref: JEDEC MO-153F/ED 3. Dimension does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and gate burrs shall not exceed 0.15mm per side. 4. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • www.pericom.com DESCRIPTION: 48-Pin 240-Mil Wide TSSOP PACKAGE CODE: A Note: • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php TE Ordering Information(1-3) Ordering Code Package Code PI6C49006AE A Package Description 48-pin, Pb-free & Green, TSSOP, (A48) Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336  •  www.pericom.com All trademarks are property of their respective owners. 12-0212 15 www.pericom.com P-0.1 07/02/12