PI6C49015
Embedded Clock Generator
Features
Description
ÎÎ3.3V ±10% supply voltage
The PI6C49015 is a high performance networking clock
generator which generates PCIe 2.0 Compliant 100MHz HCSL
clock signals along with two LVCMOS 25MHz clock from either
25MHz crystal or reference input. This integrated solution is
ideal for Networking, Embedded systems and other systems that
require PCIe 1.0 and 2.0 HCSL signals and 25MHz clocks yet
small foot print.
ÎÎ25MHz XTAL or reference clock input
ÎÎFive PCIe® 2.0 Compliant 100MHz selectable HCSL outputs
with -0.5% spread
– default is spread off
ÎÎTwo 25MHz LVCMOS output
ÎÎIndustrial temperature range: -40°C to 85°C
ÎÎ Packaging (Pb free and Green)
Applications
àà TSSOP 28 (L)
ÎÎNetworking systems
ÎÎEmbedded systems
ÎÎOther
Block Diagram
systems
Pin Configuration
IREF
X1/REFIN
Crystal
Ocillator
X2
PLL Clock Synthesis
& Spread Spectrum
& Control Circuit
GND0_100M
100M_Q4100M_Q4+
100M_Q0100M_Q0+
100MHz
100M_Q3100M_Q3+
100M_Q1+
100M_Q1-
Q_25M
SCLK
SDATA
GND_25M
25M_OUT1
VDDA
GNDA
VDDO_100M
VDDO_100M
25M_OUT2
VDD_25M
GND_XTAL
GNDO_100M
100M_Q2+
100M_Q2-
5
2
SCLK
SDATA
475 Ohm
IREF
12-0168
O
VDD_XTAL
X2
PDRESET
X1
1
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PI6C49015
Embedded Clock Generator
Pin Description
Pin #
1
2
3
4
5
6
7
8
Pin Name
IREF
100M_Q4100M_Q4+
100M_Q3100M_Q3+
SCLK
SDATA
GND_25M
Pin Type
Output
Output
Output
Output
Output
Input
I/O
Power
9
25M_OUT1
Output
10
25M_OUT2
Output
11
VDD_25M
Power
Pin Description
Connect to 475-Ohm resistor to set HCSL output drive current
100MHz HCSL output
100MHz HCSL output
100MHz HCSL output
100MHz HCSL output
SMBus compatible input clock. Supports fast mode 400 kHz input clock
SMBus compatible data line
Ground for 25MHz output
25MHz LVCMOS output. When disabled, output is trisated and has a normal
110kOhm pull-down
25MHz LVCMOS output. When disabled, output is trisated and has a normal
110kOhm pull-down
3.3V supply for 25MHz output
12
GND_XTAL
Power
Ground for XTAL
13
PDRESET
Input
14
15
16
X1
X2
VDD_XTAL
Input
Output
Power
Power on reset, when low all PLLs are powered down and output trisated. SMBus
registers are reset to default values
Crystal input. Integrated 6pf capacitance
Crystal output. Integrated 6pf capacitance
3.3V supply for XTAL
17
100M_Q2-
Output
100MHz HCSL output
18
19
20
21
22
23
24
100M_Q2+
GNDO_100M
VDDO_100M
VDDO_100M
GNDA
VDDA
100M_Q1-
Output
Output
Power
Power
Power
Power
Output
100MHz HCSL output
Ground for 100MHz output buffer
3.3V supply for 100MHz output buffer
3.3V supply for 100MHz output buffer
Ground for 100MHz related PLL
3.3V supply for 100MHz related PLL
100MHz HCSL output
25
100M_Q1+
Output
100MHz HCSL output
26
27
28
100M_Q0+
100M_Q0GNDO_100M
Output
Output
Power
100MHz HCSL output
100MHz HCSL output
Ground for 100MHz output buffer
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PI6C49015
Embedded Clock Generator
Serial Data Interface (SMBus)
PI6C49015 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit address and read/write bit as shown below.
Address Assignment
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
0
0
1
0/1
How to Write
1 bit
8 bits
1
8 bits
1
8 bits
1
8 bits
1
Start
bit
d2H
Ack
Register
offset
Ack
Byte
Count = N
Ack
Data Byte
0
Ack
…
8 bits
1
1 bit
Data Byte
N-1
Ack
Stop
bit
Note:
Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
1.
How to Read (M: abbreviation for Master or Controller; S: abbreviation for slave/clock)
1 bit
M:
Start
bit
8
bits
M:
Send
"D2h"
1 bit
8
bits
S:
sends
Ack
M:
send
starting
databyte
location:
N
1 bit
S:
sends
Ack
1 bit
M:
Start
bit
8
bits
M:
Send
"D3h"
1 bit
8
bits
S:
sends
Ack
S:
sends
# of
data
bytes
that
will
be
sent:
X
1 bit
8
bits
M:
sends
Ack
S:
sends
starting
data
byte
N
1 bit
M:
sends
Ack
…
8
bits
1 bit
1 bit
…
S:
sends
data
byte
N+X1
M: Not
Acknowledge
M:
Stop
bit
Byte 0: Spread Spectrum Control Register
Bit
Description
Type
Power Up
Condition
Output(s)
Affected
7
Spread Spectrum Selection for 100 MHz HCSL
PCI-Express clocks
RW
0
All 100MHz HCSL
PCI Express output
RW
0
PD_RESET pin,
bit 5
RW
1
All outputs
6
5
Enables hardware or software control of OE bits
(see Byte 0–Bit 6 and Bit 5 Functionality table)
Software PD_RESET bit. Enables or disables all
outputs
(see Byte 0–Bit 6 and Bit 5 Functionality table)
4 to 1
Reserved
RW
Undefined
Not Applicable
0
OE for 25M_Out2
RW
1
25M_Out2
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Notes
0=spread off
1 = -0.5% down
spread
0 = hardware cntl
1 = software ctrl
0 = disabled
1 = enabled
0 = disabled
1 = enabled
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02/29/12
PI6C49015
Embedded Clock Generator
Byte 0 - Bit 6 and Bit 5 Functionality
Bit 6
0
1
1
Bit 5
X
0
1
Description
PD_RESET HW pin/signal = enabled
Disables all outputs and tri-states the outputs, PD_RESET HW pin/signal = DO NOT CARE
Enable all outputs, PD_RESET HW pin/signal = DON'T CARE
Byte 1: Control Register
Bit
Description
Type
Power Up Condition
Output(s) Affected
7
Reserved
RW
Undefined
Not Applicable
6
OE for 25M_Out1
RW
1
25M_Out1
5
Reserved
RW
Undefined
Not Applicable
4
OE for 100M_Q4 HCSL output
RW
1
100M_Q4
3
Reserved
RW
Undefined
Not Applicable
2
OE for 100M_Q3 HCSL output
RW
1
100M_Q3
1 to 0
Reserved
RW
Undefined
Not Applicable
Notes
0 = disabled
1 = enabled
0=disable
1 = enabled
0=disable
1 = enabled
Byte 2: Control Register
Bit
Description
Type
Power Up CondiOutput(s) Affected
tion
7 to 5
4 to 0
Reserved
Reserved
RW
R
Undefined
Undefined
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4
Notes
Not Applicable
Not Applicable
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02/29/12
PI6C49015
Embedded Clock Generator
Byte 3: Control Register
Bit
Description
Type
Power Up
Condition
7
OE for 100M_Q2 HCSL Output
RW
1
100M_Q2
6 to 3
Reserved
RW
Undefined
Not Applicable
2
OE for 100M_Q1 HCSL Output
RW
1
100M_Q1
1
OE for 100M_Q0 HCSL Output
RW
1
100M_Q0
0
Reserved
R
Undefined
Not Applicable
Output(s) Affected
Notes
0 = disabled
1 = enabled
0 = disabled
1 = enabled
0 = disabled
1 = enabled
Byte 4 & 5: Control Register
Bit
Description
Type
Power Up Condition
Output(s) Affected
7 to 0
Reserved
R
Undefined
Not Applicable
Notes
Byte 6: Control Register
Bit
Description
Type
Power Up Condition
Output(s) Affected
7
Revision ID bit 3
R
1
Not Applicable
6
Revision ID bit 2
R
0
Not Applicable
5
Revision ID bit 1
R
0
Not Applicable
4
Revision ID bit 0
R
0
Not Applicable
3
Vendor ID bit 3
R
0
Not Applicable
2
Vendor ID bit 2
R
0
Not Applicable
1
Vendor ID bit 1
R
1
Not Applicable
0
Vendor ID bit 0
R
1
Not Applicable
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Notes
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02/29/12
PI6C49015
Embedded Clock Generator
Absolute Maximum Ratings1 (Over operating free-air temperature range)
Parameters
Min.
Max.
Storage Temperature
-65
150
Ambient Temperature with Power Applied
-40
85
3.3V Analog Supply Voltage
-0.5
4.6
ESD Protection (HBM)
Units
°C
V
2000
Note:
1. Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
Recommended Operating Conditions
Symbol
Parameters
Test Condition
Min.
Typ.
Max.
Units
3.0
-
3.6
V
VDD
Power supply
IDD
Total Power Supply Current
All outputs
unloaded
-
-
65
mA
IDD _Output Tri-stated
Total power supply current with tristated outputs
OE = “0”, no
load
-
-
42
mA
IDD Power-Down
Total power supply current in power
down mode
PD_RESET=
“0”, no load
-
-
3.8
mA
TA
Operating temperature
-40
-
+85
°C
Min
Typ
Max
Units
LVCMOS DC Electrical Characteristics
Over Operating Conditions
Symbol
Parameter
VIH
Input High Voltage
2
-
VIL
Input Low Voltage
-0.3
-
VDD+0.3
0.8
VOH
Output High Voltage
IOH = -8mA
VDD-0.4
-
-
VOL
Output Low Voltage
IOL = 8mA
-
-
0.4
IIH
Input High Current
VIN = VDD -0.1V
-
-
45
IIL
Input Low Current
VIN = 0V
-45
-
-
PDRESET
-
216
-
25M_OUT1, 25M_OUT2
-
110
-
Internal Pull-Up Resistance
Internal Pull-Down
Resistance
RPU
RDN
12-0168
Conditions
V
µA
kOhm
6
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P-0.1
02/29/12
PI6C49015
Embedded Clock Generator
HCSL DC Electrical Characteristics
Over Operating Conditions
Symbol
Parameter
VOH
VOL
VCROSS
ΔVCROSS
Conditions
Min
Typ
Max
Output High Voltage
660
-
950
Output Low Voltage
-
-
150
250
-
550
-
-
140
-
12
-
Min
Typ
Max
-
25
-
Absolute Crossing
Point Voltages
Total variation of
VCROSS overall edges
With 475-Ohm resistor
connected between IREF
pin and GND
Input High Current
IOH
Units
mV
mA
LVCMOS AC Electrical Characteristics
Over Operating Conditions
Symbol
Parameter
Conditions
Fin
Input Frequency
FOUT
Output Frequency
CLOAD = 15pF
-
25
-
Tr/Tf
Output Rise/Fall time
20% of VDD to 80% of VDD
-
-
1.2
ns
TDC
Output Duty Cycle
45
-
55
%
Tj
Period Jitter
-
-
30
ps
25 MHz clock output
Units
MHz
HCSL AC Switching Characteristics1,2,3
Over Operating Conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Units
FOUT
Tr/Tf
Output Frequency
Output Rise/Fall time
Rise and Fall Time
Variation2
HCSL termination
Between 0.175V and 0.525V
175
-
100
700
MHz
ps
-
-
125
ps
47
-
53
%
-
-
70
ps
86
ps
3.1
ps
ΔTr/ΔTf
TDC
Output Duty Cycle3
Tcj
Cycle-to-Cycle Jitter
Peak-to-Peak Phase
Jitter
PCIe 2.0 RMS Phase
Jitter
3
TPJ
JRMS2.0
Differential waveform
Using PCIe jitter measurement method
PCIe 2.0 Test Method @
100MHz Output
Notes:
1. Test configuration is Rs=33Ω, Rp=49.9Ω, and 2pF
2. Measurement taken from a single-ended waveform.
3. Measurement taken from a differential waveform.
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02/29/12
PI6C49015
Embedded Clock Generator
HCSL Output Buffer Characteristics
VDD
(3.3V ± 10%)
Slope ~ 1/Rs
RO
IOUT
ROS
Iout
0V
VOUT = 0.85V max
0.85V
HCSL Output Buffer Characteristics
Symbol
Minimum
RO
3000Ω
ROS
unspecified
VOUT
N/A
Maximum
N/A
unspecified
950mV
Configuration Test Load Board Termination for HCSL Outputs
Rs
33Ω
5%
PI6C49015
Clock
TLA
Rs
33Ω
5%
Clock#
TLB
475Ω
1%
12-0168
Rp
49.9Ω
1%
Rp
49.9Ω
1%
8
2pF
5%
2pF
5%
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P-0.1
02/29/12
PI6C49015
Embedded Clock Generator
LVCMOS Test Circuit
3.3V ±10%
3.3V ±10%
10Ω
VDD
VDDA
15pF
GND
Application Notes
Crystal circuit connection
The following diagram shows PI6C49015 crystal circuit connection with a parallel crystal. For the CL=18pF
crystal, it is suggested to use C1= 18pF, C2= 18pF. C1 and C2 can be adjusted to fine tune to the target ppm of
crystal oscillator according to different board layouts.
Crystal Oscillator Circuit
XTAL_IN
C1
18pF
Crystal�(CL�=�18pF)
XTAL_OUT
C2
18pF
Recommended Crystal Specification
Pericom recommends:
a) GC2500003 XTAL 49S/SMD(4.0 mm), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/GC_GF.pdf
b) FY2500081, SMD 5x3.2(4P), 25M, CL=18pF, +/-30ppm, http://www.pericom.com/pdf/datasheets/se/FY_F9.pdf
c) FL2500047, SMD 3.2x2.5(4P), 25M, CL=18pF, +/-20ppm, http://www.pericom.com/pdf/datasheets/se/FL.pdf
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PI6C49015
Embedded Clock Generator
DOCUMENT CONTROL NO.
PD - 1313
REVISION: D
28
DATE: 03/09/05
.169
.177
4.3
4.5
.004
.008
1
.378
.386
9.6
9.8
0.45
0.75
0.09
0.20
.018
.030
.252
BSC
6.4
1
.047
1.20
Max
SEATING
PLANE
.007
.012
0.19
0.30
.0256
BSC
0.65
.002
.006
0.05
0.15
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AE
DESCRIPTION: 28-Pin, 173-Mil Wide, TSSOP
PACKAGE CODE: L
Note:
• For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
Ordering Information(1-3)
Ordering Code
Package Code
PI6C49015LIE
L
Package Description
28 pin, Pb-free & Green, TSSOP (L28)
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
3. Adding an X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
12-0168
All trademarks are property of their respective owners.
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