PI74AVC+16374A

ADVANCE INFORMATION R PI74AVC+16374 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 2.5V 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs Product Features Product Description • PI74AVC+16374 is designed for low voltage operation, VCC = 1.65V to 3.6V Pericom Semiconductor’s PI74AVC+ series of logic circuits are produced using the Company’s advanced submicron CMOS technology, achieving industry leading speed. • True ±24mA Balanced Drive @ 3.3V The PI74ALVCH16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the Clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In that state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. • Compatible with Philips and T.I. AVC Logic family • IOFF supports partial power-down operation • 3.6V I/O Tolerant inputs and outputs • All outputs contain a patented DDC (Dynamic Drive Control) circuit that reduces noise without degrading propagation delay. • Industrial operation at –40°C to +85°C • Available Packages: – 48-pin 240-mil wide plastic TSSOP – 48-pin 173-mil wide plastic TVSOP To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Logic Block Diagram 1OE 1CLK 1 48 C1 2 1D1 47 1Q1 1D To Seven Other Channels 2OE 2CLK 24 25 C1 13 2D1 36 2Q1 1D To Seven Other Channels 1 PXXXX 11/07/00 ADVANCE INFORMATION PI74AVC+16374 2.5V 16-Bit Edge Triggered D-Type Flip Flop with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Supply voltage range, VCC ............................................. –0.5V to +4.6V Input voltage range, VI ................................................... –0.5V to +4.6V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ...................... –0.5V to +4.6V Voltage range applied to any output in the high or low state, VO(1,2) ......................................... –0.5V to VCC +0.5V Input clamp current, IIK (VI