ZM7304G-65501-T2

ZM7300G Series Digital Power Manager Data Sheet Member of the Family Features       Applications    Low voltage, high density systems utilizing Z-OneTM Digital Intermediate Bus Architectures Broadband, networking, optical, and wireless communications systems Industrial computing, servers, and storage applications     Benefits   Eliminates the need for external power management components Communicates with the host system via the industry standard I2C communication bus Reduces board space, system cost, complexity, and time to market           RoHS compliant for all six substances Compatible with both lead-free and standard reflow processes Programs, controls, and manages up to 32 independent Z-series POL converters via an industry standard I2C interface (both 100kHz and 400kHz) JTAG IEEE 1149.1 compliant programming interface Controls and monitors industry standard power supplies and other peripheral devices (fans, etc) Programs output voltage, protections, optimal voltage positioning, turn-on and turn-off delays and slew rates, switching frequency, interleave (phase shift), and feedback loop compensation of the Z-OneTM POL converters User friendly GUI interface for programming, monitoring, and performance simulation Four independent OK lines for flexible fault management and fast fault propagation Four interrupt inputs with programmable hot swap support capabilities Intermediate bus voltage monitoring and protection AC Fail input Non-volatile memory to store system configuration information and status data 1 kByte of user accessible non-volatile memory Control of industry standard DC-DC front ends Crowbar output to trigger the optional crowbar protection Run-time counter Hardware and software locks for data protection Small footprint semiconductor industry standard QFN64 package: 9x9mm Wide industrial operating temperature range Description Power-One’s point-of-load converters are recommended for use with regulated bus converters in an Intermediate Bus Architecture (IBA). The ZM7300 is a fully programmable digital power manager that utilizes the industry-standard I2C communication bus interface to control, manage, program and monitor up to 32 Zseries POL converters and 4 independent power devices. The ZM7300 completely eliminates the need for external components for power management and programming and monitoring of the Z-OneTM POL converters and other industry standard power and peripheral devices. Parameters of the ZM7300 are programmable via the I2C bus and can be changed by a user at any time during product development and deployment. ZD-00896 Rev. 5.1, 13-Jul-10 www.power-one.com Page 1 of 33 ZM7300G Series Digital Power Manager Data Sheet 1 2 Selection Chart DPM Type Number of Z-OneTM POLs and Auxiliary devices that can be controlled Active Addresses Number of Groups Number of Interrupts Number of Parallel Buses Number of Auxiliary Devices ZM7304G 4 00…03 2 2 2 4 ZM7308G 8 00…07 2 2 4 4 ZM7316G 16 00…15 3 3 4 4 ZM7332G 32 00…31 4 4 8 4 Ordering Information ZM Product family: Z-One Power Management Devices 73 Series: Digital Power Manager xx Number of ZTM One POLs and Auxiliary devices: 04 – 4 devices 08 – 8 devices 16 – 16 devices 32 – 32 devices G RoHS compliance: G - RoHS compliant for all six substances – yyyyy – zz Packaging Option 1): 5-digit identifier B1 – 50pcs Tube assigned by B2 – 10pcs Tube Power-One for T1 – 500pcs T&R each unique T2 – 100pcs T&R configuration file Q1 – 1pc sample for evaluation only ______________________________________ 1 2 Packaging option is used only for ordering and not included in the part number printed on the DPM label. The evaluation board is available in only one configuration: ZM7300-KIT-HKS Example: ZM7316G-12345-T1: A 500-piece reel of 16-node DPMs with preloaded configuration file code 12345. Each DPM is labeled ZM7316G-12345. Refer to Figure 1 for label marking information. Line 1 : Part Number Line 2 : Customer Config. Number, Customer Config. Rev. (7 Char. Alpha Numeric) ZM7316G Line 3 : Firmware Rev. (3 Char. Alpha Numeric) A03 ZM73xxG xxxxx x xxx xxxxxxx (5 digits Plus Rev Letter) 12345 A Line 4 : Programming (Location, Date, Batch Code) (7 Char. Alpha Numeric) M082703 Figure 1. Label Drawing 3 Standard 5-Digit Identifiers DPM Type DPM preloaded with default configuration file DPM configured for JTAG programming Packaging Options ZM7304G 65501 65505 B1, B2, T1, T2, Q1 ZM7308G 65502 65506 B1, B2, T1, T2, Q1 ZM7316G 65503 65507 B1, B2, T1, T2, Q1 ZM7332G 65504 65508 B1, B2, T1, T2, Q1 ZD-00896 Rev. 5.1, 13-Jul-10 www.power-one.com Page 2 of 33 ZM7300G Series Digital Power Manager Data Sheet 4      5 Reference Documents ZY7XXX Point of Load Regulator. Data Sheet ZM7300 Digital Power Manager. Programming Manual, Revision A09 or later Graphical User Interface, Revision 6.3.5 or later Programming ZM7300 DPMs via JTAG Interface. Application Note ZM00056-KIT USB to I2C Adapter Kit. User Manual Absolute Maximum Ratings Stresses beyond those listed may cause permanent damage to the DPM. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Functional operation of the DPM at absolute maximum ratings or conditions beyond those indicated in the operational sections of this specification is not implied. Parameter Conditions/Description Min Max Units Ambient Temperature Range -40 85 C Storage Temperature (Ts) -55 150 C 125 C Junction Temperature (TJ) 6 Input Voltage VDD pin -0.3 3.6 VDC Input Voltage Any pin other than VDD -0.5 VDD+0.5 VDC Pin Current DC 40 mA Mechanical Specifications Parameter Conditions/Description Peak Reflow Temperature 40 sec maximum duration Min Lead Plating Max Units 260 C Max Units 100% matte tin Moisture Sensitivity Level 7 Nom JEDEC J-STD-020C 3 Reliability Specifications Parameter Conditions/Description Min Failure Rate Demonstrated at 55C, 60% Confidence Level 2.26 FIT Non-Volatile Memory Endurance -40°C to 85°C ambient 10,000 ReadWrite cycles ZD-00896 Rev. 5.1, 13-Jul-10 www.power-one.com Nom Page 3 of 33 ZM7300G Series Digital Power Manager Data Sheet 8 Electrical Specifications Specifications apply at VDD from 3V to 3.6V, ambient temperature from -40°C to 85°C, and utilizing proper decoupling as shown in Figure 3 unless otherwise noted. 8.1 Power Specifications Parameter Conditions/Description Min Input Supply Voltage VDD pin 3.0 Undervoltage Lockout Hardware reset is triggered below this threshold 2.3 Input Supply Current VDD pin=3.3V VREF voltage AREF pin IBVS input voltage range 2.3 Max Units 3.6 VDC 2.5 2.7 VDC 12 20 mA 2.56 2.7 VDC VREF VDC GND IBVS input resistance 8.2 Nom 100 MΩ Feature Specifications Parameter Conditions/Description Min Nom Max Units Intermediate Voltage Bus Protections Overvoltage Protection Threshold Undervoltage Protection Threshold With external 5.7:1 ratio divider IBV 14.6 V With external 5.7:1 ratio divider 0 IBV V Accuracy of Protection Thresholds With external 5.7; 1ratio divider. Symmetrical relative to average threshold value Internal voltage reference, 1% resistive divider Internal ADC Conversion Error With external 5.7:1 ratio divider Threshold Hysteresis ±114 mV -10 10 %VTH -43 43 mV Front End Enable (FE_EN) VFE_EN Front End logic level enabled High VFE_EN Front End logic level disabled Low Isrc Source Current, VFE_EN=VDD-0.5V 5 mA Isink Sink Current, VFE_EN=0.5V 5 mA Crowbar (CB) VCB Crowbar Enable High VCB Crowbar Disable Low Isrc Source Current, VCB=VDD-0.5V 5 mA Isink Sink Current, VCB=0.5V 5 mA TCB Duration of Enabling Pulse ZD-00896 Rev. 5.1, 13-Jul-10 www.power-one.com 1 ms Page 4 of 33 ZM7300G Series Digital Power Manager Data Sheet 8.3 Signal Specifications Parameter Conditions/Description Min Nom Max Units SYNC/DATA Line SDpu SDthrL SDthrH SDhys SDsink Freq_sd SD pull up resistor SD input low voltage threshold SD input high voltage threshold SD input hysteresis SD sink capability (VSD=0.5V) Clock frequency Tsynq 5 0.31·VDD 0.45·VDD 0.37 450 0.52·VDD 0.81·VDD 1.1 30 550 Sync pulse duration 22 28 T0 Data=0 pulse duration 72 78 Rpu3 VthrL3 VthrH3 Vhys3 Pull up resistor Input low voltage threshold Input high voltage threshold Input hysteresis kΩ V V V mA kHz % of clock cycle % of clock cycle Interrupt Inputs (INT_N[3:0]) 30 0.31·VDD 0.45·VDD 0.37 0.52·VDD 0.81·VDD 1.1 kΩ V V V 50 0.2·VDD VDD+0.5 kΩ V V 60 kΩ 0.2·VDD VDD+0.5 V V 0.52·VDD 0.81·VDD 1.1 30 kΩ V V V mA ADDR[3:0], ACFAIL_N, RES_N, LCK_N, PG[3:0] Inputs Rpu1 VthrL1 VthrH1 Rpu2 VthrL2 VthrH2 Pull up resistor Input low voltage Input high voltage 20 -0.5 0.7·VDD HRES_N Input HRES_N pull up resistor (with series 30 diode, see note 1) HRES_N input low voltage -0.5 HRES_N input high voltage 0.9·VDD Inputs/Outputs (OK_A, OK_B, OK_C, OK_D) OKpu OKthrL OKthrH OKhys OKsink OK pull up resistor OK input low voltage threshold OK input high voltage threshold OK input hysteresis OK sink capability (VOK=0.5V) VEN VEN EN logic level enabled EN logic level disabled EN output high voltage IOH = -10 mA EN output low voltage IOL = 5 mA 5 0.31·VDD 0.45·VDD 0.37 Enable Outputs (EN[3:0]) VENH VENL ______________________________________ High Low VDD-0.6 V 0.5 1 V HRES_N Input - Because the input does not have an internal ESD protection diode connected to VDD, the user needs to add an external diode between the HRES_N and VDD pins as shown in Figure 3. ZD-00896 Rev. 5.1, 13-Jul-10 www.power-one.com Page 5 of 33 ZM7300G Series Digital Power Manager Data Sheet I2C Interface 8.4 Parameter Conditions/Description Min ViL ViH Vhys VoL tr tof Ii Ci fSCL Input low voltage Input high voltage Input hysteresis Output low voltage, ISINK=3mA Rise time for SDA and SCL Output fall time from ViHmin to ViLmax Input current each I/O pin, 0.1VDD