BL24C08F-RRRC

BL24C08F Features ⚫ ⚫ ⚫ ⚫ Compatible with all I2C bidirectional data transfer protocol Memory array: – 8K bits (1024 X 8) of EEPROM – Page size: 16 bytes Single supply voltage and high speed: – 1 MHz Random and sequential Read modes Write: – Byte Write within 3 ms – Page Write within 3 ms – Partial Page Writes Allowed Write Protect Pin for Hardware Data Protection Schmitt Trigger, Filtered Inputs for Noise Suppression High-reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Enhanced ESD/Latch-up protection – HBM 5000V – 8-lead PDIP/SOP/TSSOP/ UDFN/SOT23-5 and TSOT23-5 packages ⚫ ⚫ ⚫ ⚫ Description ⚫ The BL24C08F provides 8192 bits of serial electrically erasable and programmable read-only memory (EEPROM), organized as 1024 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. ⚫ Pin Configuration ８-lead PDIP ８-lead SOP NC １ 8 VCC NC １ 8 VCC NC １ 8 VCC NC ２ 7 WP NC ２ 7 WP NC ２ 7 WP A2 ３ 6 SCL A2 ３ 6 SCL A2 ３ 6 SCL GND ４ 5 SDA GND ４ 5 SDA GND ４ 5 SDA ８-pad DFN BL24C08F ８-lead TSSOP NC 1 8 VCC NC 2 7 WP A2 3 6 SCL GND 4 5 SDA 5-lead TSOT23-5 WP VCC 5-lead SOT23-5 WP VCC ５ ５ ４ ４ １ ２ ３ １ ２ ３ SCL GND SDA SCL GND SDA Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 1-19 BL24C08F Pin Descriptions Pin Name Type Functions A2 I Address Inputs SDA I/O Serial Data SCL I Serial Clock Input WP I Write Protect GND P Ground Vcc P Power Supply Table 1 Block Diagram Vcc GND WP SCL START STOP LOGIC SDA EN HIGH VOLTAGE PUMP/TIMING SERIAL CONTROL LOGIC LOAD DATA RECOVERY CCMP DEVICE ADDRESS COMPARATOR LOAD INC A2 X DECODER DATA WORD ADRESS COUNTER EEPROM Y DECODER DIN SERIAL MUX DOUT/ACKNOWLEDGE DOUT Figure 1 BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 2-19 BL24C08F DEVICE/PAGE ADDRESSES (A2): The A2 pin is device address input that is hard wire for the BL24C08F. Only two 8K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open- collector devices. SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. WRITE PROTECT (WP): The BL24C08F has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protection pin is connected to Vcc, the write protection feature is enabled and operates as shown in the following Table 2. WP Pin Status BL24C08F At VCC Full(8K)Array At GND Normal Read/Write Operations Table 2 Functional Description 1. Memory Organization BL24C08F, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K requires a 10bit data word address for random word addressing. 2. Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 2). Data changes during SCL high periods will indicate a start or stop condition as defined below. SDA SCL DATA STABLE DATA CHANGE DATA STABLE Figure 2. Data Validity BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 3-19 BL24C08F START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 3). STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 3). SDA SCL START STOP Figure 3. Start and Stop Definition ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a "0" to acknowledge that it has received each word. This happens during the ninth clock cycle. SCL 1 8 9 DATA IN DATA OUT START ACKNOWLEDGE Figure 4. Output Acknowledge STANDBY MODE: The BL24C08F features a low-power standby mode which is enabled: (a) upon power-up;(b) after the receipt of the STOP bit and the completion of any internal operations. MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part can be reset by following these steps: 1. Clock up to 9 cycles. 2. Lock SDA high in each cycle while SCL is high. 3. Create a start condition. BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 4-19 BL24C08F 3. Device Addressing The 8K EEPROM devices all require an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Figure 5) MSB LSB 1 0 1 0 A2 B9 B8 R/W Figure 5. Device Address The device address word consists of a mandatory "1", "0" sequence for the first four most significant bits as shown. This is common to all the Serial EEPROM devices. The 8K EEPROM uses A2 device address bits to allow two devices on the same bus. This bit must be compared to their corresponding hardwired input pins. The A2 pin uses an internal proprietary circuit that biases them to a logic low condition if the pin is allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the chip will return to a standby state. DATA SECURITY: The BL24C08F has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at VCC. 4. Write Operations BYTE WRITE: A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a "0" and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a "0" and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 6). S T A R T DEVICE ADDRESS W R I T E WORD ADDRESS S T O P DATA SDA LINE M S B L R A S / C BWK L A S C B K L A S C B K Figure 6. Byte Write PAGE WRITE: The 8K devices are capable of 16-byte page writes. A page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen more BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 5-19 BL24C08F data words. The EEPROM will respond with a "0" after each data word received. The microcontroller must terminate the page write sequence with a stop condition (see Figure 7). S T A R T W R I T E DEVICE ADDRESS WORD ADDRESS DATA(n) DATA(n+1) S T O P DATA(n+1) SDA LINE M S B L R A S / C BWK L A S C B K A C K A C K A C K Figure 7. Page Write The data word address lower four bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than sixteen data words are transmitted to the EEPROM, the data word address will "roll over" and previous data will be overwritten. ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a "0", allowing the read or write sequence to continue. 5. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to "1". There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address "roll over" during read is from the last byte of the last memory page to the first byte of the first page. The address "roll over" during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to "1" is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input "0" but does generate a following stop condition (see Figure 8). S T A R T DEVICE ADDRESS R E A D S T O P DATA SDA LINE M S B L R A S / C BWK NO ACK Figure 8. Current Address Read BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 6-19 BL24C08F RANDOM READ: A random read requires a "dummy" byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 9) S T A R T DEVICE ADDRESS W R I T E S T A R T WORD ADDRESS DEVICE ADDRESS R E A D S T O P DATA(n) SDA LINE M S B L R A S / C BWK L A S C B K A C K NO ACK DUMMY WRITE Figure 9. Random Read SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will "roll over" and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a "0" but does generate a following stop condition (see Figure 10). DEVICE ADDRESS R E A D DATA(n) DATA(n+1) DATA(n+2) S T O P DATA(n+x) SDA LINE R A / C WK A C K A C K A C K NO ACK Figure 10. Sequential Read BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 7-19 BL24C08F Electrical Characteristics Absolute Maximum Stress Ratings： ⚫ ⚫ ⚫ ⚫ DC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V Input / Output Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND-0.3V to VCC+0.3V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65℃ to +150℃ Electrostatic pulse (Human Body model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5000V Comments： Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics Applicable over recommended operating range from (unless otherwise noted): BL24C08F TA =-40℃ to +85℃ BL24C08FE1 TA =-40℃ to +105℃ BL24C08FE0 TA =-40℃ to +125℃ Parameter VCC = +1.7V to +5.5V@400kHz VCC = +2.5V to +5.5V@1MHz CL=100 pF Symbol Min Supply Current VCC=5.0V ICC1 - Supply Current VCC=5.0V ICC2 Supply Current VCC=5.0V Typ Max Unit Condition 0.14 0.3 mA READ at 400KHZ - 0.28 0.5 mA WRITE at 400KHZ ISB1 - 0.03 0.5 μA VIN=VCC or VSS Input Leakage Current IL1 - 0.10 1.0 μA VIN=VCC or VSS Output Leakage Current ILO - 0.05 1.0 μA VOUT=VCC or VSS Input Low Level VIL1 -0.3 - VCC×0.3 V VCC=1.7V to 5.5V Input High Level VIH1 VCC×0.7 - VCC+0.3 V VCC=1.7V to 5.5V Output Low Level VCC=1.7V VOL1 - - 0.2 V IOL=0.15mA Output Low Level VCC=5.0V VOL2 - - 0.4 V IOL=3.0mA Table 3 Pin Capacitance Applicable over recommended operating range from TA = 25℃, f = 1.0 MHz, VCC = +2.5V Parameter Symbol Min Typ Max Unit Condition Input/Output Capacitance(SDA) CI/O - - 8 pF VIO=0V Input Capacitance(A2,SCL) CIN - - 6 pF VIN=0V Table 4 BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 8-19 BL24C08F AC Electrical Characteristics Applicable over recommended operating range from (unless otherwise noted): BL24C08F TA =-40℃ to +85℃ BL24C08FE1 TA =-40℃ to +105℃ BL24C08FE0 TA =-40℃ to +125℃ VCC = +1.7V to +5.5V@400kHz VCC = +2.5V to +5.5V@1MHz CL=100 pF 1.7V≤VCC﹤2.5V Symbol Parameter 2.5V≤VCC﹤5.5V Min Typ Max Min Typ Max Units Clock Frequency,SCL fSCL - - 400 - - 1000 kHz Clock Pulse Width Low tLOW 1.3 - - 0.5 - - μs Clock Pulse Width High tHIGH 0.6 - - 0.26 - - μs Noise Suppression Time tI - - 50 - - 50 ns Clock Low to Data Out Valid tAA - - 0.9 - - 0.45 μs Time the bus must be free before a new transmission can start tBUF 1.3 - - 0.5 - - μs Start Hold Time tHD:STA 0.6 - - 0.25 - - μs Start Setup Time tSU:STA 0.6 - - 0.25 - - μs Data In Hold Time tHD:DAT 0 - - 0 - - μs Data in Setup Time tSU:DAT 100 - - 100 - - ns Input Rise Time(1) tR - - 0.3 - - 0.12 μs Input Fall Time(1) tF - - 0.3 - - 0.12 μs Stop Setup Time tSu:STO 0.6 - - 0.25 - - μs Data Out Hold Time tDH 50 - - 50 - - ns Write Cycle Time twR - 1.9 3 - 1.9 3 ms Endurance 1M - - 1M - - Write Cycle 5.0V,25℃,Byte Mode(1) Notes: Table 5 1. This parameter is characterized and is not 100% tested. 2. AC measurement conditions: RL (connects to VCC): 1.3 k Input pulse voltages: 0.3 VCC to 0.7 VCC Input rise and fall time: 50 ns Input and output timing reference voltages: 0.5 VCC The value of RL should be concerned according to the actual loading on the user's system. BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 9-19 BL24C08F Bus Timing tF tHIGH tR tLOW tLOW SCL tSU.DAT tHD.DAT tHD.STA tSU.STA tSU.STO SDA_IN tAA t BUF tDH SDA_OUT Figure 11. SCL: Serial Clock, SDA: Serial Data I/O Write Cycle Timing SCL ACK SDA Word n tWR(1) STOP CONDITION START CONDITION Figure 12. SCL: Serial Clock, SDA: Serial Data I/O Notes: The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 10-19 BL24C08F Package Information PDIP Outline Dimensions E1 c eA eB COMMON DIMENSIONS (Unit of Measure=mm) D e A2 A b2 b BL24C08F L SYMBOL A A2 b b2 c D E1 e eA eB L MIN 3.60 3.20 0.44 0.24 9.05 6.15 7.62 NOM 3.80 3.30 1.52BSC 9.25 6.35 2.54BSC 7.62BSC 3.00BSC Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn MAX 4.00 3.40 0.53 0.32 9.45 6.55 9.30 11-19 BL24C08F SOP C E E1 L Φ COMMON DIMENSIONS (Unit of Measure=mm) B A A1 e D BL24C08F SYMBOL A A1 B C D E1 E e L Φ MIN 1.35 0.10 0.39 0.21 4.70 3.70 5.80 0.50 0" NOM 4.90 3.90 6.00 1.27BSC - Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn MAX 1.75 0.23 0.48 0.26 5.10 4.10 6.20 0.80 8" 12-19 BL24C08F TSSOP E1 E L1 End View Top View A b e D Side View BL24C08F A1 L COMMON DIMENSIONS Unit of Measure=mm SYMBOL D E E1 A A1 b e L L1 MIN 2.90 6.20 4.30 0.05 0.21 0.45 NOM 3.00 6.40 4.40 0.65BSC 0.60 1.00REF Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn MAX 3.10 6.60 4.50 1.20 0.15 0.30 0.75 13-19 BL24C08F UDFN BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 14-19 BL24C08F TSOT23-5 D e1 L2 R1 Θ1(4X) R L(L1) Θ2(4X) E1 E Θ Pin 1 e 0.20 c M SIDE VIEW b TOP VIEW COMMON DIMENSIONS (UNITS OF MEASURE = MILLIMETER) A3 A A2 0.10 SIDE VIEW BL24C08F A1 SYMBOL A A1 A2 A3 b c D E E1 e e1 L L1 L2 R R1 Θ Θ1 Θ2 MIN 0.00 0.65 0.35 0.30 0.14 2.85 2.65 1.60 0.90 1.80 0.30 0° 3° 10° Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn NOM 0.75 0.40 0.44 2.95 2.80 1.65 0.95 1.90 0.45 0.575REF 0.258BSC 5° 12° MAX 0.90 0.10 0.85 0.45 0.50 0.20 3.05 2.95 1.70 1.00 2.00 0.60 0.25 0.25 8° 7° 14° 15-19 BL24C08F SOT23-5 D e1 L2 L L1 E1 E Θ SIDE VIEW COMMON DIMENSIONS (UNITS OF MEASURE = MILLIMETER) e b Pin 1 TOP VIEW A3 A A2 SIDE VIEW A1 b b1 WITH PLATING c c1 SECTION B-B BL24C08F BASE METAL SYMBOL A A1 A2 A3 b b1 c c1 D E E1 e e1 L L1 L2 Θ MIN 0.04 1.00 0.55 0.38 0.37 0.11 0.10 2.72 2.60 1.40 0.30 0° Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn NOM 1.10 0.65 0.40 0.13 2.92 2.80 1.60 0.95BSC 1.90BSC 0.575REF 0.258BSC - MAX 1.35 0.15 1.20 0.75 0.48 0.43 0.21 0.16 3.12 3.00 1.80 0.60 8° 16-19 BL24C08F Marking Diagram PDIP BL24C08F YYWW#ZZ SSSSSP SOP BL24C08F SSSSSPE0 TSSOP BL24C08F SSSSS E0 UDFN BLF8 E0 YYWW SOT23-5/TSOT23-5 24C08F SSSSSP YY WW ZZ SSSSS E0 BL24C08F Year Week assembly house Lot ID Blank：-40℃ to +85℃ E1：-40℃ to +105℃ E0：-40℃ to +125℃ Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 17-19 BL24C08F Ordering Information BL 24C 08 F E0-PA A R C Feature S: Standard (default, Pb Free RoHS Std.) C: Green (Halogen Free) Packing Type R: Tape and Reel T: Tube Wire Version Blank: Cu A: Au Package Type PA: SOP-8L SF: TSSOP-8L DA: PDIP-8L NT: UDFN-8L TC: SOT23-5L RR: TSOT23-5L Temperature Blank：-40 to +85 E1：-40 to +105 E0：-40 to +125 Version F：F Version Density 02:2k bit 04:4k bit 08:8k bit 16:16k bit 32:32k bit 64:64k bit 128:128k bit 256:256k bit 512:512k bit M1:1M bit M2:2M bit Product Family 24:IIC Interface EEPROM BL24C08F Device Package Shipping (Qty/Packing) BL24C08F SOP8 2500/Tape &Reel BL24C08F TSSOP8L 3000/Tape &Reel BL24C08F UDFN 3000/Tape &Reel BL24C08F TSOT23-5 3000/Tape &Reel BL24C08F SOT23-5 3000/Tape &Reel Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 18-19 BL24C08F Revision history Version 1.00 BL24C08F Initial Version Version 1.01 BL24C08F 9/3/2018 Add TSOT23-5 Package information Modify Text and structure of documents Version 1.02 BL24C08F 5/23/2019 Update Package Information Version 1.03 BL24C08F 6/5/2019 Correct Pin Configuration Error Version 1.04 BL24C08F 8/16/2019 Add SOT23-5 Package Information Update Operating Ambient Temperature Range Information Update Ordering Information BL24C08F Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited © 2018 Belling All Rights Reserved www.belling.com.cn 19-19