BL8039CB5TR

BL8039 2A 2MHz 5.5V Synchronous Buck Converter DESCRIPTION FEATURES The BL8039 is a high-efficiency, DC-to-DC stepdown switching regulators, capable of delivering up to 2A of output current. The device operates from an input voltage range of 2.6V to 5.5V and provides an output voltage from 0.6V to VIN. Working at a fixed frequency of 2MHz allows the use of small external components, such as ceramic input and output caps, as well as small inductors, while still providing low output ripples. This low noise output along with its excellent efficiency achieved by the internal synchronous rectifier, making BL8039 an ideal replacement for large power consuming linear regulators. Internal soft-start control circuitry reduces inrush current. Short-circuit and thermal shutdown protection improves design reliability.            The BL8039 is available in SOT23-5 package. TYPICAL APPLICATION VIN 2.6V to 5.5V 10uF VOUT 1.8V SW LC2202 EN 240k        Cellular phones Digital cameras MP3 and MP4 players Set top boxes Wireless and DSL modems USB supplied devices in notebooks Portable devices FB VIN 5 4 option NC FB GND APPLICATIONS PIN OUT & MARKING 1uH/2.2uH VIN High efficiency: up to 97% Up to 2A Max output current Output voltage range: VREF to VIN 2MHz switching frequency Low dropout 100% duty operation Internal compensation and soft-start Current mode control Reference 0.6V±2% Logic control shutdown (IQ2000V Note: Exceed these limits to damage to the device. Exposure to absolute maximum rating conditions may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN=5V, TA=25C, unless otherwise specified.) Symbol Parameter VIN Input voltage range VOVP Input overvoltage threshold VREF Feedback voltage Conditions 0.588 IQ Quiescent current Active, VFB=0.65, No Switching Shutdown input current EN=0V LNR Line regulation Vin=2.6V to 5.5V LDR Load regulation Iout=0.01 to 1A FSOC Switching frequency PMOS Rdson RDSON_N NMOS Rdson VUVLO VUVLO_HY ILIMIT V 0.1 1 uA uA 0.1 0.2 %/V 0.1 0.2 %/A 2 2.4 MHz 180 Vin=5V, Vout=3.3V, Iout=0A VH_EN EN input high voltage VL_EN EN input low voltage mohm 130 1.9 2.1 2.7 EN leakage current uA 1 Peak current limit IENLK V 0.612 100 SW leakage current V 0.6 UVLO hysteresis ISWLK Unit 5.5 80 1.6 Under voltage lockout INOLOAD Max 6.1 Vin=5V Feedback leakage current RDSON_P Typ 2.6 IFB ISHUTDOWN Min mohm 2.3 mV 3.3 80 Vin=6V, VSW=0 or 6V, EN=0V V A uA 1 uA 1 uA 1.2 V 0.5 V TSD Thermal shutdown temp 160 °C TSH Thermal shutdown hysteresis 15 °C www.belling.com.cn 2 BL8039 ELECTRICAL PERFORMANCE Tested under TA=25C, unless otherwise specified Efficiency vs. Output Current Efficiency vs. Output Current (Vout=3.3V) 100% 100% 95% 95% 90% 90% 85% 85% Efficiency Efficiency (Vout=1.8V) 80% 75% 80% 75% 70% 70% 65% 65% 60% 60% 55% 55% Vin=5V 50% 0.001 0.01 0.1 Iout (A) 1 Vin=5V 50% 0.001 10 Load Regulation 0.01 1 10 Load Regulation (Vout=1.8V) (Vout=3.3V) 2.0 3.5 1.9 3.4 1.8 3.3 Vout(V) Vout(V) 0.1 Iout (A) 1.7 1.6 3.2 3.1 Vin=5V Vin=5V 1.5 3.0 0.0 0.5 1.0 Iout (A) 1.5 2.0 Output Ripple and SW at 1A load 0.0 1.0 Iout (A) 1.5 Output Ripple and SW at 1A load Vin=5V / Vout=1.2V Vin=5V / Vout=1.8V Vout ripple, 5mV/div Vout ripple, 5mV/div Vsw, 2V/div Vsw, 2V/div Isw, 1A/div Isw, 1A/div Ch2—Vout ripple, Ch3—Vsw, Ch4—ISW www.belling.com.cn 0.5 Ch2—Vout ripple, Ch3—Vsw, Ch4—ISW 3 2.0 BL8039 Output Ripple and SW at 1A load Output Ripple and SW at 1A load Vin=5V / Vout=2.5V Vin=5V / Vout=3.3V Vout ripple, 5mV/div Vout ripple, 5mV/div Vsw, 2V/div Vsw, 2V/div Isw, 1A/div Isw, 1A/div Ch2—Vout ripple, Ch3—Vsw, Ch4—ISW Ch2—Vout ripple, Ch3—Vsw, Ch4—ISW Load Transient Load Transient Vin=5V / Vout=1.2V / Iout=0.01~1.8A Vin=5V / Vout=1.8V / Iout=0.01~1.8A Vout ripple, 100mV/div Vout ripple, 100mV/div Iout, 1A/div Iout, 1A/div Ch2—Vout ripple, Ch4—Iout Ch2—Vout ripple, Ch4—Iout Load Transient Load Transient Vin=5V / Vout=3.3V / Iout=0.01~1.8A Vin=5V / Vout=2.5V / Iout=0.01~1.8A Vout ripple, 200mV/div Vout ripple, 200mV/div Iout, 1A/div Iout, 1A/div Ch2—Vout ripple, Ch4—Iout www.belling.com.cn Ch2—Vout ripple, Ch4—Iout 4 BL8039 PIN DESCRIPTION Pin # Name Description 1 2 3 4 EN GND SW VIN 5 FB Enable pin for the IC. Drive the pin to high to enable the part, and low to disable. Ground. Inductor connection. Connect an inductor between SW and the regulator output. Supply voltage. Feedback input. Connect an external resistor divider from the output to FB and GND to set the output to a voltage between 0.6V and Vin. BLOCK DIAGRAM DETAILED DESCRIPTION The BL8039 high-efficiency switching regulator is a small, simple, DC-to-DC step-down converter capable of delivering up to 2A of output current. The device operates in pulse-width modulation (PWM) at 2MHz from a 2.6V to 5.5V input voltage and provides an output voltage from 0.6V to VIN, making the BL8039 ideal for on-board postregulation applications. An internal synchronous rectifier improves efficiency and eliminates the typical Schottky free-wheeling diode. Using the on resistance of the internal high-side MOSFET to sense switching currents eliminates current-sense resistors, further improving efficiency and cost. compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator terminates the on cycle. During this on-time, current ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The current mode feedback system regulates the peak inductor current as a function of the output voltage error signal. During the off cycle, the internal highside P-channel MOSFET turns off, and the internal low-side N-channel MOSFET turns on. The inductor releases the stored energy as its current ramps down while still providing current to the output. Loop operation Current sense BL8039 uses a PWM current-mode control scheme. An open-loop comparator compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope An internal current-sense amplifier senses the current through the high-side MOSFET during on time and produces a proportional current signal, which is used to sum with the slope compensation www.belling.com.cn 5 BL8039 signal. The summed signal then is compared with the error amplifier output by the PWM comparator to terminate the on cycle. (UVLO), shutdown mode, or restarts following a thermal shutdown event, the soft-start circuitry slowly ramps up current available at SW. Current limit UVLO There is a cycle-by-cycle current limit on the highside MOSFET of 2.7A (typ). When the current flowing out of SW exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier turns on. BL8039 utilizes a frequency fold-back mode to prevent overheating during short-circuit output conditions. The device enters frequency fold-back mode when the FB voltage drops below 100mV, limiting the current to 2.7A (typ) and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition. If VIN drops below 2.1V, the UVLO circuit inhibits switching. Once VIN rises above 2.2V, the UVLO clears, and the soft-start sequence activates. Soft-start Thermal shutdown Thermal shutdown protection limits total power dissipation in the device. When the junction temperature exceeds TJ= +160°C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown condition, the soft-start sequence begins. BL8039 has an internal soft-start circuitry to reduce supply inrush current during startup conditions. When the device exits under-voltage lockout DESIGN PROCEDURE Setting output voltages Output voltages are set by external resistors. The FB threshold is 0.6V. 𝑉𝑂𝑈𝑇 𝑅𝑇𝑂𝑃 = 𝑅𝐵𝑂𝑇𝑇𝑂𝑀 × ( − 1) 0.6 Input capacitor selection The input capacitor in a DC-to-DC converter reduces current peaks drawn from the battery or other input power source and reduces switching noise in the controller. The impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source. The output capacitor keeps output ripple small and ensures control-loop stability. The output capacitor must also have low impedance at the www.belling.com.cn 6 switching frequency. Ceramic, polymer, and tantalum capacitors are suitable, with ceramic exhibiting the lowest ESR and high-frequency impedance. Output ripple with a ceramic output capacitor is approximately as follows: 𝑉𝑂𝑈𝑇 𝑉𝑂𝑈𝑇 ∆𝐼𝐿 = × (1 − ) 𝐿 × 𝑓𝑆 𝑉𝐼𝑁 ∆𝑉𝑂𝑈𝑇 = 8 × 𝑓𝑆2 𝑉𝑂𝑈𝑇 𝑉𝑂𝑈𝑇 × (1 − ) 𝑉𝐼𝑁 × 𝐿 × 𝐶𝑂𝑈𝑇 If the capacitor has significant ESR, the output ripple component due to capacitor ESR is as follows: 𝑉𝑂𝑈𝑇 𝑉𝑂𝑈𝑇 ∆𝑉𝑂𝑈𝑇 = × (1 − ) × 𝑅𝐸𝑆𝑅 𝑓𝑆 × 𝐿 𝑉𝐼𝑁 BL8039 LAYOUT GUIDE The blue line is placed on the back side. Cout as close as possible to Vout Cout Vout Keep the path short and wide for low resistance L Make GND loop Resistance as small as possible Jumper Off EN SW SW GND On GND Keep the path short and wide for low resistance FB VIN FB&GND connected to R1 directly as short as possible VIN Cin R1 R2 Cin as close as possible to VIN PACKAGE OUTLINE Package SOT23-5 Devices per reel Package specification: Unit: mm www.belling.com.cn 7 3000pcs