TBU-DF085-100-WH

Features n Superior circuit protection n Overcurrent protection n Blocks surges up to rated voltage limit n High-speed performance F 91653530 0 n Small SMT package n RoHS compliant* TBU-DF Series - TBU® High-Speed Protectors General Information The TBU-DF Series of Bourns® TBU® products are low capacitance dual bidirectional high-speed Electronic Current Limiters (ECLs), constructed using MOSFET semiconductor technology, and designed to protect against faults caused by short circuits, overvoltage transients and faults in battery cells, up to rated limits. The TBU® high-speed protector placed in the system circuit will monitor the current with the MOSFET detection circuit triggering to provide an effective barrier behind which sensitive electronics will not be exposed to large voltages or currents during transient events. Line 1 I/O 1 3 Line 1 I/O Line 2 I/O 6 4 Line 2 I/O TBU ® Device The TBU® device is provided in a surface mount DFN package and meets industry standard requirements such as RoHS and Pb Free solder reflow profiles. Absolute Maximum Ratings (@ TA = 25 °C Unless Otherwise Noted) Symbol Parameter Vimp Peak impulse voltage withstand with duration less than 10 ms Vrms Continuous A.C. RMS voltage Top Operating temperature range Tamax Maximum Ambient Temperature Tstg Part Number TBU-DF055-xxx-WH TBU-DF085-xxx-WH TBU-DF055-xxx-WH TBU-DF085-xxx-WH Storage temperature range Value 550 850 250 425 -55 to +125 Unit -65 to +150 °C +125 °C V V °C Electrical Characteristics (@ TA = 25 °C Unless Otherwise Noted) Symbol Parameter Itrigger Current required for the device to go from operating state to protected state Part Number TBU-DFxxx-050-WH TBU-DFxxx-100-WH TBU-DFxxx-200-WH TBU-DFxxx-300-WH TBU-DFxxx-500-WH Min. 50 100 200 300 500 Typ. 75 150 300 450 750 Max. 100 200 400 600 1000 Vimp = 550 V Vimp = 550 V Vimp = 550 V Vimp = 550 V Vimp = 550 V Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = 50 mA 100 mA 200 mA 300 mA 500 mA TBU-DF055-050-WH TBU-DF055-100-WH TBU-DF055-200-WH TBU-DF055-300-WH TBU-DF055-500-WH 12 9.5 7.5 6 5 26 18.5 15.5 14 13 Vimp = 850 V Vimp = 850 V Vimp = 850 V Vimp = 850 V Vimp = 850 V Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = Itrigger (min.) = 50 mA 100 mA 200 mA 300 mA 500 mA TBU-DF085-050-WH TBU-DF085-100-WH TBU-DF085-200-WH TBU-DF085-300-WH TBU-DF085-500-WH 23 14.5 12.5 15 12 38 26.5 22.5 26 25 Rdevice Series resistance of the TBU® device Rmatch tblock IQ Vreset Rth(j-a) Rth(j-a) Package resistance matching of the TBU® device #1 - TBU® device #2 Time for the device to go from normal operating state to protected state Current through the triggered TBU® device with 50 Vdc circuit voltage Voltage below which the triggered TBU® device will transition to normal operating state Junction to ambient - FR4 using JESD51-3 board Junction to ambient - FR4 using JESD51-7 board WARNING Cancer and Reproductive Harm - www.P65Warnings.ca.gov   12   1 0.5 16 125 50 +0.5 20 Unit mA Ω Ω µs mA V °C/W °C/W *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TBU-DF Series - TBU® High-Speed Protectors Environmental Characteristics Parameter Moisture Sensitivity Level ESD Classification (HBM) Value 1 1B Reference Application Basic TBU Operation The TBU devices are general use protectors used in a wide variety of applications, including telecommunications, and industrial communications. The maximum voltage rating of the TBU® device should never be exceeded. Where necessary, an OVP device should be employed to limit the maximum voltage. A cost-effective protection solution combines Bourns® TBU® protection devices with a pair of Bourns® TISP® Overvoltage Protectors or MOVs. For bandwidth sensitive applications, a Bourns® GDT may be substituted for the MOV. ® Line Side 1 3 6 4 OVP OVP Load The TBU® device, constructed using MOSFET semiconductor technology, placed in the system circuit will monitor the current with the MOSFET detection circuit triggering to provide an effective barrier behind which sensitive electronics are not exposed to large voltages or currents during transient events. When operated, the TBU® device will limit the current to less than the Itrigger value within the tblock duration. If voltage above Vreset is continuously sustained, the TBU® device will subsequently reduce the current to a quiescent current level within a period of time that is dependent upon the applied voltage. After the surge, the TBU® device resets when the voltage across the TBU® device falls to the Vreset level. The TBU® device will automatically reset on lines which have no DC bias or have DC bias below Vreset (such as unpowered signal lines). TBU ® Device Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. ® - TBUTrimming High-Speed Protectors TBU-DF 3312 - 2Series mm SMD Potentiometer Performance Graphs Normalized Itrigger vs. Temperature Typical V-I Characteristics 1.8 ITRIP 1.6 Normalized ITrigger CURRENT VRESET VOLTAGE TYPICAL TRIGGER CURRENT 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 -35 -15 5 25 45 65 85 105 125 Temperature (°C) Normalized Resistance vs. Temperature Power Derating Curve 2.5 Multilayer JESD51-7 (2 TBU® HSPs) Single Layer (2 TBU® HSPs) Multilayer JESD51-7 (1 TBU® HSP) Single Layer (1 TBU® HSP) 2.5 2.0 2.0 Normalized Resistance Total Maximum Power (W) 3.0 1.5 1.0 0.5 0.0 25 45 65 85 105 Junction Temperature (°C) 125 145 1.5 1.0 0.5 0.0 -55 -35 -15 5 25 45 65 85 105 125 Temperature (°C) Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TBU-DF Series - TBU® High-Speed Protectors Product Dimensions TOP VIEW L PIN 1 INDICATOR B C D E F G H I J K L 1.90 (.075) 1.75 (.069) 0.65 (.026) 0.70 (.028) 0.30 (.012) 0.25 (.010) 0.75 (.030) Nom. 5.50 (.217) 6.50 (.256) 0.90 (.035) -0.20 (.008) REF. .......F 2.00 (.079) 1.85 (.073) 0.70 (.028) 0.80 (.031) 0.35 (.014) 0.30 (.012) 0.80 (.031) 5 6 3 2 1 I J CHAMFERED CORNER FOR PIN 1 IDENTIFICATION 0.25 ± 0.25 (.010 ± .010) H DIMENSIONS: Min. 5.40 (.213) 6.40 (.252) 0.80 (.031) 0.00 (.000) 4 F E C SIDE VIEW 1 A K D FXXXX YWWLL A Dim. G SIDE VIEW 2 B MM (INCHES) Max. 5.60 (.220) 6.60 (.260) 1.00 (.039) 0.05 (.002) Pad # 1 2 3 4 5 6 Pin Out Line 1 In/Out NU (Not Used) Line 1 In/Out L Line 2 In/Outt NU (Not Used) Line 2 In/Out NOTES: 2.10 (.083) 1.95 (.077) 0.75 (.030) 0.90 (.035) 0.40 (.016) 0.35 (.014) 0.85 (.033) 1. Pin 1 Indicator is laser marked; radius and location within the Pin 1 terminal. Pin 1 dot size: 0.500 ± 0.125 mm / (.020 ± .005 in.). 2. Pin 2 and 5 are NU (Not Used) and must be left unconnected; do not connect to In/Out lines, do not connect to system Ground. 3. Coplanarity on exposed pads shall not exceed 0.08 mm / (.003 in.). 4. Warpage shall not exceed 0.10 mm / (.004 in.) on all surfaces. 5. Exposed tie bars at package side are not plated. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TBU-DF Series - TBU® High-Speed Protectors Recommended Pad Layout TBU® High-Speed Protectors have a 100 % matte-tin termination finish. For improved thermal dissipation, the recommended layout uses PCB copper areas which extend beyond the exposed solder pad. The exposed solder pads should be defined by a solder mask which matches the pad layout of the TBU® device in size and spacK ing. It is recommended that they should be the same dimension as K J the TBU® pads but if smaller solder pads are used, they should be E F C pads and not more than centered on the TBUB® package terminal 0.10-0.12 mm (0.004-0.005 in.) smaller in overall width or length. 1 Solder pad areas should not be larger than the TBU®3pad sizes 2 to ensure adequate clearance is maintained. The recommended A stencil thickness is 0.10-0.12 mm (0.004-0.005 in.) with a stencil opening size 0.025 mm (0.0010 in.) less than the solder pad size. Extended copper areas beyond the solder pad significantly improve the junction toPIN ambient thermal resistance, 1 D resulting in operation at lower junction temperatures with a corresponding benefit of reliability. All pads should soldered to the SIDE PCB,VIEW including padsBOTTOM markedVIEW TOP VIEW as NC or NU but no electrical connection should be made to these pads. Care should be taken to assure no resistive path exists between the NC or NU pins to any other point to avoid unexpected performance issues. For minimum parasitic capacitance, it is recommended that signal, ground or power signals are not routed beneath any pad. For minimum parasitic capacitance, it is recommended that signal, ground1.15 or power (.045) signals are not routed beneath any pad. 0.70 (.028) J E 2.625 (.103) N 6 5 4 1 2 3 3.55 (.140) H N Dark grey areas show added PCB copper area for better thermal resistance. Reflow Profile Profile Feature Average Ramp-Up Rate (Tsmax to Tp) Preheat - Temperature Min. (Tsmin) - Temperature Max. (Tsmax) - Time (tsmin to tsmax) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5 °C of Actual Peak Temp. (tp) Ramp-Down Rate Time 25 °C to Peak Temperature Pb-Free Assembly 3 °C/sec. max.   150 °C 200 °C 60-180 sec.   217 °C 60-150 sec. 260 °C 20-40 sec. 6 °C/sec. max. 8 min. max. How to Order Typical Part Marking TBU - DF xxx - yyy - WH MANUFACTURER’S TRADEMARK TBU Product ® Series DF = Dual Bidirectional Series FXXXX YWWLL Impulse Voltage Rating 055 = 550 V 085 = 850 V Trigger Current 050 = 50 mA 100 = 100 mA 200 = 200 mA 300 = 300 mA 500 = 500 mA PIN 1 INDICATOR 5 DIGIT PRODUCT CODE: • 1ST ALPHA CHARACTER INDICATES PRODUCT FAMILY: F = TBU-DF SERIES • 2ND & 3RD DIGITS INDICATE IMPULSE VOLTAGE. • 4TH & 5TH DIGITS INDICATE TRIGGER CURRENT. MANUFACTURING DATE CODE: • 1ST DIGIT INDICATES THE YEAR. • 2ND & 3RD DIGITS INDICATE THE WEEK NUMBER. • 4TH & 5TH DIGITS INDICATE LOT CODE. Hold to Trip Ratio Suffix W = Hold to Trip Ratio Package Suffix H = DFN Package Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TBU-DF Series - TBU® High-Speed Protectors Packaging Specifications P0 t B A D E P2 TOP COVER TAPE N F D W FXXXX YWWLL C B0 R K0 D1 A0 EMBOSSMENT P G (MEASURED AT HUB) USER DIRECTION OF FEED QUANTITY: 3000 PIECES PER REEL A Min. 328.5 (12.93) Min. 5.75 (0.224) Min. 1.05 (0.041) Min. 15.7 (0.618) A0 K0 W Max. 331 (13.05) Min. 2.0 (0.079) Max. 5.95 (0.234) Min. 6.75 (0.266) Max. 1.25 (0.049) Min. 7.9 (0.311) B0 P B Max. 2.4 (0.094) Max. 6.95 (0.274) Min. 1.5 (0.059) Max. 8.1 (0.319) Min. 3.9 (0.159) Min. 12.8 (0.504) D0 P0 C Max. 13.5 (.531) Max. 1.6 (0.063) Min. 1.5 (0.059) Max. 4.1 (0.161) Min. 1.9 (0.075) Min. 17.0 (0.669) D1 Max. - P2 Max. 2.1 (0.083) D Max. 17.4 (0.690) Min. 1.65 (0.065) Min. 0 (0) E R G Ref.  16.5 (0.650) N Ref. 100 ± 1.5 (3.94 ± 0.059) Max. 1.85 (0.073) Min. 7.4 (0.291) Max. 0.5 (.020) Min. 0.25 (0.010) F t Max. 0.35 (0.014) Max. 16.3 (0.642) max. 7.6 (0.299) DIMENSIONS: MM (INCHES) Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com REV. 09/19 “TBU” is a registered trademark of Bourns, Inc. in the United States and other countries, except Japan. All references to TBU® in this document for use in Japan shall be deemed to be replaced with Bourns® TBU™. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.  Legal Disclaimer Notice This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and its affiliates (collectively, “Bourns”). Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change without notice. Users should check for and obtain the latest relevant information and verify that such information is current and complete before placing orders for Bourns® products. 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