TISP1072F3,TISP1082F3
DUAL FORWARD-CONDUCTING UNIDIRECTIONAL
THYRISTOR OVERVOLTAGE PROTECTORS
TISP1xxxF3 Overvoltage Protector Series
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
‘1072F3
‘1082F3
VDRM
V(BO)
V
- 58
- 66
V
- 72
- 82
D Package (Top View)
T
1
8
G
NC
2
7
G
NC
3
6
G
R
4
5
G
NC - No internal connection
Planar Passivated Junctions
Low Off-State Current > V d, the capacitance value is independent on the value of Vd . The
capacitance is essentially constant over the range of normal telecommunication frequencies.
NORMALIZED CAPACITANCE
vs
RMS AC TEST VOLTAGE
1.05
AIXXAA
Normalized Capacitance
1.00
0.95
0.90
0.85
0.80
Normalized to Vd = 100 mV
0.75
DC Bias, VD = 0
0.70
1
10
100
1000
Vd - RMS AC Test Voltage - mV
Figure 21.
32
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
TISP1xxxF3 Overvoltage Protector Series
APPLICATIONS INFORMATION
Longitudinal Balance
Figure 22 shows a three terminal TISP® device with its equivalent “delta” capacitance. Each capacitance, CTG, CRG and CTR, is the true
terminal pair capacitance measured with a three terminal or guarded capacitance bridge. If wire R is biased at a larger potential than wire T,
then CTG >CRG. Capacitance CTG is equivalent to a capacitance of CRG in parallel with the capacitive difference of (CTG -C RG). The line
capacitive unbalance is due to (CTG -CRG) and the capacitance shunting the line is CTR +CRG/2.
All capacitance measurements in this data sheet are three terminal guarded to allow the designer to accurately assess capacitive unbalance
effects. Simple two terminal capacitance meters (unguarded third terminal) give false readings as the shunt capacitance via the third terminal is
included.
T
T
(CTG-CRG)
CTG
CRG
Equipment
G
Equipment
G
CTR
CTR
CRG
CRG
R
AIXXAB
R
CTG > CRG
Equivalent Unbalance
Figure 22.
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
33
TISP1xxxF3 Overvoltage Protector Series
MECHANICAL DATA
D008 Plastic Small-outline Package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
D008
8-pin Small Outline Microelectronic Standard
Package MS-012, JEDEC Publication 95
4.80 - 5.00
(0.189 - 0.197)
5.80 - 6.20
(0.228 - 0.244)
8
7
6
5
1
2
3
4
INDEX
3.81 - 4.00
(0.150 - 0.157)
0.25 - 0.50 x 45 ° N0M
(0.010 - 0.020)
7 ° NOM
3 Places
1.35 - 1.75
(0.053 - 0.069)
0.102 - 0.203
(0.004 - 0.008)
0.28 - 0.79
(0.011 - 0.031)
DIMENSIONS ARE:
NOTES: A.
B.
C.
D.
34
4°±4°
7 ° NOM
4 Places
0.36 - 0.51
(0.014 - 0.020)
8 Places
Pin Spacing
1.27
(0.050)
(see Note A)
6 places
4.60 - 5.21
(0.181 - 0.205)
0.190 - 0.229
(0.0075 - 0.0090)
0.51 - 1.12
(0.020 - 0.044)
METRIC
(INCHES)
Leads are within 0.25 (0.010) radius of true position at maximum material condition.
Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0.15 (0.006).
Lead tips to be planar within ±0.051 (0.002).
MDXXAAC
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
TISP1xxxF3 Overvoltage Protector Series
MECHANICAL DATA
D008 Tape DImensions
D008 Package (8-pin Small Outline) Single-Sprocket Tape
3.90 - 4.10
(.154 - .161)
1.50 - 1.60
(.059 - .063)
1.95 - 2.05
(.077 - .081)
7.90 - 8.10
(.311 - .319)
0.40
(0.016)
0.8
MIN.
(0.03)
5.40 - 5.60
(.213 - .220)
6.30 - 6.50
(.248 - .256)
ø
Carrier Tape
Embossment
DIMENSIONS ARE:
1.50
MIN.
(.059)
11.70 - 12.30
(.461 - .484)
Cover
0 MIN.
Tape
Direction of Feed
2.0 - 2.2
(.079 - .087)
METRIC
(INCHES)
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter:
MDXXATB
330 +0.0/-4.0
(12.992 +0.0/-.157)
Reel hub diameter:
100 ± 2.0
(3.937 ± .079)
Reel axial hole:
13.0 ± 0.2
(.512 ± .008)
B. 2500 devices are on a reel.
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
35
TISP1xxxF3 Overvoltage Protector Series
MECHANICAL DATA
P008 Plastic Dual-in-line Package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. The package is intended for insertion in mounting-hole rows on 7.62 (0.300) centers. Once the leads are compressed and
inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing
when used in soldered assembly.
DIMENSIONS ARE:
P008
METRIC
(INCHES)
9.25 - 9.75
(0.364 - 0.384)
8
7
6
5
Index
Notch
6.10 - 6.60
(0.240 - 0.260)
1
2
3
4
1.78
MAX.
(0.070)
4 Places
7.62 - 8.23
(0.300 - 0.324)
5.08
MAX.
(0.200)
Seating
Plane
0.51
MIN.
(0.020)
0.38 - 0.53
(0.015 - 0.021)
8 Places
3.17
MIN.
(0.125)
2.54
Typical
(0.100)
(see Note A)
6 Places
0.20 - 0.36
(0.008 - 0.014)
8.38 - 9.40
(0.330 - 0.370)
MDXXCF
NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. Dimensions fall within JEDEC MS001 - R-PDIP-T, 0.300" Dual-In-Line Plastic Family.
36
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
TISP1xxxF3 Overvoltage Protector Series
MECHANICAL DATA
SL003 3-pin Plastic Single-in-line Package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
DIMENSIONS ARE:
SL003
METRIC
(INCHES)
3.20 - 3.40
(0.126 - 0.134)
9.25 - 9.75
(0.364 - 0.384)
Index
Notch
6.10 - 6.60
(0.240 - 0.260)
8.31
(0.327)
MAX.
12.9
(0.492)
MAX.
4.267
(0.168)
MIN.
2
1
1.854
(0.073)
MAX.
3
2.54
Typical
(0.100)
(See Note A)
2 Places
0.203 - 0.356
(0.008- 0.014)
0.559 - 0.711
(0.022 - 0.028)
3 Places
MDXXCE
NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0.15 (0.006) may occur in the package lead plane.
SEPTEMBER 1993 - REVISED OCTOBER 2000
Specifications are subject to change without notice.
37
很抱歉,暂时无法提供与“TISP1082F3SL”相匹配的价格&库存,您可以联系我们找货
免费人工找货