TISP4A250H3BJ
ASYMMETRICAL-BIDIRECTIONAL THYRISTOR
OVERVOLTAGE PROTECTOR
TISP4A250H3BJ Overvoltage Protector
RING Line Protection for:
-LCAS (Line Card Access Switch)
such as Le75181, Le75183 and Le75282
Voltages Optimized for:
-Battery-Backed Ringing Circuits
Maximum Ringing a.c������������ 104 Vrms
Maximum Battery Voltage������������ -52 V
VDRM
V
Device Name
TISP4A250H3BJ
+100
-200
V(BO)
V
+125
-250
Rated for International Surge Wave
Shapes
Wave
Shape
Standard
IPPSM
A
2/10 µs
GR-1089-CORE
500
8/20 µs
IEC 61000-4-5
300
10/160 µs
TIA-968-A
250
10/700 µs
ITU-T K.20/21/45
200
10/560 µs
TIA-968-A
160
10/1000 µs
GR-1089-CORE
100
SMB Package (Top View)
Additional Information
Click these links for more information:
(Ground) 1
2 (Ring)
PRODUCT TECHNICAL INVENTORY SAMPLES
SELECTOR LIBRARY
Terminal typical application names
shown in parenthesis
CONTACT
Agency Recognition
MD-SMB-006-a
Description
Device Symbol
UL
File Number: E215609
(Ring)
������������UL Recognized Component
(Ground)
SD-TISP4A-001-a
Description
The TISP4A250H3BJ is an asymmetrical bidirectional overvoltage protector. It is designed to limit the peak voltages on the Ring line terminal
of the LCAS (Line Card Access Switch) such as Le75181, Le75183 and Le75282. The TISP4A250H3BJ must be connected with bar-indexed
terminal 1 to the protective Ground, and terminal 2 to the Ring conductor.
The TISP4A250H3BJ voltages are chosen to give adequate LCAS ring line terminal protection for all switch conditions. The most potentially
stressful condition is low level power cross when the LCAS switches are closed. Under this condition, the TISP4A250H3BJ limits the voltage
and corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches.
Under open-circuit ringing conditions, the line Ring conductor will have high peak voltages. For battery backed ringing, the Ring conductor will
have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A250H3BJ has a similar voltage asymmetry
and will allow the maximum possible ringing voltage, while giving the most effective protection. On a connected line, the Tip conductor will have
much smaller voltage levels than the open-circuit Ring conductor values. Here a TISP4xxxH3BJ series symmetrical voltage protector gives
adequate protection.
Overvoltages are initially clipped by breakdown clamping. If sufficient current is available from the overvoltage, the breakdown voltage will rise
to the breakover level, which causes the device to switch into a low-voltage on-state condition. This switching action removes the high voltage
stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the protector. The high
holding (switch off) current helps prevent d.c. latchup as the diverted current subsides.
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
NOVEMBER 2006 – REVISED APRIL 2023
*RoHS Directive 2015/863, Mar 31, 2015 and Annex.
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
How to Order
Device
Package
Carrier
Order As
Marking Code
Standard Quantity
TISP4A250H3BJ
SMB
Embossed Tape Reeled
TISP4A250H3BJR-S
4A250H
3000
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
Rating
Symbol
Value
Unit
VDRM
+100
-200
V
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 µs current combination wave generator)
10/160 µs (TIA-968-A, 10/160 µs voltage wave shape)
5/310 µs (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/21/45)
5/320 µs (TIA-968-A, 9/720 µs voltage wave shape)
10/560 µs (TIA-968-A, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
IPPSM
±500
±300
±250
±200
±200
±160
±100
A
20 ms, 50 Hz (full sine wave)
16.7 ms, 60 Hz (full sine wave)
1000 s, 50 Hz or 60 Hz a.c.
ITSM
55
60
2.2
A
Rep et it ive p eak off- st at e volt age (see Not e 1)
Non-repetitive peak impulse current (see Notes 2 and 3)
Non-repetitive peak on-state current (see Notes 2, 3 and 4)
Initial rate of rise of on-state currrent, exponential current ramp. Maximum ramp value < 200 A
Junction temperature
Storage temperature range
NOTES: 1.
2.
3.
4.
di T /dt
TJ
Tstg
400
A/µs
-65 to +150
°C
-40 to +150
°C
See Figure 6 for voltages at other temperatures.
Initially the device must be in thermal equilibrium with TJ = 25 °C.
The surge may be repeated after the device returns to its initial conditions.
EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 5 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C.
Overload Ratings, TA = 25 °C (Unless Otherwise Noted)
Rating
Maximum overload on-state current without open circuit, 50 Hz or 60 Hz a.c. (see note 5)
0.03 s
0.07 s
1.6 s
5.0 s
1000 s
NOTE:
Symbol
IT(OV)M
Value
60
40
8
7
2.2
Unit
A rms
5. Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress levels
may damage the TISP4A250H3BJ silicon die. After test, the pass criterion is either that the device is functional or, if it is faulty, that
it has a short-circuit fault mode. In the short-circuit fault mode, the following equipment is protected as the device is a permanent
short across the line. The equipment would be unprotected if an open-circuit fault mode developed.
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)
Parameter
Test Conditions
M in
Typ
TA = 25 °C
TA = 85 °C
IDRM
Repetitive peak off-state current
V D = VDRM
V(BO)
Breakover voltage
I(BO)
Breakover current
dv/dt = ±250 V/ms, R SOURCE = 300 Ω
VT
On-state voltage
I T = ±5 A, t w = 100 µs
IH
Holding current
I T = ± 5 A, d i/ d t = ± 30 mA/ ms
dv/dt
Critical rate of rise of
off-state voltage
Linear voltage ramp
Maximum ramp value < 0.85V DRM
CO
Off-state capacitance
f = 1 MHz, V d = 1 V rms
dv/dt = ±250 V/ms, R SOURCE = 300 Ω
±150
± 15 0
M ax
Unit
±5
±10
µA
+125
-250
V
±600
mA
±3
V
± 600
mA
±5
kV/µs
VD = 2 V
72
pF
M ax
Unit
Thermal Characteristics
Parameter
R
JA
Junction to ambient thermal resistance
Test Conditions
265 mm x 210 mm populated line card,
4-layer PCB, IT = ITSM(1000)
NOTE:
M in
Typ
EIA/JESD51-3 PCB, IT = ITSM(1000)
(see Note 6)
113
°C/W
50
6. EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
Parameter Measurement Information
+i
I PPSM
Quadrant I
Switching
Characteristic
ITSM
ITRM
IT
V(BO)
VT
I(BO)
IH
V(BR)M
VDRM
-v
I(BR)
V(BR)
VD
V(BR)
I(BR)
I DRM
ID
ID
IDRM
VD
+v
VDRM
V(BR)M
IH
I(BO)
VT
V(BO)
IT
ITRM
ITSM
Quadrant III
Switching
Characteristic
I PPSM
-i
PM-TISP4Axxx-002-a
Figure 1. Voltage-Current Characteristic for the Ring and Ground Terminals
All Measurements are Referenced to the Ground Terminal
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
Typical Characteristics
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
100
TCHAG
1.10
NORMALIZED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE TC4HAF
VD = ±50 V
Normalized Breakover Voltage
|ID| - Off-State Current - µA
10
1
0·1
0·01
0·001
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
1.05
1.00
0.95
150
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
Figure 2.
150
Figure 3.
2.0
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC4HAD
Normalized Holding Current
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
150
Figure 4.
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
Rating and Thermal Information
VDRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
TI4HAC
30
TI4HADC
1.00
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
20
15
0.99
0.98
10
9
8
7
6
5
Derating Factor
ITSM(t) - Non-Repetitive Peak On-State Current - A
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
4
0.97
0.96
0.95
3
0.94
2
1.5
0·1
1
10
100
1000
t - Current Duration - s
Figure 5.
0.93
-40 -35 -30 -25 -20 -15 -10 -5
0
5
10 15 20 25
TAMIN - Minimum Ambient Temperature - °C
Figure 6.
Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com
EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com
The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com
www.bourns.com
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A250H3BJ Overvoltage Protector
VDD
Applications Information
ATEST1
ARINGING1
SW
Tip1
SW
ALINE 1
B1250T
Telefuse™
SW
ASLIC1
Tip
TISP4125H3BJ
Ground
FGND1
Ground
TISP4A250H3BJ
Ring
BLINE 1
Ring1
B1250T
Telefuse™
SW
SW
BSLIC1
SW
BRINGING1
BTEST1
Le79232
Dual SLIC
Battery
Monitor
VBH
ATEST2
ARINGING2
SW
SW
ALINE2
Tip2
B1250T
Telefuse™
SW
ASLIC2
Tip
TISP4125H3BJ
Ground
FGND2
Ground
Le75282
Dual LCAS
TISP4A250H3BJ
Ring
BLINE2
Ring2
B1250T
Telefuse™
SW
SW
BSLIC2
SW
P1'
BRINGING2
BTEST2
Switch
Control
Logic
Latch
P2'
P3'
LD1
LD2
TSD1
TSD2
OFF1
DGND
CFG
OFF2
AI-TISP4A-001-a
Figure 7. Typical Application Circuit
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
NOVEMBER 2006 – REVISED APRIL 2023
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
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