TISP4A270H3BJ
ASYMMETRICAL BIDIRECTIONAL THYRISTOR SPD
TISP4A270H3BJ LCAS RLINE Protector
Optimized LCAS RLINE Protector
SMB Package (Top View)
TISP4A270H3BJ V(BO) Derived from:
-Break Switch, SW1 & SW2, Ratings
-Ring Return Switch, SW3, Rating
-Ringing Access Switch, SW4, Rating
-Switch Isolation Ratings
-Battery Voltage Range of -40 V to -60 V
-Power Fault Conditions
-Lightning Impulse Conditions
-LCAS Characteristic Temperature Range
Additional Information
Click these links for more information:
2 R
G 1
PRODUCT TECHNICAL INVENTORY SAMPLES
SELECTOR LIBRARY
MD4A270B
............UL Recognized Component
CONTACT
Agency Recognition
Description
‘4A270
VDRM
V(BO)
V
V
+160
+217
-222
-270
Device Symbol and Circuit Application
'7581 LCAS
TISP4165H3
TIP
T LINE
G
Rated for International Surge Wave
Shapes
Wave
Shape
Standard
IPPSM
A
2/10 μs
GR-1089-CORE
500
10/700 μs
ITU-T K.20/45/21
150
10/1000 μs
GR-1089-CORE
100
File Number: E215609
R
RING
SW3
Ring
return
switch
R LINE
TISP4A270H3
SW1
Break
switch
T BAT
SW2
Break
switch
F GND
V BAT
R BAT
V DD
SW4
Ringing
access
switch
R RINGING
SCR, Diode
protection
Device
UL
Control
logic
TISP4A270H3BJ Designed for:
-Battery-Backed Ringing Circuits
Voltage Swing.............. +148 V to -206 V
Allows
...103 V rms Ringing with -60 V Battery
Temperature Range
....................................... -40 °C to +85 °C
T RING ING
LATCH
INPUT
DGND
T SD
AI4BITAMA
Description
The TISP4A270H3BJ is an asymmetrical-bidirectional thyristor surge protective device (SPD). It is designed to limit the peak voltages on the
RLINE (Ring Line) terminal of ‘7581/2/3 LCAS (Line Card Access Switch) devices. The TISP4A270H3BJ must have the bar-indexed terminal 1
(G) connected to the protective ground and terminal 2 (R) connected to the RLINE terminal.
The TISP4A270H3BJ voltages are chosen to give RLINE terminal protection for all LCAS switch conditions. The most potentially stressful
condition is low level power cross when the switches are closed. Under this condition, the TISP4A270H3BJ limits the voltage and
corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches.
Under open-circuit ringing conditions, the RLINE terminal will have high peak voltages. For battery backed ringing, the RLINE terminal will have
a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A270H3BJ has a similar voltage asymmetry
which will allow the maximum possible ringing voltage, while still giving protection. With a connected telephone line, the LCAS TLINE (Tip Line)
terminal voltage levels will be less than 50 % of the open-circuit RLINE terminal values. So the TLINE terminal can be protected by a symmetricalbidirectional overvoltage protector of the TISP4xxxH3BJ series.
APRIL 2002 – REVISED JULY 2019
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
*RoHS Directive 2015/863, Mar 31, 2015 and Annex.
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of
this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Description (Continued)
These devices allow signal voltages up to the maximum off-state voltage value, VDRM, see Figure 1. Voltages above VDRM are clipped and will
not exceed the breakover voltage, V(BO), level. If sufficient current flows due to the overvoltage, the device switches into a low-voltage on-state
condition, which diverts the current from the overvoltage though the device. When the diverted current falls below the holding current, IH, level
the devices switches off and restores normal system operation.
The TISP4A270H3BJ is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. This high current
protection device is in a plastic SMB package (JEDEC DO-214AA) and supplied in embossed tape reel pack.
How to Order
Device
Package
Carrier
Order As
TISP4A270H3BJ
BJ (SMB/DO-214AA with J-Bend)
R (Embossed Tape Reeled)
TISP4A270H3BJR-S
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, (see Note 1)
Symbol
TA = 25 °C
TA = -40 °C
VDRM
Value
+160/-222
148/-206
Unit
V
Non-repetitive peak on-state pulse current (see Notes 2 and 3)
2/10 (GR-1089-CORE, 2/10 voltage wave shape)
5/310 (ITU-T K.44, 10/700 μs voltage wave shape used in K.20/45/21)
IPPSM
10/1000 (GR-1089-CORE, 10/1000 voltage wave shape)
500
150
A
100
Non-repetitive peak on-state current (see Notes 2, 3 and 4)
20 ms (50 Hz) full sine wave
55
ITSM
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Junction temperature
Storage temperature range
NOTES: 1.
2.
3.
4.
60
A
2.2
Exponential current ramp, Maximum ramp value < 200 A
diT/dt
400
A/μs
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
See Figure 7 for voltage values at intermediate temperatures.
Initially, the TISP4A270H3BJ must be in thermal equilibrium with TJ = 25 °C.
The surge may be repeated after the TISP4A270H3BJ returns to its initial conditions.
EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 6 for the current ratings at other durations. Derate current values at -0.61 % /°C for ambient
temperatures above 25 °C.
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Overload Ratings, TA = 25 °C (Unless Otherwise Noted)
Rating
Symbol
Value
Unit
Maximum
a
overload on-state current without open circuit, 50 Hz/60 Hz a.c. (see Note 5)
60
0.03 s
0.07 s
40
IT(OV)M
1.6 s
7
5.0 s
2.2
1000 s
NOTE
A rms
8
5:
Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress
levels may damage the TISP4A270H3BJ silicon chip. After test, the pass criterion is either that the device is functional or, if it is
faulty, that it has a short circuit fault mode. In the short circuit fault mode, the following equipment is protected as the device is a
permanent short across the line. The equipment would be unprotected if an open circuit fault mode developed.
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)
IDRM
Parameter
Repetitive peak offstate current
Test Conditions
Min
VD = +100 V and -200 V
TA = 25 °C
Max
±5
TA = 85 °C
±10
V(BO) Breakover voltage
dv/dt = ±250 V/ms,
V(BO) Ramp breakover
voltage
dv/dt 1 kV/μs, Linear voltage ramp, Maximum ramp value = ±500 V
dv/dt = 20 A/μs, Linear current ramp, Maximum ramp value = ±10 A
I(BO)
IH
dv/dt
ID
Coff
R SOURCE = 300 Ω
Breakover current
dv/dt = ±250 V/ms,
Holding current
I T = ±5 A, di/dt = +/-30 mA/ms
Critical rate of rise of
off-state voltage
Linear voltage ramp, Maximum ramp value < 0.85V DRM
Off-state current
V D = ±50 V
Off-state capacitance
f = 1 MHz,
Typ
R SOURCE = 300 Ω
.
μA
+217
-270
V
+231
-288
V
±0.15
±0.6
A
±0.15
±0.6
A
±5
kV/μs
TA = 85 °C
V d = 1 V rms
Unit
±10
VD = 100 V
21
23
VD = 50 V
27
29
VD = 10 V
41
46
VD = 5 V
48
53
VD = 2 V
56
62
VD = 1 V
61
67
VD = 0
68
74
VD = -1 V
62
68
VD = -2 V
56
62
VD = -5 V
48
52
VD = -10 V
40
45
VD = -50 V
25
28
VD = -100 V
20
22
μA
pF
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Thermal Characteristics
Parameter
Test Conditions
Min
Typ
Max
EIA/JESD51-3 PCB, IT = ITSM(1000),
113
TA = 25 °C, (see Note 6)
RΘJA Junction to free air thermal resistance
Unit
°C/W
265 mm x 210 mm populated line card,
50
4-layer PCB, IT = ITSM(1000), TA = 25 °C
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
Parameter Measurement Information
+i
Quadrant I
IPPSM
Switching
Characteristic
ITSM
V(BO)
I(BO)
IH
IDRM
VD
VDRM
-v
ID
ID
VD
VDRM
+v
IDRM
IH
I(BO)
V(BO)
ITSM
Quadrant III
Switching
Characteristic
IPPSM
-i
PMXXAEA
Figure 1. Voltage-Current Characteristic for R and G Terminal Pair
All Measurements are Referenced to the G Terminal
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Typical Characteristics
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
TCHAG
100
1.10
NORMALIZED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE TC4HAF
Normalized Breakover Voltage
VD = ±50 V
|ID| - Off-State Current - μA
10
1
0·1
0·01
1.05
1.00
0.95
0·001
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
-25
150
Figure 2.
100
TA = 25 °C
tW = 100 μs
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE TC4HAD
1.5
Normalized Holding Current
IT - On-State Current - A
2.0
TC4HACBA
70
50
40
30
20
15
10
7
5
4
3
1.0
0.9
0.8
0.7
0.6
0.5
2
1.5
1
0.7
150
Figure 3.
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
200
150
0
25
50
75
100 125
TJ - Junction Temperature - °C
0.4
1
1.5
2
3
4 5
VT - On-State Voltage - V
Figure 4.
7
10
-25
0
25
50
75
100 125
TJ - Junction Temperature - °C
150
Figure 5.
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Rating and Thermal Information
VDRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
TI4HAC
30
TI4HADC
1.00
VGEN = 600 Vrms, 50/60 Hz
20
RGEN = 1.4*VGEN/ITSM(t)
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
0.99
0.98
10
9
8
7
6
5
Derating Factor
ITSM(t) - Non-Repetitive Peak On-State Current - A
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
4
0.97
0.96
0.95
3
0.94
2
1.5
0·1
1
10
100
t - Current Duration - s
Figure 6.
1000
0.93
-40 -35 -30 -25 -20 -15 -10 -5
0
5
10 15 20 25
TAMIN - Minimum Ambient Temperature - °C
Figure 7.
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
APPLICATIONS INFORMATION
Calculation of the TISP4A270H3BJ Voltage Values
Figure 8 and the following text summarizes the derivation process for the TISP4A270H3BJ voltages. Details of the full process and other
design aspects are covered by the document entitled TISP4A270H3BJ - Optimized ‘758x LCAS Overvoltage Protection.
Calculation of RLINE protector
voltage parameters
A
Maximum SW1, SW2,
SW3 and Isolation
voltages at TAMIN
System TAMIN
B
Maximum TLINE and RLINE
voltage ratings set by
SW1, SW2 and SW3
Maximum TBAT, RBAT and
TRINGING bias voltages on
SW1, SW2 and SW3,
0, Vbat
Maximum protector V(BO)
C
at
TA = 25 °C
Maximum power fault
and impulse protection
voltage increase of
25 °C V(BO) = 1.15 x
D
Protector VDRM at
TA = 25 °C
V(BO) /VDRM factor for
specific V(BO) voltage
E
Minimum protector VDRM
at
TAMIN
VDRM versus temperature
data and TAMIN
RLINE protector
V(BO) @ 25 °C
VDRM at 25 °C and TAMIN
AI4CITRAMA
Figure 8. Derivation of TI SP4A270H3BJ V(BO) and V DRM
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
Calculation of the TISP4A270H3BJ Voltage Values (Continued)
Box A: The voltage rating of the break and ring return switches and their isolation decreases with temperature. At the minimum LCAS
operating temperature of -40 °C, the switch rating is ±310 V.
Box B: A switch pole voltage rating to ground is reduced by any opposing bias voltage applied to the other pole. For battery-backed ringing the
d.c. bias on TRINGING is zero. Bias voltages are applied to the RBAT and TBAT poles by the SLIC. For SLIC output levels of zero and -60 V, the RLINE
and TLINE voltage ratings to ground become +250 V and -310 V at -40 °C.
Box C: Allowing for the extreme condition of a power fault at -40 °C, the overvoltage protector V(BO) at its highest temperature must not exceed
+250 V and -310 V. The IEEE Standard C62.37.1-2000, IEEE Guide for the Application of Thyristor Surge Protective Devices, pp 25-27
recommends a factor of 1.15 for the ratio of the power fault V(BO) to the 25 °C V(BO). Applying this factor makes the 25 °C V(BO) voltage values
+217 V and -270 V.
Box D: From the V(BO) values the values of protector 25 °C VDRM were determined as +160 V and -222 V.
Box E: Derating the 25 °C VDRM down to the LCAS minimum operating temperature gives -40 °C VDRM values of +148 V and -206 V. A further
rating check has to be done on the ringing access switch, SW4. The limit condition is in the negative ringing polarity. The applied ringing
voltage to the RRINGING terminal must not exceed -205 V when the RLINE terminal is at +250 V. For a battery voltage of -40 V and -60 V the a.c.
ringing levels must not exceed 117 V rms and 102 V rms respectively. In IVD (Integrated Voice Data) applications the a.c. ringing level must be
reduced by the level of digital signal applied to the line. For a 20 V peak ADSL signal level, the ringing voltages reduce to 103 V rms
and 89 V rms respectively.
Figure 9 shows a typical application circuit. Fuses F1 and F2 need high breaking capacity to safely interrupt 40 A rms (UL 60950) and 60 A rms
(Telcordia GR-1089-CORE) currents from a 600 V rms source. The Bourns® Telefuse™ type B1250T is a surface mount fuse which has UL
recognition for these UL and Telcordia standards. The TISP4A270H3BJ is overload rated to carry currents up to 60 A rms for the time period
that it takes the fuse to operate.
SW1
Break
switch
'7581 LCAS
TISP4165H3
Fuse
overcurrent
protectors
RING
SW3
Ring
return
switch
Low
pass
filter
G
F2
B1250T
TBAT
TLINE
F1
R
SLIC
SW2
Break
switch
SCR, Diode
protection
B1250T
TISP4A270H3
VADSL
ADSL
MODEM
High
pass
filter
VBAT
VDD
SW4
Ringing
access
switch
C1
FGND
RBAT
RLINE
Control
logic
TIP
RRINGING
TRINGING
R1
R2
LATCH
INPUT
Vbat
DGND
TSD
VRING
VBAT
Ring
generator
AI4AITAM A
Figure 9. ADSL IVD using Common Protection
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP4A270H3BJ LCAS RLINE Protector
MECHANICAL DATA
Recommended Printing Wiring Land Pattern Dimensions
SMB Land Pattern
2.54
(.100)
2.40
(.095)
DIMENSIONS ARE:
2.16
(.085)
MILLIMETERS
(INCHES)
MDXX BID
Device Symbolization Code
Devices will be coded as below. Terminal 1 is indicated by an adjacent bar marked on the package body.
Device
TISP4A270H3BJ
Symbolization
Code
4A270H
Carrier Information
For production quantities, the carrier will be embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
Package
SMB
Carrier
Standard Quantity
Embossed Tape Reel Pack
3000
Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com
EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com
The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com
www.bourns.com
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
APRIL 2002 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
Legal Disclaimer Notice
This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and
P[ZHɉSPH[LZJVSSLJ[P]LS`¸)V\YUZ¹
Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change
^P[OV\[UV[PJL
工商网监
湘ICP备2023018690号
