TISP61521
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
TISP61521 SLIC Protector
Overvoltage Protection for High Voltage
Negative Rail Ringing SLICs
Dual Voltage-Programmable Protectors
- Supports Battery Voltages Down to
-150 V
- Low 3 mA max. Gate Triggering
Current
- High 150 mA min. Holding Current
Rated for International Surge Wave
Shapes
D Package (Top View)
K1
Additional Information
K1 (Tip)
1
8
2
7
A
(Ground)
NC
3
6
A
(Ground)
(Ring) K2
4
5
K2 (Ring)
(Tip)
(Gate) G
MD6XANB
NC - No internal connection
Terminal typical application names shown in
parenthesis
Standard
ITSP
A
2/10
GR-1089-CORE
170
K1
ITU-T K.22
VDE 0878
50
1.2/50
IEC 61000-4-5
100
10/160
FCC Part 68
Type A
50
0.5/700
I3124
40
10/700
ITU-T K.20,
VDE 0433
IEC 61000-4-5
40
9/720
FCC Part 68
Type B
40
10/560
FCC Part 68
Type A
35
10/1000
GR-1089-CORE
30
Functional Replacements for
Device
Type
Package
Type
Functional
Replacement
LCP1511D,
LCP1521
8-pin
SmallOutline
TISP61521DR-S
WARNING Cancer and Reproductive Harm
www.P65Warnings.ca.gov
Agency Recognition
UL
File Number: E215609
K1
A
K2
G
K2
Terminals K1, K2 and A correspond to the alternative
line designators of T, R and G or A, B and C. The
negative protection voltage is controlled by the
voltage, VGG, applied to the G terminal.
SD6XAEB
Description
The TISP61521 is a dual forward-conducting buffered p-gate overvoltage protector.
It is designed to protect monolithic SLICs (Subscriber Line Interface Circuits) against
overvoltages on the telephone line caused by lightning, a.c. power contact and induction.
The TISP61521 limits voltages that exceed the SLIC supply rail voltage. The TISP61521
parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE,
Issue 1 and ITU-T recommendation K.20.
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage
in the region of -20 V to -150 V. The protector gate is connected to this negative supply. This
references the protection (clipping) voltage to the negative supply voltage. The protection
voltage will then track the negative supply voltage and the overvoltage stress on the SLIC is
minimized.
Positive overvoltages are clipped to ground by diode forward conduction. Negative
overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient
current is available from the overvoltage, then the protector will switch into a low voltage onstate condition. As the overvoltage subsides, the high holding current of TISP61521 crowbar
helps prevent d.c. latchup.
These monolithic protection devices are fabricated in ion-implanted planar vertical power
structures for high reliability and in normal system operation they are virtually transparent.
The TISP61521 buffered gate design reduces the loading on the SLIC supply during
overvoltages caused by power cross and induction. The TISP61521 is available in an 8-pin
plastic small-outline surface mount package.
APRIL 2001 – REVISED JULY 2019
*RoHS Directive 2015/863, Mar 31, 2015 and Annex.
Specifications are subject to change without notice.
Users should verify actual device performance in their
specific applications.
The products described herein and this document are
subject to specific legal disclaimers as set forth on the
last page of this document, and at www.bourns.com/
docs/legal/disclaimer.pdf.
CONTACT
............UL Recognized Component
A
1.2/50
PRODUCT TECHNICAL INVENTORY SAMPLES
SELECTOR LIBRARY
Description
Device Symbol
Voltage
Waveshape
Click these links for more information:
How to Order
Device
Package
Carrier
Order As
TISP61521
D (8-pin Small-Outline)
Embossed
Tape Reeled
TISP61521DR-S
TISP61521 SLIC Protector
Absolute Maximum Ratings, TJ = 25 °C (Unless Otherwise Noted)
Rating
Repetitive peak off-state voltage, VGK = 0, -40 °C ≤ TJ ≤ 85 °C (see Note 1)
Repetitive peak gate-cathode voltage, VKA = 0, -40 °C ≤ TJ ≤ 85°C (see Note 1)
Symbol
Value
Unit
VDRM
-175
V
VGKRM
-162
V
Non-repetitive peak on-state pulse current (see Note 2)
2/10 μs (GR-1089-CORE, 2/10 μs voltage waveshape)
170
1/20 μs (K.22, VDE0878, 1.2/50 voltage waveshape)
50
8/20 μs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
100
10/160 μs (F CC Part 68, 10/160 μs voltage waveshape)
0.2/310 μs (I3124, 0.5/700 μs voltage waveshape)
50
ITSP
40
5/310 μs (VDE 0433, 10/700 μs voltage waveshape)
40
5/310 μs (I TU-T K.20/21, K.44 10/700 μs voltage wave shape)
40
5/320 μs (F CC Part 68, 9/720 μs voltage waveshape)
40
10/560 μs (F CC Part 68, 10/560 μs voltage waveshape)
35
10/1000 μs (GR-1089-CORE, 10/1000 μs voltage waveshape)
30
A
Non-repetitive peak on-state current, 50 Hz (see Notes 2 and 3)
0.01 s
ITSM
1s
Non-repetitive peak gate current, 10 ms half-sine wave, cathodes commoned (see Notes 1 and
2)
15
A
5
IGSM
+2
A
Junction temperature
TJ
-40 to +150
°C
Storage temperature range
Tstg
-65 to +150
°C
NOTES: 1. These voltage ratings are set by the -150 V maximum supply voltage plus the 12 V diode overshoot (VGKRM) and the 25 V SCR
overshoot (V DRM).
2. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions. The
rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal
pairs may have their rated current values applied simultaneously (in this case, the Ground terminal current will be twice the rated
current value of an individual terminal pair).
3. Values for V GG = -48 V. For values at other voltages, see Figure 2.
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
Recommended Operating Conditions
Component
C1
RS
Gate decoupling capacitor
Min
Typ
100
220
Max
Unit
nF
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level surge survival
25
Ω
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level and 2/10 second-level
surge survival
40
Ω
series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector
10
Ω
series resistor for K.44 4 kV 10/700 surge survival
60
Ω
series resistor for FCC Part 68 Type A 10/160 and 10/560 surge survival
20
Ω
series resistor for FCC Part 68 Type B 9/720 surge survival
0
Ω
series resistor for VDE 0433 2 kV 10/700 surge survival
10
Ω
series resistor for VDE 0878 2 kV 1.2/50 surge survival
0
Ω
series resistor for IEC 6100-4-5 4 kV, 10/700, class 5, long distance balanced circuits surge
survival with a 400 V primary protector
10
Ω
series resistor for IEC 6100-4-5 1.2/50-8/20 combination generator, classes 0 to 5 (500 V to
4 kV maximum), short distance balanced circuits surge survival.
0
Ω
Electrical Characteristics, TJ = 25 °C (Unless Otherwise Noted)
Parameter
ID
Off-state current
Test Conditions
V D = VDRM , VGK = 0
Max
Unit
TJ = 25 °C
Min
Typ
-5
μA
TJ = 85 °C
-50
μA
VGG = -48 V, CG = 220 nF
10/700, I TM = -30 A, R S = 10 Ω
1.2/50, I TM = -30 A, R S = 10 Ω
2/10, I TM = -38 A, R S = 62 Ω ,
7
10
25
Forward voltage
I F = 5 A, tw = 500 μs
2
V
Peak forward recovery
voltage
10/700, I F = 30 A, RS = 10 Ω
1.2/50, I F = 30 A , RS = 10 Ω
2/10, I F = 38 A, RS = 62 Ω ,
5
7
12
V
Holding current
I T = -1 A, di/dt = 1A/ms, V GG = -100 V
IGKS
Gate reverse current
VGG = VGK = VGKRM, VKA = 0
IGT
Gate trigger current
VGT
Gate-cathode trigger
voltage
CKA
Cathode-anode offstate capacitance
f = 1 MHz, V d = 1 V, IG = 0, (see Note 4)
Gate-cathode impulse
VGK(BO)
breakover voltage
VF
VFRM
IH
-150
V
mA
TJ = 25 °C
-5
μA
TJ = 85 °C
-50
μA
I T = -3 A , t p(g) ≥ 20 μs, VGG = -100 V
3.0
mA
IT = -3 A , t p(g) ≥ 20 μs, VGG = -100 V
2.0
V
VD = -3 V
100
pF
VD = -48 V
50
pF
NOTE 4: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
Thermal Characteristics
Parameter
RθJA
Test Conditions
Min
Typ
TA = 25 °C, EIA/JESD51-3 PCB, EIA /JESD512 environment, PTOT = 1.7 W
Junction to free air thermal resistance
Max
Unit
170
°C/W
Parameter Measurement Information
+i
IFSP (= |
Quadrant I
|)
TSP
Forward
Conduction
Characteristic
IFSM (= |I TSM|)
IF
VF
V GK(BO)
V GG
-v
VD
ID
+v
I
I(BO)
IS
V(BO)
VS
IH
VT
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
PM6XAAA
Figure 1. Voltage-Current Characteristic
Unless Otherwise Noted, All Voltages are Referenced to the Anode
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
Thermal Information
ITSM — Peak Non-Recurrent 50 Hz Current — A
20
PEAK NON-RECURRING AC
vs
CURRENT DURATION
TI61AF
RING AND TIP TERMINALS:
Equal ITSM values applied
simultaneously
GROUND TERMINAL:
Current twice I TSM value
15
10
8
7
6
5
4
EIA / JEDSD51
Environment and
PCB, T A = 25 ° C
3
VGG = -80 V
VGG = -60 V
2
1.5
1
0.8
0.7
0.6
0.5
0.01
VGG = -100 V
VGG = -120 V
0.1
1
10
100
t — Current Duration — s
1000
Figure 2. Non-Repetitive Peak On-State Current against Duration
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
APPLICATIONS INFORMATION
Gated Protectors
This section covers three topics. First, it is explained why gated protectors are needed. Second, the voltage limiting action of the protector is
described. Third, an example application circuit is described.
Purpose of Gated Protectors
Fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic SLICs (Subscriber Line Interface
Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. As the SLIC was usually powered
from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. The TISP1072F3 is a typical example
of a fixed voltage SLIC protector.
SLICs have become more sophisticated. To minimize power consumption, some designs automatically adjust the driver supply voltage to a value
that is just sufficient to drive the required line current. For short lines, the supply voltage would be set low, but for long lines, a higher supply
voltage would be generated to drive sufficient line current. The optimum protection for this type of SLIC would be given by a protection voltage
which tracks the SLIC supply voltage. This can be achieved by connecting the protection thyristor gate to the SLIC VBATH supply, Figure 3. This
gated (programmable) protection arrangement minimizes the voltage stress on the SLIC, no matter what value of supply voltage.
SLIC
PROTECTOR
IK
IF
Th5
TISP
61521
C1
220 nF
SLIC
PROTECTOR
SLIC
Th5
TISP
61521
IG
V BAT
AI6XABA
Figure 3. Negative Overvoltage Condition
SLIC
C1
220 nF
V BAT
AI6XACA
Figure 4. Positive Overvoltage Condition
Operation of Gated Protectors
Figure 3 and Figure 4 show how the TISP61521 limits negative and positive overvoltages. Positive overvoltages (Figure 4) are clipped by
the antiparallel diode of Th5 and the resulting current is diverted to ground. Negative overvoltages (Figure 3) are initially clipped close to the
SLIC negative supply rail value (VBATH). If sufficient current is available from the overvoltage, then Th5 will switch into a low voltage on-state
condition. As the overvoltage subsides, the high holding current of Th5 prevents d.c. latchup. The protection voltage will be the sum of the gate
supply (VBATH) and the peak gate-cathode voltage (VGK(BO)). The protection voltage will be increased if there is a long connection between
the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse, the gate current (IG) is the same as the
cathode current (IK). Rates of 70 A/μs can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring track. To minimize this inductive voltage
increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimized. Inductive voltages in the protector
cathode wiring will also increase the protection voltage. These voltages can be minimized by routing the SLIC connection through the protector
as shown in Figure 6.
Figure 5, which has a 10 A/μs rate of impulse current rise, shows a positive gate charge (QGS) of about 0.1 μC. With the 0.1 μF gate
decoupling capacitor used, the increase in gate supply is about 1 V (= QGS/C1). This change is just visible on the -72 V gate voltage, VBATH.
But the voltage increase does not directly add to the protection voltage, as the supply voltage change reaches a maximum at 0.4 μs, when the
gate current reverses polarity, and the protection voltage peaks earlier at 0.3 μs. In Figure 5, the peak clamping voltage (V(BO)) is -77.5 V, an
increase of 5.5 V on the nominal gate supply voltage. This 5.5 V increase is the sum of the supply rail increase at that time, (0.5 V), and the
protection circuit’s cathode diode to supply rail breakover voltage (5 V). In practice, use of the recommended 220 nF gate decoupling capacitor
would give a supply rail increase of about 0.3 V and a V(BO) value of about -77.3 V.
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
0
Voltage - V
-20
VK
-40
VBATH
-60
-80
0.0
0.5
1.0
1.5
Time - μs
AI6XD E
1
QGS
IG
-1
-2
IK
-A
Current - A
0
-3
-4
-5
0.0
0.5
1.0
1.5
Time - μs
Figure 5. Protector Fast Impulse Clamping and Switching Waveforms
Application Circuit
Figure 6 shows a typical TISP61521 SLIC card protection circuit. The incoming line conductors, Ring (R) and Tip (T), connect to the relay
matrix via the series overcurrent protection. Fusible resistors, fuses and positive temperature coefficient (PTC) resistors can be used for
overcurrent protection. Resistors will reduce the prospective current from the surge generator for both the TISP61521 and the ring/test
protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator
configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as
its inter-conductor protection voltage is twice the conductor to ground value.
Relay contacts 3a and 3b connect the line conductors to the SLIC via the TISP61521 protector. The protector gate reference voltage comes
from the SLIC negative supply (VBATH). A 220 nF gate capacitor sources the high gate current pulses caused by fast rising impulses.
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
TIP
WIRE
OVERCURRENT
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
Th1
RSA
SLIC
RELAY
S3a
SLIC
PROTECTOR
SLIC
Th4
S2a
S1a
Th3
RING
WIRE
RSB
Th5
Th2
TISP
3xxxF3
OR
7xxxF3
S3b
S1b
TEST
EQUIPMENT
S2b
RING
GENERATOR
TISP
61521
C1
220 n F
V BAT
AI6XAA B
Figure 6. Typical Application Circuit
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
TISP61521 SLIC Protector
MECHANICAL DATA
Device Symbolization Code
Devices will be coded as follows:
Device
Symbolization
Code
TISP61521DR-S
61521
Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com
EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com
The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com
www.bourns.com
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
APRIL 2001 – REVISED JULY 2019
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
Legal Disclaimer Notice
This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and
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Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change
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