TISP8210MDR-S

TISP8210MD BUFFERED P-GATE SCR DUAL TISP8211MD BUFFERED N-GATE SCR DUAL COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION TISP821xMD Overvoltage Protectors High Performance Protection for SLICs with +ve & -ve Battery Supplies TISP8210MD Negative Overvoltage Protector – Wide 0 to -110 V Programming Range – Low +5 mA Max. Gate Triggering Current – High -150 mA Min. Holding Current Additional Information Click these links for more information: PRODUCT TECHNICAL INVENTORY SAMPLES SELECTOR LIBRARY Agency Recognition TISP8211MD Positive Overvoltage Protector – Wide 0 to +110 V Programming Range – Low -5 mA Max. Gate Triggering Current – +20 mA Min. Holding Current Description UL File Number: E215609 Rated for International Surge Wave Shapes Wave Shape Standard 2/10 GR-1089-CORE TISP8210MD 8-SOIC Package (Top View) IPPSM A G1 167 1 8 NC A 10/700 ITU-T K.20/21/45 70 K1 2 7 10/1000 GR-1089-CORE 60 K2 3 6 A G2 4 5 NC ................................................... UL Recognized Component MDRXAKC NC - No internal connection Circuit Application Diagram TISP8210MD Device Symbol SLIC PROTECTION K1 Tip G1 C2 100 nF A A G2 C1 100 nF SDRXAJB K2 TISP8211MD 8-SOIC Package (Top View) G1 Ring TISP8210MD TISP8211MD 1 8 NC K +VBAT A1 2 7 - VBAT A2 3 6 K G2 4 5 NC AI-TISP8-003-a MDRXALC NC - No internal connection TISP8211MD Device Symbol A1 WARNING Cancer and Reproductive Harm www.P65Warnings.ca.gov JANUARY 2006 – REVISED JULY 2019 *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. G1 K K G2 A2 SDRXAKB CONTACT TISP821xMD Overvoltage Protectors Description The TISP8210MD / TISP8211MD protector combination has been designed to protect dual polarity supply rail SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning and a.c. power contact and induction. Both devices have been designed using the latest understanding of programmable protector technology to maximize performance. The TISP8210MD and TISP8211MD are complementary programmable protection devices. The program or gate pins (G1, G2) are connected to the positive and negative SLIC battery supplies to give protection which will track the SLIC supply levels. The integrated transistor buffer is an essential element in this type of device as the current gain of around 150 reduces battery loading to below 5 mA during a.c. power induction or power contact conditions. Additionally the Base-Emitter junction acts as a reverse blocking diode during operation preventing unnecessary loading of the power supply. The TISP8210MD / TISP8211MD combination is designed to be used in conjunction with the 12.5 Ω Bourns® 4A12P-1AH-12R5 Line Protection Module (LPM). With this solution the application should pass Telcordia GR-1089-CORE testing with the 4A12P-1AH-12R5 acting as the overcurrent protector and coordination element. The TISP® device plus LPM solution is designed to work in harmony with the system primary protectors. GR-1089-CORE issue 3 lists test to allow for three types of primary protection: Carbon Block (1000 V); Gas Discharge Tube (600 V) and Solid State (400 V). This solution is designed to be used with the GDT and Solid State options. Under lightning conditions the current through the 12.5 Ω LPM will be 48 A (600 V / 12.5 Ω), which is well within the 60 A capability of the TISP8210MD / TISP8211MD combination. How to Order Device TISP8210MD Package TISP8211M D 8-SOIC Carrier Embossed Tape Reeled Order As TISP8210MDR-S Marking Code 8210M TISP8211M DR- S 8211M Standard Quantity 2500 TISP8210MD Absolute Maximum Ratings, TA = 25 °C Symbol Value Unit Repetitive peak off-state voltage, VGK = 0 Rating VDRM -120 V Repetitive peak reverse voltage, VGA = -7 0 V VRRM 120 IPPSM -167 -70 -60 A ITSM -11 -6.5 -3.4 -1.4 -1.3 A TJ -55 to +15 0 °C Tstg -65 to +15 0 °C Non-repetitive peak impulse current (see Note 1) 2/10 μs (Telcordia GR-1089-CORE, 2/10 μs voltage wave shape) 5/310 μs (ITU-T K.44, 10/700 μs voltage wave shape used in K.20/21/45) 10/1000 μs (Telcordia GR-1089-CORE, 10/1000 μs voltage wave shape) Non-repetitive peak on-state cur rent, 50/60 Hz (see Notes 1 and 2) 100 ms 1s 5s 300 s 900 s Junctio n temperature Storage temperature range NOTES: 1. Initially the protector must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetiti ve rated terminal currents are for the TISP8210MD and TISP8211MD together. Device (A)-terminal positive current values are conducted by the TISP8211MD and (K)-terminal negative current values by the TISP8210MD. JANUARY 2006 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP821xMD Overvoltage Protectors TISP8211MD Absolute Maximum Ratings, TA = 25 °C Symbol Value Unit Repetitive peak off-state voltage, VGA = 0 Rating VDRM 120 V Repetitive peak reverse voltage, VGK = 70 V VRRM -120 IPPSM 167 70 60 A ITSM 11 6.5 3.4 1.4 1.3 A TJ -55 to +150 °C Tstg -65 to +150 °C Non-repetitive peak impulse current (see Note 3) 2/10 μs (Telcordia GR-1089-CORE, 2/10 μs voltage wave shape) 5/310 μs (ITU-T K.44, 10/700 μs voltage wave shape used in K.20/21/45) 10/1000 μs (Telcordia GR-1089-CORE, 10/1000 μs voltage wave shape) Non-repetitive peak on-state current, 50/60 Hz (see Notes 3 and 4) 100 ms 1s 5s 300 s 900 s Junction temperature Storage temperature range NOTES: 3. Initially the protector must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial conditions. 4. These non-repetitive rated terminal currents are for the TISP8210MD and TISP8211MD together. Device (A)-terminal positive current values are conducted by the TISP8211MD and (K)-terminal negative current values by the TISP8210MD. Recommended Operating Conditions Min Typ C1, C 2 Gate decoupling capacitor See Figure 3 100 220 Max Unit nF R1, R2 Series resistance for Telcordia GR-1089-CORE 10 12.5 Ω TISP8210MD Electrical Characteristics, TA = 25 °C Pa rameter Test Conditions Min Typ Max Unit IDRM Repetitive peak off-state current VD = VDRM, VGK = 0 -5 μA IRRM Repetitive peak reverse current VR = VRRM, VGA = -70 V 5 μA V(BO) Breakover voltage IH Holding current IGT Gate trigger current CO Off-state capacitance dv/dt = -250 V/ms, RSOURCE = 300 Ω, VGA = -80 V (IK) IT = -1 A, di/dt = 1 A/ms, VGA = -80 V - 82 - 150 V mA (IK) IT = -5 A, tp(g) ≥ 20 μs, VGA = -80 V 5 mA f = 1 MHz, Vd = 1 V, VD = ±2 V 40 pF TISP8211MD Electrical Characteristics, TA = 25 °C Max Unit IDRM Repetitive peak off-state current Parameter VD = VDRM, VGA = 0 5 μA IRRM Repetitive peak reverse current VR = VRRM, VGK = 70 V -5 μA V(BO) Breakover voltage dv/dt = 250 V/ms, RSOURCE = 300 Ω, VGK = 80 V 82 IH Holding current IGT Gate trigger current CO Off-state capacitance Test Conditions (IA) IT = 1 A, di/dt = -1 A/ms, VGK = 80 V Min Typ 20 V mA (IA) IT = 5 A, tp(g) ≥ 20 μs, VGK = 80 V -5 mA f = 1 MHz, Vd = 1 V, VD = ±2 V 30 pF Thermal Characteristics Parameter RθJA Junction to ambient thermal resistance Test Conditions Ptot = 0.52 W, TA = 70 °C, 5 cm 2, FR4 PCB Min Typ Max U nit 160 °C/W JANUARY 2006 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP821xMD Overvoltage Protectors Parameter Measurement Information +i Quadrant I Blocking Characteristic VGK(BO) VGA -v VD IR IRRM ID VR VRRM +v IH V(BO) ITSM Quadrant III IPPSM Switching Characteristic PM8XACBa -i Figure 1. TISP8210MD KA Terminal Characteristic +i Quadrant I IPPSM Switching Characteristic ITSM V(BO) IH -v VRRM VR ID IR IRRM VD +v VGK V GA(BO) Quadrant III Blocking Characteristic -i PM8XABBa Figure 2. TISP8211MD AK Terminal Characteristic JANUARY 2006 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP821xMD Overvoltage Protectors Applications Information Primary Protection 0V Overcurrent Protection TISP8211MD C2 100 nF TISP8210MD RING SLIC TIP Telcordia GR-1089-CORE Issue 3 compliant LPM (Bourns 4A12P-1AH-12R5) V BATH C1 100 nF 0V AI-TISP8-004-a Figure 3. Typical Application Circuit Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com “TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office. “Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries. JANUARY 2006 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Legal Disclaimer Notice This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and P[ZHɉSPH[LZJVSSLJ[P]LS`¸)V\YUZ¹ Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change ^P[OV\[UV[PJL