TISP8250DR-S

TISP8250D UNIDIRECTIONAL P-GATE THYRISTOR OVERVOLTAGE AND OVERCURRENT PROTECTOR TISP8250D Overvoltage and Overcurrent Protector Agency Recognition Telecommunication System 30 A 10/1000 Protector Ion-Implanted Breakdown Region - Precise and Stable Voltage Device Name Description VDRM V(BO) 250 340 V TISP8250D V Rated for International Surge Wave Shapes Wave Shape Standard 2/10 GR-1089-CORE 10/700 ITU-T K.20/21 0.5/700 10/1000 UL File Number: E215609 8-SOIC Package (Top View) IPPSM A 75 CNET I 31-24 40 GR-1089-CORE 30 40 G 1 8 A NC 2 7 A NC 3 6 A K 4 5 A NC - No internal connection Device Symbol A Functional Replacement for TPP25011 MD8XAAA .................................................... UL Recognized Component Description The TISP8250D is a P-gate reverse-blocking thyristor (SCR) designed for the protection of telecommunications equipment against overvoltages and overcurrents on the telephone line G caused by lightning, a.c. power contact and induction. The fixed voltage and current triggered modes make the TISP8250D SD8XAA particularly suitable for the protection of ungrounded customer K premise equipment. Connected across the d.c. side of a telephone set polarity bridge, in fixed voltage mode these devices can protect the ringer in the on-hook condition. In an off-hook condition, either the fixed voltage or current triggered modes can protect the following telephone electronics. Without external gate activation, the TISP8250D is a fixed voltage protector. The maximum working voltage without clipping is 250 V and the protection voltage is 340 V. Lower values of protection voltage may be set by connecting an avalanche breakdown diode of less than 250 V between the TISP8250D gate and anode (see Figure 2.) By connecting a small value resistor in series with the line conductor and connecting the TISP8250D gate cathode terminals in parallel with the resistor, conductor overcurrents can gate trigger the TISP8250D into conduction. Overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. Overcurrents develop sufficient voltage across the external gate-cathode resistor to trigger the device into a lowvoltage on state. This low-voltage on state causes the current resulting from the overstress to be safely diverted through the device. The high crowbar holding current helps prevent d.c. latchup as the diverted current subsides. How To Order Device TISP8250D Carrier Order As Marking Code Standard Quantity Embossed Tape Reeled TISP8250DR-S 8250 2500 Package 8-SOIC JULY 2000 – REVISED JULY 2019 WARNING Cancer and Reproductive Harm www.P65Warnings.ca.gov *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP8250D Overvoltage and Overcurrent Protector Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted) Symbol Value Unit 2/10 μs (Telcordia GR-1089-CORE, 2/10 μs waveshape) 0.2/310 (CNET I 31-24, 0.5/700 μs waveshape) 5/310 μs (ITU-T K.20/21, 10/700 μs voltage waveshape) 5/310 μs (FTZ R12, 10/700 μs voltage waveshape) 10/1000 μs (Telcordia GR-1089-CORE, 10/1000 μs voltage waveshape) IPPSM 75 40 40 40 30 A 10 ms half sine wave 1s rectified sine wave 1000 s rectified sine wave ITSM 5 3.5 0.7 A TJ -40 to +150 °C Repetitive peak off-state voltage (see Note 1) Rating 250 VDRM Non-repetitive peak impulse current (see Notes 2, 3 and 4) Non-repetitive peak on-state current, 50 Hz (see Notes 2, 3 and 4) Junction temperature Storage temperature range NOTES: 1. 2. 3. 4. V -65 to +150 Tstg °C For voltage values at lower temperatures, derate at 0.13 %/°C. Initially the device must be in thermal equilibrium, with TJ = 25 °C. The surge may be repeated after the device returns to its initial conditions. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A printed wiring track widths. Derate current values at -0.61 %/°C for ambient temperatures above 25 °C. Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted) Parameter IDRM Repetitive peak off-state current V(BO) Breakover voltage I(BO) IH VGK IGT ID CO Breakover current Holding current Gate-cathode voltage Gate trigger current Off-state current Off-state capacitance Test Conditions VD = VDRM dv/dt = 250 V/ms, RSOURCE = 300 Ω dv/dt = 250 V/ms, RSOURCE = 300 Ω IT = 5 A, di/dt = -30 mA/ms IG = 30 mA VAK = 100 V VD = 60 V f = 1 MHz, Vd = 1 V rms, VD = 5 V TA = 25 °C TA = 85 °C Min Typ Max Unit 5 10 15 180 0.6 340 μA V 200 mA 1.2 mA V 40 mA 5 100 μA pF Thermal Characteristics, TA = 25 °C (Unless Otherwise Noted) Parameter RθJA NOTE Junction to ambient thermal resistance Test Conditions EIA/JESD51-3 PCB, IT = ITSM(1000) (see Note 5) Min Typ Max Unit 170 °C/W 5. EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5A rated printed wiring track widths. Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com Europe: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com JULY 2000 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP8250D Overvoltage and Overcurrent Protector Parameter Measurement Information +i Quadrant I Anode Positive Switching Characteristic V(BO) IH I(BO) ID -v IDRM VD +v VDRM Quadrant III Anode Negative Reverse Characteristic PM8XAAA -i Figure 1. Voltage-Current Characteristic for A and K Terminals All Measurements are Referenced to the K Terminal Avalanche diode V(BR) < 250 V A TISP8250D G K AI8XACAa Figure 2. Overvoltage Protection Circuit JULY 2000 – REVISED JULY 2019 “TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is registered in the U.S. Patent and Trademark Office. “Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Legal Disclaimer Notice This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and P[ZHɉSPH[LZJVSSLJ[P]LS`¸)V\YUZ¹ Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change ^P[OV\[UV[PJL