3650MGHG

® 3650 3652 Optically-Coupled Linear ISOLATION AMPLIFIERS FEATURES q BALANCED INPUT q LARGE COMMON-MODE VOLTAGES: ±2000V Continuous 140dB Rejection q ULTRA LOW LEAKAGE: 0.35µA max at 240V/60Hz 1.8pF Leakage Capacitance q EXCELLENT GAIN ACCURACY: 0.05% Linearity 0.05%/1000 Hrs Stability q WIDE BANDWIDTH: 15kHz ±3dB 1.2V/µs Slew Rate APPLICATIONS q INDUSTRIAL PROCESS CONTROL q DATA ACQUISITION q INTERFACE ELEMENT q BIOMEDICAL MEASUREMENTS q PATIENT MONITORING q TEST EQUIPMENT q CURRENT SHUNT MEASUREMENT q GROUND-LOOP ELIMINATION q SCR CONTROLS DESCRIPTION The 3650 and 3652 are optically coupled integrated circuit isolation amplifiers. Prior to their introduction commercially available isolation amplifiers had been modular or rack mounted devices using transformer coupled modulation demodulation techniques. Compared to these earlier isolation amplifiers, the 3650 and 3652 have the advantage of smaller size, 6 4 1.6MΩ 8 RG1 lower cost, wider bandwidth and integrated circuit reliability. Also, because they use a DC analog modulation technique as opposed to a carrier-type technique, they avoid the problems of electromagnetic interference (both transmitted and received) that most of the modular isolation amplifiers exhibit. A1 11 RIN RG2 A3 Light Flux Coupling A4 23 3 1 1.6MΩ A1 9 10 3652 Only Common to 3650 and 3652 International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1976 Burr-Brown Corporation PDS-342L 1 Printed in U.S.A. 3650/52 August, 1997 SBOS129 SPECIFICATIONS At +25°C and ±15VDC supply voltages, unless otherwise specified. PRODUCT ISOLATION Isolation Voltage Rated Continuous, min Tested Voltage, min, 10s Duration Isolation Mode Rejection, G = 10 DC 60Hz, 5000Ω Source Unbalance Leakage Current, 240V/60Hz Isolation Impedance Capacitance Resistance GAIN Gain Equation for Current Sources for Voltage Sources Input Resistance, RIN, max Buffer Output Impedance, RO Gain Equation Error, max(3) Gain Nonlinearity Gain vs Temperature Gain vs Time Frequency Response Slew Rate ±3dB Frequency Settling Time to ±0.01% to ±0.1% INPUT STAGE(5) Input Offset Voltage at 25°C, max(3) vs Temperature, max vs Supply vs Time Input Bias Current at 25°C vs Temperature vs Supply Input Offset Current vs Temperature vs Supply Input Impedance Differential Common-Mode Input Noise Voltage, 0.05Hz to 100Hz 10Hz to 10kHz Input Voltage Range Common-Mode, Linear Operation, w/o damage, at +, – at +I, –I at +IR, –IR Differential, w/o damage, at +, – Differential, w/o damage, at +I, –I Differential, w/o damage, at +IR, –IR Common-Mode Rejection, 60Hz Power Supply (Input Stage Only) Voltage (at “+V” and “–V”) Current Quiescent with ±10V Output(7) ±5mV ±25µV/°C ±1mV ±10µV/°C 100µV/V 50µV/1000hrs 10nA typ, 40nA max 0.3nA/°C 0.2nA/V Effects Included In Output Offset “RIN” = 25Ω max 109Ω 4µVp-p 4µVrms ±(|V| –5)V ±V Not Applicable(6) Not Applicable(6) ±V Not Applicable Not Applicable 90dB at 60Hz, 5kΩ Imbalance ±8V to ±18V ±1.2mA(8) +6.5mA or –6.5mA, typ +12mA or –12mA, max ±0.5mV ±5µV/°C ±5mV ±50µV/°C ±2mV ±25µV/°C G1 = 106V/Amp 106 V/V RG1 + RG2 + RIN 25Ω Not Applicable G1 = 1.0057 x 106V/Amp(2) 106 V/V RG1 + RG2 + RIN + RO 25Ω 90Ω ±30Ω 2000Vp or VDC 5000Vp 140dB 120dB 0.35µA, max 1.8pF 1012Ω 3650MG, HG(1) 3650JG 3650KG 3652MG, HG(1) 3652JG GV1 = 1.5% 0.5% 0.5% 1.5%(4) 0.5%(4) ±0.05% typ ±0.2% max ±0.03% typ ±0.1% max ±0.02% typ ±0.05% max ±0.05% typ ±0.2% max ±0.05% typ ±0.1% max 300ppm/°C 100ppm/°C 50ppm/°C 300ppm/°C 200ppm/°C ±0.05%/1000hrs ±0.05%/1000hrs 0.7V/µs min, 1.2V/µs typ 15kHz 400µs 200µs 100µV/V 100µV/1000hrs 10pA typ, 50pA max Doubles Every +10°C 1pA/V 10pA Doubles Every +10°C 1pA/V 1011Ω 1011Ω 8µVp-p 5µVrms ±(|V| –5) ±V ±300V for 10ms(7) ±3000V for 10ms(7) ±V ±600V for 10ms(7) ±6000V for 10ms(7) 80dB at 60Hz, 5kΩ Imbalance ±8V to ±18V ±3mA(8) +8.5mA or –8.5mA, typ +16mA, or –16mA, max ® 3650/52 2 SPECIFICATIONS PRODUCT OUTPUT STAGE Output Voltage, min Output Current, min Output Offset Voltage at 25°C, max(3) vs Temperature, max vs Supply vs Time Output Noise Voltage 0.05Hz to 100Hz 10Hz to 1kHz Power Supply (Output Stage Only) Voltage (“+VCC” and “–VCC”) Current Quiescent with ±5mA Output, max TEMPERATURE(9) Specification Operating Storage (CONT) 3650MG, HG(1) 3650JG ±10V ±5mA ±25mV ±900µV/°C ±10mV ±450µV/°C ±500µV/V ±1mV/1000hrs 50µVp-p 65µVrms ±8V to ±18V ±2.3mA typ, ±6mA max ±11mA 0°c to +85°C –40°C to +100°C –40°C to +125°C ±10mV ±300µV/°C ±25mV ±900µV/°C 3650KG 3652MG, HG(1) ±10V ±5mA ±10mV ±450µV/°C 3652JG At +25°C and ±15VDC supply voltages, unless otherwise specified. ±500µV/V ±1mV/1000hrs 50µVp-p 65µVrms NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage at 25°C, max: ±10mV; vs temperature max: ±100µV/°C; (c) Output offset voltage at 25°C, max; ±50mV; vs temperature max; ±1.8mV/°C. (2) If used as 3650, see Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e., ±1 or ±IR pins). (5) Input stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating. (8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt < 1°C/minute below 0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range. PIN CONFIGURATIONS 13 14 PACKAGE INFORMATION 3650 PRODUCT 26 PACKAGE 32-Pin DIP 32-Pin DIP PACKAGE DRAWING NUMBER(1) 77 77 –V 11 + +V +VCC –VCC 10 12 C – C Bal Bal 3650 3652 20 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. 23 17 ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. 15 16 32 29 8 6 4 1.6MΩ RO 2 A1 Gain Adj 11 13 14 3652 –V + +V +VCC –VCC C Gain Adj RO 2 – C Bal Bal 26 20 23 17 ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 3 1 1.6MΩ A2 9 10 12 15 16 32 29 The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 3650/52 TYPICAL PERFORMANCE CURVES Typical at +25°C and ±15VDC power supplies, unless otherwise noted. INPUT STAGE SUPPLY CURRENT vs OUTPUT VOLTAGE 12 Max at 70°C 10 ISOLATION LEAKAGE CURRENT vs ISOLATION VOLTAGE 5 Supply Current (mA) Max at 25°C 8 Typ at 70°C 6 Typ at 25°C 4 2 0 –15 –10 –5 0 5 Output Voltage (V) Add 2mA typ, 4mA max for 3652 at V– at V+ 3mA 1.2mA 10 15 Typ at 25°C Leakage Current µA AC or 100s pA, DC 4 3 Typ at 60Hz 2 Typ at DC 1 0 0 1 2 3 4 5 6 Isolation Voltage (kV) NORMALIZED LINEARITY vs TEMPERATURE 1.5 160 REJECTION vs RESISTOR IMBALANCE IMR 60Hz CMR 60Hz 1.4 Relative Nonlinearity G =100 1.3 Rejection (dB) 120 G =1 3650 80 3652 3650 40 3652 G =1 G =100 G =100 G =1 1.2 1.1 1 –25 0 25 50 75 100 Temperature (°C) 0 0.25 0.50 0.75 1 Input Resistor Imbalance RG2 RG1 or RG1 + RG2 RG1 + RG2 DISTORTION vs FREQUENCY 10 VOUT = +10V RL = 2kΩ 3 2 GAIN ERROR vs FREQUENCY Gain = 1 0 Gain Error (dB) Distortion (%) –2 Gain = 100 –4 1 0.3 –6 –8 0.1 3 1 Frequency (kHz) 3 10 1 3 Frequency (kHz) 10 30 0.1 ® 3650/52 4 TYPICAL PERFORMANCE CURVES (CONT) Typical at +25°C and ±15VDC power supplies, unless otherwise noted. PHASE SHIFT vs FREQUENCY 0 15 OUTPUT VOLTAGE SWING vs INPUT SUPPLY VOLTAGE –40 Gain 1 to 100 –80 Output Voltage (V) Phase Shift (Deg) 25°C 10 Typ at 25°C 70°C –120 5 –160 –200 0.3 1 3 Frequency (kHz) 10 30 Guaranteed Min at Output Supply ±15V 0 5 10 15 20 Input Supply Voltage (V) 3650 COMMON-MODE AND ISOLATION-MODE REJECTION vs GAIN 140 DC 120 60Hz 120 140 3652 COMMON-MODE AND ISOLATION-MODE REJECTION vs GAIN DC at r Io IRp ins 60Hz at I pins 60Hz at IR pins Rejection (dB) Rejection (dB) 100 DC 100 60Hz at I pins 80 DC at I or IR pins Isolation-mode Rejection Common-mode Rejection 10 Gain 100 1000 80 60Hz Isolation-mode Rejection Common-mode Rejection 60 1 10 Gain 100 1000 60 1 60Hz at IR pins REJECTION vs FREQUENCY 140 IMR CMR Supply Voltage 14 Estimated Output Swing (+V) OUTPUT VOLTAGE AND GAIN ERROR vs TIME 0.5 70°C Gain Error Change (%) ® 120 Rejection (dB) 70°C 12 0.1 100 3650 80 3652 +V Gain Error Change 10 25°C 0.05 60 Gain = 100 40 0.1 0.3 1 3 10 30 Frequency (kHz) –V 8 100 1k 10k Time of Operation (Hours) 0 100K 5 3650/52 DEFINITIONS ISOLATION-MODE VOLTAGE, VISO The isolation-mode voltage is the voltage which appears across the isolation barrier, i.e., between the input common and the output common. (See Figure 1.) Two isolation voltages are given in the electrical specifications: “rated continuous” and “test voltage”. Since it is impractical on a production basis to test a “continuous” voltage (infinite test time is implied), it is a generally accepted practice to test at a significantly higher voltage for some reasonable length of time. For the 3650 and 3652, the “test voltage” is equal to 1000V plus two times the “rated continuous” voltage. Thus, for a continuous rating of 2000V, each unit is tested at 5000V. COMMON-MODE VOLTAGE, VCM The common-mode voltage is the voltage midway between the two inputs of the amplifier measured with respect to input common. It is the algebraic average of the voltage applied at the amplifiers’ input terminals. In the circuit in Figure 1, (V+ + V–)/2 = VCM. (NOTE: Many applications involve a large system “common-mode voltage.” Usually in such cases the term defined here as “VCM” is negligible and the system “common-mode voltage” is applied to the amplifier as “VISO” in Figure 1.) ISOLATION-MODE REJECTION The isolation-mode rejection is defined by the equation in Figure 1. The isolation-mode rejection is not infinite because there is some leakage across the isolation barrier due to the isolation resistance and capacitance. NONLINEARITY Nonlinearity is specified to be the peak deviation from a best straightline expressed as a percent of peak-to-peak full scale output (i.e. ±10mV at 20Vp-p ≈ 0.05%). THEORY OF OPERATION Prior to the introduction of the 3650 family optical isolation had not been practical in linear circuits. A single LED and photodiode combination, while useful in a wide range of digital isolation applications, has fundamental limitations— primarily nonlinearity and instability as a function of time and temperature. The 3650 and 3652 use a unique technique to overcome the limitations of the single LED and photodiode isolator. Figure 2 is an elementary equivalent circuit for the 3650, which can be used to understand the basic operation without considering the cluttering details of offset adjustment and biasing for bipolar operation. Isolation Barrier CR3 I1 λ1 RG – IIN VIN + –V A1 I3 +V I2 + –VCC Output Common Input Common VOUT = VIN RK RG λ2 – A2 VOUT CR1 CR2 I2 +VCC RK RG1 Isolation Barrier + V+ FIGURE 2. Simplified Equivalent Circuit of Linear Isolator. Two matched photodiodes are used—one in the input (CR3) and one in the output stage (CR2)—to greatly reduce nonlinearities and time-temperature instabilities. Amplifier A1, LED CR1, and photodiode CR3 are used in a negative feedback configuration such that I1 = IIN RG (where RG is the user supplied gain setting resistor). Since CR2 and CR3 are closely matched, and since they receive equal amounts of light from the LED CR1 (i.e., λ1 = λ2), I2 = I1 = IIN. Amplifier A2 is connected as a current-to-voltage converter with VOUT = I2 RK where RK is an internal 1MΩ scaling resistor. Thus the overall transfer function is: VOUT = VIN 106 , (RG in Ωs) RG VD RG2 – VCM V– RIN + VOUT IL C (Output) – C (Input) VISO System Ground VISO IMRR VOUT = 106 RG1 + RG2 + RIN VD + VCM CMRR + FIGURE 1. Illustration of Isolation-Mode and CommonMode Specifications. NOTE: (1) The only effect of decreased LED output is a slight decrease in full scale swing capability. See Typical Performance Curves. ® This improved isolator circuit overcomes the primary limitations of the single LED and photodiode combination. The transfer function is now virtually independent of any degradation in the LED output as long as the two photodiodes and optics are closely matched(1). Linearity is now a 3650/52 6 function of the accuracy of the matching and is further enhanced by the use of negative feedback in the input stage. Advanced laser trimming techniques are used to further compensate for residual matching errors. A model of the 3650 suitable for simple circuit analysis is shown in Figure 3. The output is a current dependent voltage source, VD, whose value depends on the input current. Thus, the 3650 is a transconductance amplifier with a gain of one volt per microamp. When voltage sources are used, the input current is derived by using gain setting resistors in series with the voltage source (see Installation and Operating Instructions for details). RIN is the differential input impedance. The common-mode and isolation impedances are very high and are assumed to be infinite for this model. lower bias currents (50pA) and overvoltage protection. The +IR and –IR inputs have a 10ms pulse rating of 6000V differential and 3000V common-mode (see Definitions for a discussion of common-mode and isolation-mode voltages.) The addition of the buffer amplifiers also creates a voltagein voltage-out transfer function with the gain set by RG1 and RG2. INSTALLATION AND OPERATING INSTRUCTIONS POWER SUPPLY CONNECTIONS The power supply connections for the 3650 and 3652 are shown in Figure 5. When a DC/DC converter is used for isolated power, it is placed in parallel with the isolation barrier of the amplifier. This can lower the isolation impedance and degrade the isolation-mode rejection of the overall circuit. Therefore, a high quality, low leakage DC/DC converter such as the Burr-Brown Model 722 should be used. OFFSET VOLTAGE ADJUSTMENTS The offset nulling circuits are identical for the 3650 and 3652 and are shown in Figure 5. The offset adjust circuitry is optional and the units will meet the stated specifications with the BAL terminals unconnected. Provisions are available to null both the input and output stage offsets. If the amplifier is operated at a fixed gain, normally only one adjustment will be used: the output stage (10kΩ adjustment) for low gains and the input stage (50kΩ adjustment) for high gains, (>10). Use the following procedure if it is desired to null both input and output components. (For example, if the gain of the amplifier is to be switched). The input stage offset is first nulled (50kΩ adjustment) with the appropriate input signal pins connected to input common and the amplifier set at its maximum gain. The gain is then set to its minimum value and the output offset is nulled (10kΩ adjustment). +VCC IIN + 11 26 –VCC ROUT RIN + VD – – 10 17 20 23 13 14 C (Input) 12 VD = IIN X +V –V 1V µA C (Output) FIGURE 3. Simple Model of 3650. A simplified model of the 3652 is shown in Figure 4. The isolation and output stages are identical to the 3650. Additional input circuitry consisting of FET buffer amplifiers and input protection resistors have been added to give higher differential and common-mode input impedance (1011Ω), Same as 3650 in Figure 3. 6 4 +I +IR 1.6MΩ 8 RO 2 IIN 23 RO 2 RG2 17 10 12 C (Input) C (Output) RG1 A1 11 –I 3 1.6MΩ 1 –IR A2 9 FIGURE 4. Simple Model of 3652. ® 7 3650/52 Model 722 DC/DC converter or equivalent C 14 +V + To Input Circuitry P+ 1.3kΩ I1 11 + –V 13 722 V+ E –VO V– +VO 26 +VCC –VCC 29 32 Bal 20 RIN +15VDC –15VDC 23 C 17 (!) + I2 10 – C 12 VOUT RIN 23 17 C Output Output Common – VISO – 12 Bal C 15 50kΩ(1) 16 10kΩ(1) NOTE: (1) Optional Offset Adjust. 3MΩ(1) VOUT = (I1 – I2) X 106V/A + VISO X IMRR(2) NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. (2) IMRR here is in pA/V, typically 5pA/V at 60Hz and 1pA/V at DC. FIGURE 5. Power and Offset Adjust Connections. INPUT CONFIGURATIONS Some possible input configurations for the 3650 and 3652 are shown in Figures 6a, 6b, 6c. Differential input sources are used in these examples. For situations with nondifferential inputs, the appropriate source term should be set to zero in the gain equations and replaced with a short in the diagrams. Figure 6a shows the 3650 connected as a transconductance amplifier with input current sources. Voltage sources are shown in Figure 6b. In this case the voltages are converted to currents by RG1 and RG2. As shown by the equations, they perform as gain setting resistors in the voltage transfer function. When a single voltage source is used, it is recommended (but not essential) that the gain setting resistor remain split into two equal halves in order to minimize errors due to bias currents and common-mode rejection (see Typical Performance Curves). Figure 6c illustrates the connections for the 3652 when the FET buffer amplifiers, A1 and A2, are used. This configuration provides an isolation amplifier with high input impedance (both common-mode and differential, and good common-mode and isolation-mode rejection. It is a true isolated instrumentation amplifier which has many benefits for noise rejection when source impedance imbalances are present. In the 3652, the voltage gain of the buffer amplifiers is slightly less than unity, but the gain of the output stage has been raised to compensate for this so that the overall transfer function from the ±I or ±IR inputs to the output is correct. It should be noted that A1 and A2 are buffer amplifiers. No summing can be done at the ±I or ±IR inputs. Figure 6c shows the +I and –I inputs used. If more input voltage protection is desired, then the +IR and –IR inputs should be used. This will increase the input noise due to the contribution from the 1.6MΩ resistors, but will provide additional differential and common-mode protection (10ms rating of 3kV). ® FIGURE 6a. 3650 with Differential Current Sources. V1 RG1 11 + RIN V2 RG2 23 C 17 (1) + 10 – C 12 VOUT – VISO VOUT = (V1 – V2) + VISO IMRR 106Ω RG1 + RG2 + RIN + RO NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. FIGURE 6b. 3650 with Differential Voltage Sources. ERROR ANALYSIS A model of the 3650 suitable for DC error analysis of offset voltage, voltage drift versus temperature, bias current, etc., is shown in Figure 7. A1 and A2, the input and output stage amplifiers, are considered to be ideal. Separate external generators are used to model the offset voltages and bias currents. RIN is assumed to be small relative to RG1 and RG2 and is therefore omitted from the gain equation. The feedback configuration, optics and component matching are such that I1 = I2 = I3 = I4. A simple circuit analysis gives the following expression for the 8 3650/52 +IR V1 6 4 +I A1 8 RO 2 +0 RG1 11 + RIN V2 –I 3 1 –IR A2 9 RO 2 23 C 17 (1) + –0 RG2 10 – C 12 VOUT – VISO IMRR 106Ω RG1 + RG2 + RIN + RO VISO VOUT = (V1 – V2) + NOTE: (1) The offset adjustment circutry and power supply connections have been omitted for simplicity. Refer to Figure 5 for details. FIGURE 6c. 3652 with Differential Voltage Sources. 1MΩ IB1 RG1 + RG2 – IB2 EOSI – A1 + I2 C (Output) C (Input) I 1 = I2 = I3 = I4 + I1 λ EOSO I3 – A2 I4 Optics FIGURE 7. DC Error Analysis Model for 3650. total output error voltage due to offset voltages and bias currents. 106 VOUT-TOTAL = [EOSI + (IB1 RGI – IB2 RG2)]+ EOSO (1) RG1 + RG2 Offset current is defined as the difference between the two bias currents IB1 and IB2. If IB1 = IB and IB2 = IB +IOSI then, for RG1 = RG2, VOUT – IB = 106 IOS 2 OUTPUT NOISE The total output noise is given by: EN (RMS) = √(ENIG)2 + (ENO)2 where EN (RMS) = Total output noise ENI = RMS noise of the input stage ENO = RMS noise of the output stage G = 106/(RG1 + RG2) ENO includes the noise contribution due to the optics and the noise currents of the output stage. Errors created by the noise current of the input stage are insignificant compared to other noise sources and are therefore omitted. The effects of temperature may be analyzed by replacing the offset terms with their corresponding temperature gradient terms: VOUT ©∆ VOUT/∆T, EOSI ©∆EOSI/∆T, etc. For a complete analysis of the effects of temperature, gain variations must also be considered. This component of error is not a function of gain and is therefore included as a part of EOSO specifications. The output errors due to the output stage bias current are also included in EOSO. This results in a very simple equation for the total error: VOUT-TOTAL = 106 EOSI 2RG1 + EOSO (for RG1 = RG2). (2) In summary, it should be noted that equation (2) should be used only when RG1 = RG2. When RG1 ≠ RG2, equation (1) applies. ® 9 3650/52 COMMON-MODE AND ISOLATION-MODE REJECTION The expression for the output error due to common-mode and isolation mode voltage is: VOUT = G VCM CMRR + VISO IMRR APPLICATIONS Figure 8 shows a system where isolation amplifiers (3650) are used to measure the armature current and the armature voltage of a motor. The armature current of the motor is converted to a voltage by the calibrated shunt RS and then amplifier (adjustable gain) and isolated by the 3650. The armature voltage is sensed by the voltage divider (adjustable) shown and then amplified and isolated by the 3650. The 3650 provides the advantage of accurate current measurement in the presence of high common-mode voltage. Both 3650s provide the advantage of isolating the motor ground from the control system ground. Isolated power is provided by an isolated DC/DC converter (BB Model 722 or equivalent). The 3652 is ideally suited for patient monitoring applications as shown in Figure 9. The fact that it is a true balanced input instrumentation amplifier with very high differential and common-mode impedance means that it can greatly reduce the common-mode noise pick up due to imbalance in lead impedances that often appear in patient monitoring situations. The 3kV and 6kV shown in Figure 9 are the 10ms pulse ratings of the +IR and –IR inputs for the common-mode and differential input voltages with respect to input common. The rating of the isolation barrier is 2000Vpk continu- GUARDING AND PROTECTION To preserve the excellent inherent isolation characteristics of these amplifiers, the following recommended practice should be noted. 1. Use shielded twisted pair of cable at the input as with any instrumentation amplifier. 2. Care should be taken to minimize external capacitance. A symmetrical layout of external components to achieve balanced capacitance from the input terminals to output common will preserve high IMR. 3. External components and conductor patterns should be at a distance equal to or greater than the distance between the input and output terminals to prevent HV breakdown. Though not an absolute requirement, the use of laminated or conformally coated printed circuit boards is recommended. 4. 1MΩ 4.99kΩ G = 1V/V 11 + 9.76kΩ 3650HG VA (500V) 500Ω 4.99kΩ 20 10 – 13 14 –V 12 +V 26 –VCC 23 17 O/P Com VA/100 To Voltage Sense +VCC +VO C V– E 722 V+ 1.3kΩ P+ O/P Com I/O Com Motor Control –VO VOUT +V 4.75kΩ 500Ω VS (100mV) RS 4.99kΩ 3650JG I/O Com 14 11 –V 12 13 +VCC 26 –VCC 20 23 +15VDC –15VDC + 17 O/P Com 10 – G = 100V/V 100VS To Current Sense FIGURE 8. Isolated Armature Current and Voltage Sensor. ® 3650/52 10 ous. The nonrecurrent pulse rating of the isolation barrier is 5000Vpk, since each unit is factory tested at 5000Vpk. If the isolation barrier is to be subjected to higher voltages a gas filled surge voltage protection device can be used. For multichannel operation, two 3652s can be powered by one Model 722 isolated DC/DC converter. The total leakage current for both channels at 240V 60Hz would still be less than 2µA. The block diagram in Figure 10 shows the use of isolation amplifiers in SCR control application. Isolated DC/DC Converter VOUT ≈ 10 es = 20es 50k Input Common +VO 8 +IR 6 25kΩ 11 14 –VO 12 26 20 es –6kV 1 –IR 10 –3kV –3kV 9 25kΩ +5kV Output Common 12 3652 17 –15VDC 23 VOUT To Monitor 6 C 722 P+ 1.3kΩ V+ E V– +15VDC Input Common FIGURE 9. 3652 Used in Patient Monitoring Application (ECG, VCG, EMG Amplifier). ® 11 3650/52 A 3.0 Input B C Neutral Firing CKT 3.0 Lead Firing CKT Firing CKT +VISO + 3650HG +V ABC AC/DC Power Supply ±V Isolated DC/DC Converter 722 Input Command +V Control – +VISO + 3650HG ±VISO – ±VISO + 3650HG –V – FIGURE 10. 3-Phase Bidirectional SCR Control with Voltage Feedback. ® 3650/52 12 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. 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