5962-8754903VDA

5962-8754903VDA

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    CFP14

  • 描述:

    IC GATE NAND 4CH 2-INP 14CFP

  • 数据手册
  • 价格&库存
5962-8754903VDA 数据手册
SN54AC00-SP SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate 1 Features 3 Description • The SN54AC00 device contains four independent 2input NAND gates. Each gate performs the Boolean function of Y = A • B or Y = A + B in positive logic. • • • • 5962R87549: – Radiation hardness assurance (RHA) up to TID 100 krad (Si) – SEL immune to 86 MeV×cm2/mg 5962-87549: – Total ionizing dose 50 krad (Si) 2 V to 6 V VCC operation Inputs accept voltages to 6 V Maximum tpd of 7 ns at 5 V Device Information(1) PART NUMBER SN54AC00-SP 2 Applications (1) • • • . Satellite payloads Satellite power on reset logic RHA known good Die (KGD) offering for space hybrids Pin Functions (Each Gate) INPUTS A B OUTPUT Y H H L L X H X L H A PACKAGE BODY SIZE (NOM) CDIP (14) 5.97 mm × 9.21 mm CFP (14) 6.67 mm × 19.56 mm KGD (0) Not applicable For all available packages, see the orderable addendum at the end of the data sheet. . 1A 1B 1Y 2A 2B 2Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y Y B Logic Diagram (Positive Logic) J or W Package (Top View) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Bare Die Information....................................................... 3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 Recommended Operating Conditions.........................4 6.3 Thermal Information....................................................5 6.4 Electrical Characteristics.............................................5 6.5 Switching Characteristics, VCC = 3.3 V....................... 6 6.6 Switching Characteristics, VCC = 5 V.......................... 6 6.7 Operating Characteristics........................................... 6 7 Parameter Measurement Information............................ 7 8 Device and Documentation Support..............................8 8.1 Receiving Notification of Documentation Updates......8 8.2 Support Resources..................................................... 8 8.3 Trademarks................................................................. 8 8.4 Electrostatic Discharge Caution..................................8 8.5 Glossary......................................................................8 9 Mechanical, Packaging, and Orderable Information.... 8 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (October 2015) to Revision C (April 2022) Page • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 • Removed SEU from the Features section.......................................................................................................... 1 • Changed SEL immune to 86 MeV×cm2/mg........................................................................................................1 Changes from Revision A (December 2013) to Revision B (February 2015) Page • Added KGD package information ...................................................................................................................... 1 • Added Device and Documentation Support section and Mechanical, Packaging, and Orderable Information section ............................................................................................................................................................... 1 • Added Bare Die Information, image, and Bond Pad Coordinates in Microns .................................................... 3 • Added parameter information for KGD to Section 6.5 and Section 6.6 ............................................................. 6 Changes from Revision * (October 2008) to Revision A (December 2013) Page • Changed Features bullets...................................................................................................................................1 • Deleted Ordering Information table.....................................................................................................................1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 5 Bare Die Information DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS 15 mils Silicon with backgrind Floating TiW/AlCu2 15800 nm Bond Pad Coordinates in Microns DESCRIPTION PAD NUMBER X MIN Y MIN X MAX Y MAX 1A 1 96.3 510.5 201.3 615.5 1B 2 95 94 200 199 1Y 3 508 94 613 199 2A 4 1149 94 1254 199 2B 5 1562 94 1667 199 2Y 6 1841.5 145.5 1946.5 250.5 GND 7 1841.5 445.5 1946.5 550.5 3Y 8 1841 783 1946 888 3A 9 1750.5 991 1855.5 1096 3B 10 1176.5 991 1281.5 1096 4Y 11 921 991 1026 1096 4A 12 736 991 841 1096 4B 13 95 991 200 1096 VCC 14 102.5 692 207.5 797 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP 3 SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC MIN MAX UNIT Supply voltage –0.5 7 V voltage(2) –0.5 VCC + 0.5 V –0.5 VCC + 0.5 V VI Input VO Output voltage(2) IIK Input clamp current VI < 0 or VI > VCC ±20 mA IOK Output clamp current VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC Continuous current through VCC or GND TJ Junction temperature Tstg Storage temperature (1) (2) –65 ±50 mA ±200 mA 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 Recommended Operating Conditions VCC Supply voltage VCC = 3 V VIH High-level input voltage MIN MAX 2 6 VCC = 4.5 V 3.15 VCC = 5.5 V 3.85 V 0.9 VCC = 4.5 V 1.35 VCC = 5.5 V 1.65 V VI Input voltage 0 VCC V VO Output voltage 0 VCC V IOH High-level output current IOL 4 Low-level input voltage V 2.1 VCC = 3 V VIL UNIT Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature VCC = 3 V 12 VCC = 4.5 V 24 VCC = 5.5 V 24 VCC = 3 V 12 VCC = 4.5 V 24 VCC = 5.5 V 24 8 –55 Submit Document Feedback 125 mA mA ns/V °C Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 6.3 Thermal Information SN54AC00-SP THERMAL METRIC(1) (2) J W 14 PINS 14 PINS RθJA Junction-to-ambient thermal resistance 83.1 125.4 RθJC(top) Junction-to-case (top) thermal resistance 26.6 30.85 RθJB Junction-to-board thermal resistance 47.9 43.4 ψJT Junction-to-top characterization parameter N/A N/A ψJB Junction-to-board characterization parameter N/A N/A RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A (1) (2) UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The package thermal impedance is calculated in accordance with JESD 51-7 and Mil Std 883 method 1012.1 (see www.JEDEC.org). 6.4 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –50 μA VOH IOH = –12 mA IOH = –24 mA IOH = –50 mA(1) IOL = 50 μA VOL IOL = 12 mA IOL = 24 mA VCC TA = 25°C MIN TYP MAX MIN 3V 2.9 2.9 4.5 V 4.4 4.4 5.5 V 5.4 5.4 3V 2.56 2.4 4.5 V 3.86 3.7 5.5 V 4.86 4.7 5.5 V MAX UNIT V 3.85 3V 0.1 0.1 4.5 V 0.1 0.1 5.5 V 0.1 0.1 3V 0.36 0.5 4.5 V 0.36 0.5 5.5 V 0.36 V 0.5 IOL = 50 mA(1) 5.5 V II VI = VCC or GND 5.5 V ±0.1 ±1 μA ICC VI = VCC or GND, IO = 0 5.5 V 4 40 μA Ci VI = VCC or GND (1) 5V 1.65 2.6 pF Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP 5 SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 6.5 Switching Characteristics, VCC = 3.3 V over recommended operating free-air temperature range, VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 7-1) PARAMETER tPLH tPHL tPLH (KGD only)(1) tPHL (KGD (1) only)(1) FROM (INPUT) TO (OUTPUT) A or B Y A or B Y TA = 25°C MIN MAX 9.5 1 11 5.5 8 1 9 1 7 9.5 1 11 1 5.5 9.5 1 11 MIN TYP MAX 2 7 1.5 UNIT ns ns Specification limits for KGD are based on SMD 5962-8754903 6.6 Switching Characteristics, VCC = 5 V over recommended operating free-air temperature range, VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 7-1) PARAMETER tPLH tPHL tPLH (KGD only)(1) tPHL (KGD only)(1) (1) FROM (INPUT) TO (OUTPUT) A or B Y A or B Y TA = 25°C MIN TYP MAX MIN MAX 1.5 6 8 1 8.5 1.5 4.5 6.5 1 7 1.5 6 8 1 8.5 1.5 4.5 8 1 8.5 UNIT ns ns Specification limits for KGD are based on SMD 5962-8754903 6.7 Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS CL = 50 pF, ƒ = 1 MHz Submit Document Feedback TYP 40 UNIT pF Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 7 Parameter Measurement Information TEST S1 tPLH/tPHL Open VCC Input (see Note B) 50% VCC 50% VCC 0V tPHL tPLH 2 × VCC From Output Under Test CL = 50 pF (see Note A) 500 Ω S1 Open In-Phase Output 50% VCC tPLH tPHL 500 Ω Out-of-Phase Output LOAD CIRCUIT VOH 50% VCC VOL 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 7-1. Load Circuit and Voltage Waveforms Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP 7 SN54AC00-SP www.ti.com SCHS367C – OCTOBER 2008 – REVISED APRIL 2022 8 Device and Documentation Support 8.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 8.2 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 8.3 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 8.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 8.5 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 9 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54AC00-SP PACKAGE OPTION ADDENDUM www.ti.com 5-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) 5962-8754903VCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8754903VC A SNV54AC00J 5962-8754903VDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8754903VD A SNV54AC00W 5962R8754903V9A ACTIVE XCEPT KGD 0 95 RoHS & Green Call TI N / A for Pkg Type -55 to 125 5962R8754903VCA ACTIVE CDIP J 14 25 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962R8754903VC A SNVR54AC00J 5962R8754903VDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962R8754903VD A SNVR54AC00W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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