5962-9321602QPA

                  

SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 D Low Noise D D D D D 10 Hz . . . 15 nV/√Hz 1 kHz . . . 10.5 nV/√Hz 10 000-pF Load Capability 20-mA Min Short-Circuit Output Current 27-V/µs Min Slew Rate High Gain-Bandwidth Product . . . 5.9 MHz Low VIO . . . 500 µV Max at 25°C D Single or Split Supply . . . 4 V to 44 V D Fast Settling Time D D 340 ns to 0.1% 400 ns to 0.01% Saturation Recovery . . . 150 ns Large Output Swing VCC − + 0.1 V to VCC + − 1 V description The TLE214x and TLE214xA devices are high-performance, internally compensated operational amplifiers built using Texas Instruments complementary bipolar Excalibur process. The TLE214xA is a tighter offset voltage grade of the TLE214x. Both are pin-compatible upgrades to standard industry products. The design incorporates an input stage that simultaneously achieves low audio-band noise of 10.5 nV/√Hz with a 10-Hz 1/f corner and symmetrical 40-V/µs slew rate typically with loads up to 800 pF. The resulting low distortion and high power bandwidth are important in high-fidelity audio applications. A fast settling time of 340 ns to 0.1% of a 10-V step with a 2-kΩ/100-pF load is useful in fast actuator/positioning drivers. Under similar test conditions, settling time to 0.01% is 400 ns. The devices are stable with capacitive loads up to 10 nF, although the 6-MHz bandwidth decreases to 1.8 MHz at this high loading level. As such, the TLE214x and TLE214xA are useful for low-droop sample-and-holds and direct buffering of long cables, including 4-mA to 20-mA current loops. The special design also exhibits an improved insensitivity to inherent integrated circuit component mismatches as is evidenced by a 500-µV maximum offset voltage and 1.7-µV/°C typical drift. Minimum common-mode rejection ratio and supply-voltage rejection ratio are 85 dB and 90 dB, respectively. Device performance is relatively independent of supply voltage over the ± 2-V to ± 22-V range. Inputs can operate between VCC − − 0.3 to VCC + − 1.8 V without inducing phase reversal, although excessive input current may flow out of each input exceeding the lower common-mode input range. The all-npn output stage provides a nearly rail-to-rail output swing of VCC − − 0.1 to VCC + − 1 V under light current-loading conditions. The device can sustain shorts to either supply since output current is internally limited, but care must be taken to ensure that maximum package power dissipation is not exceeded. Both versions can also be used as comparators. Differential inputs of VCC ± can be maintained without damage to the device. Open-loop propagation delay with TTL supply levels is typically 200 ns. This gives a good indication as to output stage saturation recovery when the device is driven beyond the limits of recommended output swing. Both the TLE214x and TLE214xA are available in a wide variety of packages, including both the industry-standard 8-pin small-outline version and chip form for high-density system applications. The C-suffix devices are characterized for operation from 0°C to 70°C, I-suffix devices from − 40°C to 105°C, and M-suffix devices over the full military temperature range of − 55°C to 125°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1997 − 2006, Texas Instruments Incorporated     !"#$ % &'!!($ #%  )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"%  (#% %$!'"($% %$#,#!, /#!!#$0- !,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',( $(%$1  #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1                   
SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL OUTLINE† (D) CERAMIC DIP (JG) PLASTIC DIP (P) 0°C to 70°C 500 µV 900 µV TLE2141ACD TLE2141CD — TLE2141ACP TLE2141CP −40°C to 105°C 500 µV 900 µV TLE2141AID TLE2141ID — TLE2141AIP TLE2141IP −55°C to 125°C 500 µV 900 µV — TLE2141MD TLE2141AMJG TLE2141MJG — — † The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2141ACDR). TLE2142 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL OUTLINE† (D) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) 750 µV TSSOP‡ (PW) CERAMIC FLAT PACK (U) TLE2142ACD — — TLE2142ACP — — 0°C to 70°C 1200 µV TLE2142CD — — TLE2142CP TLE2142CPWLE — 750 µV TLE2142AID — — TLC2142AIP — — −40°C to 105°C 1200 µV TLE2142ID — — TLC2142IP — TLE2142AMFK TLE2142AMJG −55°C to 125°C 750 µV TLE2142AMD — — — TLE2142AMU 1200 µV TLE2142MD TLE2142MFK TLE2142MJG — — † The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2142ACDR). ‡ The PW packages are available left-ended taped and reeled. Add LE the suffix to device type (e.g., TLC2142CPWLE). TLE2142MU TLE2144 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C SMALL OUTLINE† (DW) CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (N) 0°C to 70°C 1.5 mV 2.4 mV — TLE2144CDW — — — — TLE2144ACN TLE2144CN −40°C to 105°C 1.5 mV 2.4 mV — TLE2144IDW — — — — TLE2144AIN TLE2144IN −55°C to 125°C 1.5 mV 2.5 mV — TLE2144MDW TLE2144AMFK TLE2144MFK TLE2144AMJ TLE2144MJ — — † The DW packages are available taped and reeled. Add R suffix to device type (e.g., TLE2144CDWR). symbol OFFSET N1 (see Note A) IN + + IN − − OUT OFFSET N2 (see Note A) NOTES: A. OFFSET N1 AND OFFSET N2 are only availiable on the TLE2241x devices. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265                   
SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 1 8 2 7 3 6 4 5 NC 1OUT 1OUT 1IN − 1IN+ VCC − VCC − NC NC VCC + OUT OFFSET N2 NC OFFSET N1 NC NC NC TLE2141 FK PACKAGE (TOP VIEW) 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 NC VCC+ VCC+ 2OUT 2IN − 2IN+ 2IN+ NC TLE2142 U PACKAGE (TOP VIEW) NC VCC + NC OUT NC NC 1OUT 1IN− 1IN+ VCC− 1 10 2 9 3 8 4 7 5 6 1OUT 1IN − 1IN + VCC − 1 16 2 15 3 14 4 13 5 12 6 11 7 8 10 9 4OUT 4IN − 4IN + VCC − 3IN + 3IN − 3OUT NC NC VCC+ 2OUT 2IN− 2IN+ NC 1IN − NC 1IN + NC TLE2144 J OR N PACKAGE (TOP VIEW) 1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 7 3 6 4 5 VCC + 2OUT 2IN − 2IN + 4OUT 4IN − 4IN + VCC − 3IN + 3IN − 3OUT 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2OUT NC 2IN − NC TLE2144 FK PACKAGE (TOP VIEW) 1IN − 1OUT NC 4OUT 4IN − 1OUT 1IN − 1IN + VCC + 2IN + 2IN − 2OUT NC 8 2 1IN + NC VCC + NC 2IN + 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4IN + NC VCC − NC 3IN + 2IN − 2OUT NC 3OUT 3IN − TLE2144 DW PACKAGE (TOP VIEW) 1 TLE2142 FK PACKAGE (TOP VIEW) NC VCC − NC OFFSET N2 NC NC IN − NC IN + NC 1 TLE2142 D, JG, OR P PACKAGE (TOP VIEW) NC 1OUT NC VCC + NC OFFSET N1 IN − IN + VCC − TLE2142 PW PACKAGE (TOP VIEW) NC VCC − NC 2IN + NC TLE2141 D, JG, OR P PACKAGE (TOP VIEW) NC − No internal connection POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Q1 Q2 Q4 D1 Q7 Q6 R3 R5 Q12 Q11 R6 Q10 Q9 C1 Q5 Q8 R4 Q14 D2 R9 Q17 R10 Q16 Q15 R8 Q13 R7 R11 C2 Q18 Q19 VCC + R12 Q20 C3 Q21 8 4 1 Diodes Capacitors Epi-FET 24 Resistors TLE2241 46 COMPONENT Transistors 1 8 14 43 65 TLE2242 Q24 2 16 28 86 130 D5 Q25 R16 R15 Q23 TLE2244 R13 D4 C4 D3 Q22 R14 ACTUAL DEVICE COMPONENT COUNT VCC − NOTE A: OFFSET N1 AND OFFSET N2 are only availiable on the TLE2241x devices. OFFSET N2 (see Note A) OFFSET N1 (see Note A) IN + IN − R2 Q3 R1 equivalent schematic Q29 D7 D6 Q28 R17 Q27 Q26 R18 D8 R20 Q33 Q32 Q31 Q30 R19 R22 Q35 Q36 R23 Q34 R21 Q37 OUT R24 Template Release Date: 7−11−94  2 23   2 2    2   2    SLOS183C − FEBURARY 1997 − REVISED JUNE 2006                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V Supply voltage, VCC − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −22 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 44 V Input voltage range, VI (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC + to VCC − − 0.3 V Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 80 mA Total current into VCC + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Total current out of VCC − . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA Duration of short-circuit current at (or below) 25 °C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Package thermal impedance, θJA (see Notes 4 and 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . 97.1°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . 57.3°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . 79.7°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . 84.6°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . 108.4°C/W Package thermal impedance, θJC (see Notes 4 and 5): FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6°C/W J package . . . . . . . . . . . . . . . . . . . . . . . . . . 15.1°C/W JG package . . . . . . . . . . . . . . . . . . . . . . . . . 14.5°C/W U package . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7°C/W Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 105°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150 °C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DW, N, P, or PW package . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC − . 2. Differential voltages are at IN+ with respect to IN −. Excessive current flows, if input, are brought below VCC − − 0.3 V. 3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic). recommended operating conditions Supply voltage, VCC ± Common-mode input voltage, VIC VCC = 5 V VCC ± = ± 15 V Operating free-air temperature, TA POST OFFICE BOX 655303 C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX ±2 ± 22 ±2 ± 22 ±2 ± 22 0 2.9 0 2.7 0 2.7 −15 12.9 −15 12.7 −15 12.7 0 70 −40 105 −55 125 • DALLAS, TEXAS 75265 UNIT V V °C 5                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141C electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VOH Common-mode input voltage range High-level output voltage RS = 50 Ω, Full range 8 Full range −0.8 Full range 0 to 3 Full range 0 to 2.9 IOH = − 150 µA A 25°C 3.9 Full range 3.8 25°C 3.8 IOH = − 1.5 mA Full range 3.7 25°C 3.2 IOH = − 15 mA Full range 3.2 25°C Full range IOL = 15 mA Full range 1000 1300 100 8 −0.8 4.1 3.9 V 4.1 4 3.8 4 V 3.7 3.7 3.2 3.7 3.2 125 75 1.2 150 1.2 1.7 25 225 mV 250 1.6 220 125 150 225 250 Full range A µA −0.3 to 3.2 150 50 nA 3.8 150 25°C −2 −2.1 0 to 3 µV V 100 150 −2 UNIT µV/°C V/°C 0 to 2.9 75 25°C VCC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V 200 1.7 −0.3 to 3.2 Full range IOL = 1.5 mA MAX −2.1 25°C 25 C RS = 50 Ω TYP 150 25°C Low-level output voltage 1400 1.7 25°C IOL = 150 µA A VOL 225 MIN 1700 25°C VICR MAX Full range VO = 2.5 V VIC = 2.5 V TLE2141AC TYP 1.6 1.7 50 V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 ICC Supply current VO = 2.5 V, VIC = 2.5 V 25°C No load, Full range † Full range is 0°C to 70°C. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 25 118 85 118 dB 80 106 90 106 dB 85 3.4 4.4 4.6 3.4 4.4 4.6 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141C operating characteristics, VCC = 5 V, TA = 25°C TLE2141C PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise B1 Unity-gain bandwidth Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL and CL terminated to 2.5 V. TEST CONDITIONS MIN TYP TLE2141AC MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 f = 10 Hz 15 15 f = 1 kHz 10.5 10.5 AVD = − 1, CL = 500 pF†, RL = 2 kΩ,†, AVD = − 1, 2.5-V step RS = 20 Ω, RS = 20 Ω, f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, RL = 2 kΩ†, f = 100 kHz RL = 2 kΩ†, f = 10 kHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, 0.0052% MAX UNIT V/ s V/µs µss nV/√Hz µV V pA/√Hz 0.0052% CL = 100 pF† 5.9 5.9 MHz CL = 100 pF†, 5.8 5.8 MHz RL = 2 kΩ†, CL = 100 pF† 660 660 kHz CL = 100 pF† 57° 57° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141C electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range Maximum positive peak VOM + output voltage swing RS = 50 Ω, Full range 7 Full range −0.7 Full range −15.3 to 13.1 14.1 13.8 14.1 13.7 13.6 25°C 13.1 IO = − 15 mA Full range −14.7 Full range −14.6 25°C −14.5 IO = 1.5 mA Full range −14.4 25°C −13.4 IO = 15 mA Full range −13.3 f = 1 MHz CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load RS = 50 Ω 25°C 100 Full range 75 nA A µA V 13.7 14 13.7 14 V 13.6 13.7 13.1 13 25°C −1.5 −1.6 −15 to 12.9 25°C zo −0.7 −15.3 to 13.1 Full range Open-loop output impedance −1.5 µV V 100 150 −15 to 12.9 IO = − 1.5 mA Input capacitance 7 −15.3 to 13.2 13.7 ci 100 UNIT µV/°C V/°C 1.7 −15 to 13 13.8 RL = 2 kΩ 800 −15.3 to 13.2 25°C Input resistance 500 −15 to 13 Full range ri 175 −1.6 IO = − 150 µA A VO = ± 10 V MAX 25°C 25 C RS = 50 Ω Large-signal differential voltage amplification TYP 150 Full range AVD 13.7 13 −14.9 −14.7 −14.9 −14.6 −14.8 −14.5 −14.8 V −14.4 −13.8 −13.4 −13.8 −13.3 450 100 450 V/mV 75 25°C 65 65 MΩ 25°C 2.5 2.5 pF 25°C 30 30 Ω 25°C 85 Full range 80 25°C 90 Full range 85 108 85 108 dB 80 106 90 106 dB 25°C −50 −25 −50 20 31 20 31 25°C Full range POST OFFICE BOX 655303 85 −25 † Full range is 0°C to 70°C. 8 900 1.7 25°C IO = 150 µA A Maximum negative VOM − peak output voltage swing 200 MIN 1300 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2141AC TYP • DALLAS, TEXAS 75265 3.5 4.5 4.7 3.5 mA 4.5 4.7 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141C operating characteristics, VCC± = ±15 V, TA = 25°C TLE2141C PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MIN TYP 27 27 TLE2141AC MAX MIN TYP 45 27 45 42 27 42 MAX UNIT AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 To 0.01% 0.4 0.4 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 9                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142C electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VOH Common-mode input voltage range High-level output voltage RS = 50 Ω, Full range 8 Full range −0.8 Full range 0 to 3 Full range 0 to 2.9 IOH = − 150 µA A 25°C 3.9 Full range 3.8 25°C 3.8 IOH = − 1.5 mA Full range 3.7 25°C 3.4 IOH = − 15 mA Full range 3.4 25°C Full range IOL = 15 mA Full range 1500 1800 100 8 −0.8 4.1 3.9 V 4.1 4 3.8 4 V 3.7 3.7 3.4 3.7 3.4 125 75 1.2 150 1.2 1.5 25 225 mV 250 1.4 220 125 150 225 250 Full range A µA −0.3 to 3.2 150 50 nA 3.8 150 25°C −2 −2.1 0 to 3 µV V 100 150 −2 UNIT µV/°C V/°C 0 to 2.9 75 25°C VCC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V 200 1.7 −0.3 to 3.2 Full range IOL = 1.5 mA MAX −2.1 25°C 25 C RS = 50 Ω TYP 150 25°C Low-level output voltage 1900 1.7 25°C IOL = 150 µA A VOL 220 MIN 2200 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2142AC TYP 1.4 1.5 50 V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 ICC Supply current VO = 2.5 V, VIC = 2.5 V 25°C No load, Full range † Full range is 0°C to 70°C. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 25 118 85 118 dB 80 106 90 106 dB 85 6.6 8.8 9.2 6.6 8.8 9.2 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142C operating characteristics, VCC = 5 V, TA = 25°C TLE2142C PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise B1 Unity-gain bandwidth Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL terminates at 2.5 V. TEST CONDITIONS MIN TYP TLE2142AC MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 MAX UNIT V/ s V/µs µss nV/√Hz µV V pA/√Hz VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, RL = 2 kΩ†, f = 10 kHz 0.0052% 0.0052% CL = 100 pF 5.9 5.9 MHz RL = 2 kΩ†, f = 100 kHz CL = 100 pF, 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, RL = 2 kΩ†, CL = 100 pF 660 660 kHz CL = 100 pF 57° 57° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142C electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VOM + Common-mode input voltage range Maximum positive peak output voltage swing RS = 50 Ω, Full range VOM − 7 Full range TYP MAX 275 750 1200 100 7 −0.7 Full range −0.7 −1.6 −15 to 13 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.9 −15.3 to 13.1 −15 to 12.9 −15.3 to 13.1 14.1 13.8 14.1 RS = 50 Ω IO = − 150 µA A 25°C 13.8 Full range 13.7 25°C 13.7 IO = − 1.5 mA Full range 13.6 25°C 13.3 IO = − 15 mA Full range 13.2 25°C −14.7 Full range −14.6 25°C −14.5 IO = 1.5 mA Full range −14.4 25°C −13.4 IO = 15 mA Full range −13.3 25°C 100 Full range 75 Large-signal differential voltage amplification VO = ± 10 V ri Input resistance RL = 2 kΩ ci Input capacitance zo Open-loop output impedance f = 1 MHz Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load nA A µA V 13.7 14 13.7 14 V 13.6 13.7 13.3 13.7 13.2 −14.9 −14.7 −14.9 −14.6 −14.8 −14.5 −14.8 V −14.4 −13.8 −13.4 −13.8 −13.3 450 100 450 V/mV 75 25°C 65 65 MΩ 25°C 2.5 2.5 pF 25°C 30 30 Ω 25°C 108 85 108 dB 80 106 90 106 dB 85 −25 −50 −25 −50 20 31 20 31 25°C Full range † Full range is 0°C to 70°C. POST OFFICE BOX 655303 −1.5 −1.6 25°C 25 C µV V 100 150 −1.5 UNIT µV/°C V/°C 1.7 150 AVD 12 1200 1.7 25°C IO = 150 µA A Maximum negative peak output voltage swing 290 MIN 1600 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2142AC TYP • DALLAS, TEXAS 75265 6.9 9 9.4 6.9 mA 9 9.4 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142C operating characteristics, VCC± = ±15 V, TA = 25°C TLE2142C PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ,, f =100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MIN TYP 27 27 TLE2142AC MAX MIN TYP 45 27 45 42 27 42 MAX UNIT AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 To 0.01% 0.4 0.4 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 13                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144C electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2144C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VOH Common-mode input voltage range High-level output voltage Full range RS = 50 Ω, 8 25°C −0.8 0 to 3 Full range 0 to 2.9 25°C 3.9 Full range 3.8 25°C 3.8 IOH = − 1.5 mA Full range 3.7 25°C 3.4 Full range 3.4 25°C 100 8 −0.8 −0.3 to 3.2 4.1 3.9 4 3.8 3.7 4.1 4 V 3.4 3.7 3.4 Full range 125 75 Full range 225 150 1.2 1.7 Full range 25 225 mV 250 1.6 95 125 150 250 1.2 50 µA A V 3.7 150 25°C nA 3.8 150 25°C −2 −2.1 0 to 3 mV 100 150 −2 UNIT µV/°C V/°C 0 to 2.9 75 25°C VCC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V 3 1.7 −0.3 to 3.2 Full range IOL = 15 mA 0.5 −2.1 IOH = − 150 µA A IOL = 1.5 mA MAX 150 25°C 25 C RS = 50 Ω TYP 3.6 1.7 Full range IOL = 150 µA A VOL 3.8 Full range IOH = − 15 mA Low-level output voltage 0.5 MIN 4.4 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2144AC TYP 1.6 1.7 50 V 95 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V Full range RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 118 85 118 dB 80 106 90 106 dB 25°C No load, † Full range is 0°C to 70°C. 14 V/mV 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 85 13.2 17.6 18.5 13.2 17.6 18.5 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144C operating characteristics, VCC = 5 V, TA = 25°C TLE2144C PARAMETER TEST CONDITIONS AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In SR + Positive slew rate SR − Negative slew rate ts Settling time Vn MIN TYP TLE2144AC MAX MIN TYP MAX UNIT 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 Equivalent input noise current f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 THD + N Total harmonic distortion plus noise VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, f = 10 kHz 0.0052% 0.0052% B1 Unity-gain bandwidth RL = 2 kΩ†, CL = 100 pF 5.9 5.9 MHz Gain-bandwidth product RL = 2 kΩ†, f = 100 kHz CL = 100 pF, 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, RL = 2 kΩ†, CL = 100 pF 660 660 kHz CL = 100 pF 57° 57° BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL terminates at 2.5 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 15                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144C electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2144C MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range Maximum positive peak VOM + output voltage swing RS = 50 Ω, Full range 7 −0.7 Full range −15.3 to 13.1 −15 to 12.9 −15 to 13.1 14.1 13.8 14.1 25°C 13.7 Full range 13.6 25°C 13.1 Full range IO = 150 µA A −14.7 Full range −14.6 25°C −14.5 IO = 1.5 mA Full range −14.4 25°C −13.4 Full range −13.3 zo Open-loop output impedance f = 1 MHz CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load RS = 50 Ω 25°C 100 Full range 75 nA µA A V 13.7 14 13.7 14 V 13.6 13.7 13.1 −14.9 −14.7 13 25°C −1.5 −1.6 −15 to 12.9 IO = − 1.5 mA RL = 2 kΩ −0.7 −15.3 to 13.2 13.7 Input capacitance −1.5 mV 100 150 −15 to 13 13.8 Input resistance 7 −15.3 to 13.2 25°C ci 100 UNIT µV/°C V/°C 1.7 −15 to 13 Full range ri 1.5 −1.6 IO = − 150 µA A VO = ± 10 V 0.5 25°C 25 C RS = 50 Ω Large-signal differential voltage amplification MAX 150 Full range AVD TYP 2.4 1.7 25°C IO = 15 mA 13.7 13 −14.9 −14.6 −14.8 −14.5 −14.8 V −14.4 −13.8 −13.4 −13.8 −13.3 170 100 170 V/mV 75 25°C 65 65 MΩ 25°C 2.5 2.5 pF 25°C 30 30 Ω 25°C 85 Full range 80 25°C 90 Full range 85 108 85 108 dB 80 106 90 106 dB 25°C −50 −25 −50 20 31 20 31 Full range † Full range is 0°C to 70°C. POST OFFICE BOX 655303 85 −25 25°C 16 2.4 Full range IO = − 15 mA Maximum negative VOM − peak output voltage swing 0.6 MIN 3.2 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2144AC TYP • DALLAS, TEXAS 75265 13.8 18 18.8 13.8 mA 18 18.8 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144C operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts TEST CONDITIONS TLE2144C MIN TYP TLE2144AC MAX MIN TYP 27 45 27 45 27 42 27 42 AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 Settling time To 0.01% 0.4 0.4 15 15 Equivalent input noise voltage RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn f = 1 kHz 10.5 10.5 VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MAX UNIT V/ s V/µs µss nV/√Hz f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µV V pA/√Hz 17                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141I electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 Full range Low-level output voltage 200 1000 1500 100 8 −0.8 −2 −0.8 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.2 3.7 3.2 3.7 Full range 3.8 3.8 3.7 3.7 3.3 IOL = 1.5 µA IOL = 15 mA 25°C 25 C 3.3 75 125 150 225 150 225 1.6 1.2 IOL = 10 mA Full range 10 1.6 175 175 225 225 1.4 VCC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V A µA V 125 Full range 50 nA V 75 1.2 25°C −2 −2.2 −0.3 to 3.2 µV V 100 200 −2.2 UNIT µV/°C V/°C 1.7 0 to 3 25°C 25 C IOL = 100 µA IOL = 1 mA MAX 25°C 25 C RS = 50 Ω IOH = − 15 mA IOH = − 100 µA IOH = − 1 mA TYP 200 Full range IOH = − 10 mA IOL = 150 µA VOL 1400 1.7 25°C IOH = − 150 µA IOH = − 1.5 mA VOH 225 MIN 1900 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2141AI TYP 220 1.4 50 mV V mV V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 ICC Supply current VO = 2.5 V, VIC = 2.5 V 25°C No load, Full range † Full range is − 40°C to 105°C. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 10 118 85 118 dB 80 106 90 106 dB 85 3.4 4.4 4.6 3.4 4.4 4.6 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141I operating characteristics, VCC = 5 V, TA = 25°C TLE2141I PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise B1 Unity-gain bandwidth BOM TEST CONDITIONS MIN TYP TLE2141AI MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 f = 10 Hz 15 15 f = 1 kHz 10.5 10.5 AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step RS = 20 Ω, RS = 20 Ω, f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 MAX UNIT V/ s V/µs µss nV/√Hz µV V pA/√Hz VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, RL = 2 kΩ†, f = 10 kHz CL = 100 pF† 5.9 5.9 MHz Gain-bandwidth product RL = 2 kΩ† f = 100 kHz CL = 100 pF†, 5.8 5.8 MHz Maximum output-swing bandwidth VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, CL = 100 pF† 660 660 kHz RL = 2 kΩ†, CL = 100 pF† 57° 57° φm Phase margin at unity gain † RL and CL terminated to 2.5 V. POST OFFICE BOX 655303 0.0052% • DALLAS, TEXAS 75265 0.0052% 19                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141I electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range 7 Full range MAX 175 500 1000 100 7 −0.7 −0.7 −1.7 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.1 13.7 13.1 13.7 25°C 25 C IO = − 15 mA IO = − 100 µA Full range 13.7 13.7 13.6 13.6 13.1 IO = 150 µA IO = 1.5 mA 25°C 25 C IO = 15 mA IO = 100 µA Full range −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 40 A µA V 13.1 −14.9 100 nA V −14.7 25°C −1.5 −1.7 −15 to 13 µV V 100 200 −1.5 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IO = 1 mA IO = 10 mA TYP 200 Full range IO = − 1 mA IO = − 10 mA Maximum negative peak VOM − output voltage swing 900 1.7 25°C IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 200 MIN 1500 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2141AI TYP V −13.4 450 100 450 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load VO = ± 10 V, RL = 2 kΩ 25°C 85 108 dB 80 106 90 106 dB 85 −50 −25 −50 20 31 20 31 25°C Full range POST OFFICE BOX 655303 108 −25 † Full range is − 40°C to 105°C. 20 V/mV 40 • DALLAS, TEXAS 75265 3.5 4.5 4.7 3.5 mA 4.5 4.7 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141I operating characteristics, VCC± = ±15 V, TA = 25°C TLE2141I PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MIN TYP 27 27 TLE2141AI MAX MIN TYP 45 27 45 42 27 42 AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 To 0.01% 0.4 0.4 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 MAX UNIT V/ s V/µs µss nV/√Hz f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µV V pA/√Hz 21                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142I electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 Full range 220 1500 2000 100 8 −0.8 −2 −0.8 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.4 3.7 3.4 3.7 25°C IOH = − 15 mA IOH = 100 µA Full range 3.8 3.8 3.7 3.7 3.5 25°C IOL = 15 mA IOL = 100 µA 3.5 75 125 150 225 150 225 1.4 1.2 Full range 10 1.4 175 175 225 225 1.2 VIC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V A µA V 125 Full range 50 nA V 75 1.2 25°C −2 −2.2 −0.3 to 3.2 µV V 100 200 −2.2 UNIT µV/°C V/°C 1.7 0 to 3 RS = 50 Ω IOL = 1 mA IOL = 10 mA MAX 25°C 25 C IOl = 150 µA IOL = 1.5 mA Low-level output voltage TYP 200 Full range IOH = 1 mA IOH = 10 mA VOL 1900 1.7 25°C IOH = − 150 µA IOH = − 1.5 mA VOH 220 MIN 2400 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2142AI TYP 220 1.2 50 mV V mV V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 25°C No load, Full range † Full range is − 40°C to 105°C. 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 10 118 85 118 dB 80 106 90 106 dB 85 6.6 8.8 9.2 6.6 8.8 9.2 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142I operating characteristics, VCC = 5 V, TA = 25°C TLE2142I PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn TEST CONDITIONS MIN TYP TLE2142AI MAX MIN TYP MAX UNIT 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 Equivalent input noise current f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 THD + N Total harmonic distortion plus noise RL = 2 kΩ†, f = 10 kHz B1 Unity-gain bandwidth VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, CL = 100 pF 5.9 5.9 MHz RL = 2 kΩ†, f = 100 kHz CL = 100 pF, 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, RL = 2 kΩ†, CL = 100 pF 660 660 kHz CL = 100 pF 57° 57° AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL terminates at 2.5 V. POST OFFICE BOX 655303 0.0052% • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 0.0052% 23                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142I electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range 7 Full range MAX 275 750 1400 100 7 −0.7 −0.7 −1.7 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.3 13.7 13.3 13.7 25°C 25 C IO = − 15 mA IO = − 100 µA Full range 13.7 13.7 13.6 13.6 13.3 IO = 150 µA IO = 1.5 mA 25°C 25 C IO = 15 mA IO = 100 µA Full range −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 40 A µA V 13.3 −14.9 100 nA V −14.7 25°C −1.5 −1.7 −15 to 13 µV V 100 200 −1.5 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IO = 1 mA IO = 10 mA TYP 200 Full range IO = − 1 mA IO = − 10 mA Maximum negative peak VOM − output voltage swing 1200 1.7 25°C IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 290 MIN 1800 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2142I TYP V −13.4 450 100 450 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω Common-mode rejection ratio VIC = VICRmin RS = 50 Ω 25°C 85 CMRR Full range 80 Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω 25°C 90 kSVR Full range 85 IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load VO = ± 10 V, RL = 2 kΩ 25°C 85 108 dB 80 106 90 106 dB 85 −50 −25 −50 20 31 20 31 Full range † Full range is − 40°C to 105°C. POST OFFICE BOX 655303 108 −25 25°C 24 V/mV 40 • DALLAS, TEXAS 75265 6.9 9 9.4 6.9 mA 9 9.4 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142I operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts TEST CONDITIONS TLE2142I MIN TYP 30 30 TLE2142AI MAX MIN TYP 45 30 45 42 30 42 AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 Settling time To 0.01% 0.4 0.4 15 15 Equivalent input noise voltage RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn f = 1 kHz 10.5 10.5 VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f =100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MAX UNIT V/ s V/µs µss nV/√Hz f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µV V pA/√Hz 25                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144I electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2144I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 Full range Low-level output voltage 0.5 3 4 100 8 −0.8 −2 −0.8 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.4 3.7 3.4 3.7 Full range 3.8 3.8 3.7 3.7 3.5 IOL = 1.5 µA IOL = 15 mA 25°C 3.5 75 125 150 225 150 225 1.6 1.2 IOL = 10 mA Full range 10 1.6 175 175 225 225 1.4 VIC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V A µA V 125 Full range 50 nA V 75 1.2 25°C −2 −2.2 −0.3 to 3.2 mV 100 200 −2.2 UNIT µV/°C V/°C 1.7 0 to 3 25°C IOL = 100 µA IOL = 1 mA MAX 25°C 25 C RS = 50 Ω IOH = − 15 mA IOH = 100 µA IOH = 1 mA TYP 200 Full range IOH = 10 mA IOL = 150 µA VOL 3.8 1.7 25°C IOH = − 150 µA IOH = − 1.5 mA VOH 0.5 MIN 4.8 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2144AI TYP 95 1.4 50 mV V mV V 95 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 118 85 118 dB 80 106 90 106 dB 25°C No load, Full range † Full range is − 40°C to 105°C. 26 V/mV 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 85 13.2 17.6 18.4 13.2 17.6 18.4 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144I operating characteristics, VCC = 5 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts TEST CONDITIONS TLE2144I MIN TYP TLE2144AI MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 AVD = − 1, CL = 500 pF RL = 2 kΩ†, Settling time AVD = − 1, 2.5-V step 15 15 Equivalent input noise voltage RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn f = 1 kHz 10.5 10.5 VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise B1 Unity-gain bandwidth Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL terminates at 2.5 V f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 10 kHz 0.5 0.5 MAX UNIT V/ s V/µs µss nV/√Hz µV V pA/√Hz VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, RL = 2 kΩ†, f = 10 kHz 0.0052% 0.0052% CL = 100 pF 5.9 5.9 MHz RL = 2 kΩ†, f = 100 kHz CL = 100 pF, 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, RL = 2 kΩ†, CL = 100 pF 660 660 kHz CL = 100 pF 57° 57° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144I electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† TLE2144I MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range 7 Full range 1.5 2.8 100 7 −0.7 −0.7 −1.7 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.1 13.7 13.1 13.7 13.7 13.7 13.6 13.6 13.1 25°C 25 C Full range IO = 10 mA −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 40 A µA V 13.1 −14.9 100 nA V −14.7 25°C −1.5 −1.7 −15 to 13 mV 100 200 −1.5 UNIT µV/°C V/°C 1.7 −15.3 to 13.2 Full range IO = 100 µA IO = 1 mA 0.5 −15 to 13 25°C 25 C IO = 1.5 mA IO = 15 mA MAX 25°C 25 C RS = 50 Ω IO = − 15 mA IO = − 100 µA IO = − 1 mA TYP 200 Full range IO = − 10 mA IO = 150 µA Maximum negative VOM − peak output voltage swing 2.4 1.7 25°C IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 0.6 MIN 3.2 25°C VICR MAX Full range VIC = 0, VO = 0 TLE2144AI TYP V −13.4 170 100 170 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load VO = ± 10 V, RL = 2 kΩ RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 POST OFFICE BOX 655303 108 85 108 dB 80 106 90 106 dB 25°C 85 −25 −50 −25 −50 20 31 20 31 25°C Full range † Full range is − 40°C to 105°C. 28 V/mV 40 • DALLAS, TEXAS 75265 13.8 18 18.8 13.8 mA 18 18.8 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144I operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts TEST CONDITIONS TLE2144I MIN TYP 27 27 TLE2144AI MAX MIN TYP 45 27 45 42 27 42 MAX UNIT AVD = − 1, CL = 500 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 Settling time To 0.01% 0.4 0.4 Equivalent input noise voltage RS = 20 Ω, RS = 20 Ω, f = 10 Hz 15 15 Vn f = 1 kHz 10.5 10.5 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 0.48 0.48 VN(PP) f = 0.1 Hz to 10 Hz 0.51 0.51 Equivalent input noise current f = 10 Hz 1.89 1.89 In f = 1 kHz 0.47 0.47 THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz 0.01% 0.01% B1 Unity-gain bandwidth RL = 2 kΩ, CL = 100 pF 6 6 MHz Gain-bandwidth product RL = 2 kΩ, f = 100 kHz CL = 100 pF, 5.9 5.9 MHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, RL = 2 kΩ, CL = 100 pF 668 668 kHz φm Phase margin at unity gain RL = 2 kΩ, CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 29                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141M electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 Full range Low-level output voltage 200 1000 1700 100 8 −0.8 −2 −0.8 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.2 3.7 3.2 3.7 Full range 3.75 3.75 3.65 3.65 3.25 IOL = 1.5 µA IOL = 15 mA 25°C 25 C 3.25 75 125 150 225 150 225 1.4 1.2 IOL = 10 mA Full range 5 1.4 200 200 250 225 1.25 VIC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V A µA V 125 Full range 50 nA V 75 1.2 25°C −2 −2.3 −0.3 to 3.2 µV V 100 250 −2.3 UNIT µV/°C V/°C 1.7 0 to 3 25°C 25 C IOL = 100 µA IOL = 1 mA MAX 25°C 25 C RS = 50 Ω IOH = − 15 mA IOH = − 100 µA IOH = − 1 mA TYP 250 Full range IOH = − 10 mA IOL = 150 µA VOL 1400 1.7 25°C IOH = − 150 µA IOH = − 1.5 mA VOH 225 MIN 2100 25°C VICR MAX Full range VO = 2.5 V VIC = 2.5 V TLE2141AM TYP 220 1.25 50 mV V mV V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 25°C No load, Full range † Full range is − 55°C to 125°C. 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 5 118 85 118 dB 80 106 90 106 dB 85 3.4 4.4 4.6 3.4 4.4 4.6 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141M operating characteristics, VCC = 5 V, TA = 25°C TLE2141M PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise B1 Unity-gain bandwidth Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin at unity gain † RL and CL terminated to 2.5 V. TEST CONDITIONS MIN TYP TLE2141AM MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, RL = 2 kΩ†, f = 100 kHz VO(PP) = 2 V, AVD = 1 RL = 2 kΩ†, RL = 2 kΩ†, f = 10 kHz 0.0052% CL = 100 pF† CL = 100 pF†, MAX UNIT V/ s V/µs µss nV/√Hz µV V pA/√Hz 0.0052% 5.9 5.9 MHz 5.8 5.8 MHz RL = 2 kΩ†, 660 660 kHz CL = 100 pF† 57° 57° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 31                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141M electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2141M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range Full range RS = 50 Ω 7 Full range MAX 175 500 1200 100 7 −0.7 −0.7 −1.8 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.1 13.7 13.1 13.7 25°C 25 C IO = − 15 mA IO = − 100 µA Full range 13.7 13.7 13.6 13.6 13.1 IO = 150 µA IO = 1.5 mA 25°C 25 C IO = 15 mA IO = 100 µA Full range −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 20 A µA V 13.1 −14.9 100 nA V −14.7 25°C −1.5 −1.8 −15 to 13 µV V 100 250 −1.5 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IO = 1 mA IO = 10 mA TYP 250 Full range IO = − 1 mA IO = − 10 mA Maximum negative peak VOM − output voltage swing 900 1.7 25°C IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 200 MIN 1700 25°C VICR MAX Full range VIC = 0, TLE2141AM TYP V −13.4 450 100 450 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 ICC Supply current VO = 0, VIC = 2.5 V VO = ± 10 V, RL = 2 kΩ RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 VID = 1 V VID = − 1 V 25°C 108 dB 80 106 90 106 dB 85 −25 −50 20 31 20 31 Full range POST OFFICE BOX 655303 85 −50 † Full range is − 55°C to 125°C. 32 108 −25 25°C No load, V/mV 20 • DALLAS, TEXAS 75265 3.5 4.5 4.7 3.5 mA 4.5 4.7 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141M operating characteristics, VCC± = ±15 V, TA = 25°C TLE2141M PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MIN TYP 27 27 TLE2141AM MAX MIN TYP 45 27 45 42 27 42 MAX UNIT AVD = − 1, CL = 100 pF RL = 2 kΩ, AVD = − 1, 10-V step To 0.1% 0.34 0.34 To 0.01% 0.4 0.4 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 33                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142M electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 200 1500 100 8 −0.8 −2 −0.8 −0.3 to 3.2 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.4 3.7 3.4 3.7 25°C 25 C IOH = − 15 mA IOH = 100 µA Full range 3.75 3.75 3.65 3.65 3.45 25°C 25 C IOL = 15 mA IOL = 100 µA 3.45 75 125 150 225 150 225 1.4 1.2 Full range 5 1.4 200 200 250 250 1.25 VIC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V µA A V 125 Full range 50 nA V 75 1.2 25°C −2 −2.3 0 to 3 µV V 100 200 −2.3 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IOL = 1 mA IOL = 10 mA MAX 200 Full range IOL = 150 µA IOL = 1.5 mA Low-level output voltage TYP 2200 1.7 25°C IOH = 1 mA IOH = 10 mA VOL 1900 Full range IOH = − 150 µA IOH = − 1.5 mA VOH 220 MIN 2600 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2142AM TYP 220 1.25 50 mV V mV V 220 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejecVCC ± = ± 2.5 V to ± 15 V, tion ratio (∆VCC ± /∆VIO) RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 25°C No load, Full range † Full range is − 55°C to 125°C. 34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/mV 5 118 85 118 dB 80 106 90 106 dB 85 6.6 8.8 9.2 6.6 8.8 9.2 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142M operating characteristics, VCC = 5 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts Settling time Vn TLE2142M TEST CONDITIONS MIN TYP TLE2142AM MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 MAX UNIT AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step Equivalent input noise voltage RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 1 Hz 0.48 0.48 VN(PP) f = 0.1 Hz to 10 Hz 0.51 0.51 Equivalent input noise current f = 10 Hz 1.92 1.92 In f = 1 kHz 0.5 0.5 THD + N Total harmonic distortion plus noise RL = 2 kΩ†, f = 10 kHz B1 Unity-gain bandwidth VO = 1 V to 3 V, AVD = 2, RL = 2 kΩ†, CL = 100 pF 5.9 5.9 MHz RL = 2 kΩ†, f = 100 kHz CL = 100 pF 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1, RL = 2 kΩ†, RL = 2 kΩ†, CL = 100 pF 660 660 kHz CL = 100 pF 57° 57° Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin † RL terminates at 2.5 V. POST OFFICE BOX 655303 0.0052% • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 0.0052% 35                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142M electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2142M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range Full range RS = 50 Ω 7 25°C MAX 275 750 100 7 250 −0.7 −0.7 −1.8 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.3 13.7 13.3 13.7 25°C 25 C IO = − 15 mA IO = − 100 µA Full range 13.7 13.7 13.6 13.6 13.3 IO = 150 µA IO = 1.5 mA 25°C 25 C IO = 15 mA IO = 100 µA Full range −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 20 µA A V 13.3 −14.9 100 nA V −14.7 25°C −1.5 −1.8 −15 to 13 µV V 100 250 −1.5 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IO = 1 mA IO = 10 mA TYP 1600 1.7 Full range IO = − 1 mA IO = − 10 mA Maximum negative peak VOM − output voltage swing 1200 Full range IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 290 MIN 2000 25°C VICR MAX Full range VIC = 0, TLE2142AM TYP V −13.4 450 100 450 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 ICC Supply current VO = 0, VIC = 2.5 V VO = ± 10 V, RL = 2 kΩ 25°C 85 Full range 80 25°C 90 Full range 85 VID = 1 V VID = − 1 V 25°C 108 dB 80 106 90 106 dB 85 −25 −50 20 31 20 31 Full range POST OFFICE BOX 655303 85 −50 † Full range is − 55°C to 125°C. 36 108 −25 25°C No load, V/mV 20 • DALLAS, TEXAS 75265 6.9 9 9.4 6.9 mA 9 9.4 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142M operating characteristics, VCC± = ±15 V, TA = 25°C TLE2142M PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, MIN TYP 27 27 TLE2142AM MAX MIN TYP 45 27 45 42 27 42 MAX UNIT RL = 2 kΩ, CL = 100 pF AVD = − 1, AVD = − 1, 10-V step To 0.1% 0.34 0.34 To 0.01% 0.4 0.4 RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 1 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 37                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144M electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2144M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range RS = 50 Ω, Full range High-level output voltage 8 Low-level output voltage 0.5 3 100 8 −0.8 −2 −0.8 −0.3 to 3.2 0 to 3 −0.3 to 3.2 Full range 0 to 2.7 −0.3 to 2.9 0 to 2.7 −0.3 to 2.9 3.9 4.1 3.9 4.1 3.8 4 3.8 4 3.4 3.7 3.4 3.7 25°C Full range 3.75 3.75 3.65 3.65 3.45 IOL = 1.5 µA IOL = 15 mA 25°C 3.45 75 125 150 225 150 225 1.6 1.2 IOL = 10 mA Full range 5 1.6 200 200 250 250 1.45 VIC = ± 2.5 V, RL = 2 kΩ, VO = 1 V to − 1.5 V µA A V 125 Full range 50 nA V 75 1.2 25°C −2 −2.3 0 to 3 mV 100 250 −2.3 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IOL = 100 µA IOL = 1 mA MAX 250 Full range IOH = − 15 mA IOH = 100 µA IOH = 1 mA TYP 4.4 1.7 25°C IOH = 10 mA IOL = 150 µA VOL 3.8 Full range IOH = − 150 µA IOH = − 1.5 mA VOH 0.5 MIN 5.2 25°C VICR MAX Full range VO = 2.5 V, VIC = 2.5 V TLE2144AM TYP 95 1.45 50 mV V mV V 95 AVD Large-signal differential voltage amplification ri Input resistance 25°C 70 70 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω ICC Supply current VO = 2.5 V, VIC = 2.5 V Full range RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 118 85 118 dB 80 106 90 106 dB 25°C No load, † Full range is − 55°C to 125°C. 38 V/mV 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 85 13.2 17.6 18.4 13.2 17.6 18.4 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144M operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS SR + Positive slew rate SR − Negative slew rate ts Settling time Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO = 1 V to 3 V, AVD = 2, B1 Unity-gain bandwidth Gain-bandwidth product BOM Maximum output-swing bandwidth φm Phase margin † RL terminates at 2.5 V TLE2144M MIN TYP TLE2144AM MAX MIN TYP 45 45 42 42 To 0.1% 0.16 0.16 To 0.01% 0.22 0.22 MAX UNIT AVD = − 1, CL = 500 pF RL = 2 kΩ†, AVD = − 1, 2.5-V step RS = 20 Ω, f = 10 Hz 15 15 RS = 20 Ω, f = 1 kHz 10.5 10.5 f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.92 1.92 f = 1 kHz 0.5 0.5 RL = 2 kΩ†, f = 10 kHz 0.0052% 0.0052% RL = 2 kΩ†, CL = 100 pF 5.9 5.9 MHz RL = 2 kΩ†, f = 100 kHz CL = 100 pF, 5.8 5.8 MHz VO(PP) = 2 V, AVD = 1 RL = 2 kΩ†, RL = 2 kΩ†, 660 660 kHz CL = 100 pF 57° 57° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V/ s V/µs µss nV/√Hz µV V pA/√Hz 39                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144M electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLE2144M MIN 25°C VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current Common-mode input voltage range Full range RS = 50 Ω 7 0.5 1.5 100 7 −0.7 −0.7 −1.8 −15.3 to 13.2 −15 to 13 −15.3 to 13.2 Full range −15 to 12.7 −15.3 to 12.9 −15 to 12.7 −15.3 to 12.9 13.8 14.1 13.8 14.1 13.7 14 13.7 14 13.1 13.7 13.1 13.7 25°C 25 C Full range 13.7 13.7 13.6 13.6 13.1 IO = 1.5 mA IO = 15 mA 25°C 25 C Full range IO = 10 mA −14.7 −14.9 −14.5 −14.8 −14.5 −14.8 −13.4 −13.8 −13.4 −13.8 −14.6 −14.6 −14.5 −14.5 −13.4 Full range 20 µA A V 13.1 −14.9 100 nA V −14.7 25°C −1.5 −1.8 −15 to 13 mV 100 250 −1.5 UNIT µV/°C V/°C 1.7 25°C 25 C RS = 50 Ω IO = 100 µA IO = 1 mA MAX 250 Full range IO = − 15 mA IO = − 100 µA IO = − 1 mA TYP 3.2 1.7 25°C IO = − 10 mA IO = 150 µA Maximum negative VOM − peak output voltage swing 2.4 Full range IO = − 150 µA IO = − 1.5 mA Maximum positive peak VOM + output voltage swing 0.6 MIN 4 25°C VICR MAX Full range VIC = 0, TLE2144AM TYP V −13.4 170 100 170 AVD Large-signal differential voltage amplification ri Input resistance 25°C 65 65 MΩ ci Input capacitance 25°C 2.5 2.5 pF zo Open-loop output impedance f = 1 MHz 25°C 30 30 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 ICC Supply current VO = 0, VIC = 2.5 V VO = ± 10 V, RL = 2 kΩ RS = 50 Ω 25°C 85 Full range 80 25°C 90 Full range 85 108 85 108 dB 80 106 90 106 dB VID = 1 V VID = − 1 V 25°C −50 −25 −50 20 31 20 31 25°C No load, Full range POST OFFICE BOX 655303 85 −25 † Full range is − 55°C to 125°C 40 V/mV 20 • DALLAS, TEXAS 75265 13.8 18 18.8 13.8 mA 18 18.8 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144M operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER SR + Positive slew rate SR − Negative slew rate ts TEST CONDITIONS TLE2144M MIN TYP TLE2144AM MAX MIN TYP 27 45 27 45 27 42 27 42 RL = 2 kΩ, CL = 100 pF AVD = − 1, AVD = − 1, 10-V step To 0.1% Settling time 15 15 Equivalent input noise voltage RS = 20 Ω, RS = 20 Ω, f = 10 Hz Vn f = 1 kHz 10.5 10.5 VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current THD + N Total harmonic distortion plus noise VO(PP) = 20 V, AVD = 10, RL = 2 kΩ, f = 10 kHz B1 Unity-gain bandwidth RL = 2 kΩ, Gain-bandwidth product RL = 2 kΩ, f = 100 kHz BOM Maximum output-swing bandwidth VO(PP) = 20 V, AVD = 1, φm Phase margin at unity gain RL = 2 kΩ, To 0.01% 0.34 0.34 .4 .4 MAX UNIT V/ s V/µs µss nV/√Hz f = 0.1 Hz to 1 Hz 0.48 0.48 f = 0.1 Hz to 10 Hz 0.51 0.51 f = 10 Hz 1.89 1.89 f = 10 kHz 0.47 0.47 0.01% 0.01% CL = 100 pF 6 6 MHz CL = 100 pF, 5.9 5.9 MHz RL = 2 kΩ, CL = 100 pF 668 668 kHz CL = 100 pF 58° 58° POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µV V pA/√Hz 41                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2141Y electrical characteristics at specified free-air temperature, VCC ± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER VIO IIO Input offset voltage IIB Input bias current VICR Common-mode input voltage range TEST CONDITIONS VIC = 0, VO = 0 Input offset current RS = 50 Ω, Ω RS = 50 Ω VOM + Maximum positive peak output voltage swing IO = − 150 µA IO = − 1.5 mA IO = − 15 mA IO = 150 µA VOM − Maximum negative peak output voltage swing AVD ri Large-signal differential voltage amplification ci Input capacitance zo Open-loop output impedance IO = 1.5 mA IO = 15 mA VO = ± 10 V, RL = 2 kΩ RS = 50 Ω kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX 200 1000 UNIT µV 7 100 nA −0.7 −1.5 µA −15.3 to 13.2 13.8 14.1 13.7 14 V V 13.3 13.7 −14.7 −14.9 −14.5 −14.8 −13.4 −13.8 100 450 V/mV 65 MΩ 2.5 pF 30 Ω 80 108 dB 85 106 dB −25 −50 20 31 f = 1 MHz VIC = VICRmin, TYP −15 to 13 Input resistance CMRR Common-mode rejection ratio 42 TLE2141Y MIN 3.5 V mA 4.5 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2142Y electrical characteristics at specified free-air temperature, VCC ± = ±15 V, TA = 25°C PARAMETER VIO IIO Input offset voltage IIB Input bias current VICR Common-mode input voltage range TEST CONDITIONS VIC = 0, VO = 0 Input offset current RS = 50 Ω, VOM − Maximum negative peak output voltage swing TYP MAX 150 875 100 nA −1.5 µA IO = − 150 µA IO = − 1.5 mA 13.8 14.1 13.7 14 IO = − 15 mA IO = 150 µA 13.3 13.7 −14.7 −14.9 −14.5 −14.8 −13.4 −13.8 100 VO = ± 10 V, RL = 2 kΩ µV 7 −15.3 to 13.2 IO = 1.5 mA IO = 15 mA UNIT −0.7 −15 to 13 RS = 50 Ω VOM + Maximum positive peak output voltage swing TLE2142Y MIN V V V AVD ri Large-signal differential voltage amplification 450 V/mV Input resistance 65 MΩ ci Input capacitance 2.5 pF zo Open-loop output impedance 30 Ω 80 108 dB 85 106 dB −25 −50 20 31 f = 1 MHz RS = 50 Ω CMRR Common-mode rejection ratio VIC = VICRmin, kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ± 2.5 V to ± 15 V, RS = 50 Ω IOS Short-circuit output current VO = 0 VID = 1 V VID = − 1 V ICC Supply current VO = 0, No load POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 6.9 mA 9 mA 43                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TLE2144Y electrical characteristics at VCC± = ±15 V, TA = 25°C (unless otherwise noted) PARAMETER VIO Input offset voltage IIO IIB Input offset current VICR TEST CONDITIONS VIC = 0, RS = 50 Ω,, Input bias current RS = 50 Ω Common-mode input voltage range VOM + Maximum positive peak output voltage swing VOM − Maximum negative peak output voltage swing AVD ri Large-signal differential voltage amplification ci Input capacitance zo Open-loop output impedance IO = − 150 µA IO = − 1.5 mA IO = − 15 mA IO = 150 µA IO = 1.5 mA IO = 15 mA VO = ± 10 V, RL = 2 kΩ Supply-voltage rejection ratio (∆VCC ± /∆VIO) RS = 50 Ω −0.7 −1.5 µA 13.8 14.1 14 13.3 13.7 −14.7 −14.9 −14.5 −14.8 −13.4 −13.8 100 450 V/mV 65 MΩ 2.5 pF 80 No load V Ω 108 dB dB 31 VO = 0, V 30 20 Supply current V 13.7 106 ICC • DALLAS, TEXAS 75265 nA −50 VO = 0 POST OFFICE BOX 655303 mV 85 Short-circuit output current 44 1.8 100 −25 IOS UNIT 7 RS = 50 Ω VID = 1 V VID = − 1 V MAX 0.3 −15.3 to 13.2 f = 1 MHz VIC = VICRmin, VCC ± = ± 2.5 V to ± 15 V, TYP −15 to 13 Input resistance CMRR Common-mode rejection ratio kSVR VO = 0 TLE2144Y MIN 13.8 mA 18 mA                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO IIO Input offset voltage Distribution Input offset current vs Free-air temperature 4 IIB Input bias current vs Common-mode input voltage vs Free-air temperature 5 6 Maximum positive peak output voltage vs Supply voltage vs Free-air temperature vs Output current vs Settling time 7 8 9 11 VOM − Maximum negative peak output voltage vs Supply voltage vs Free-air temperature vs Output current vs Settling time 7 8 10 11 VO(PP) VOH Maximum peak-to-peak output voltage vs Frequency 12 High-level output voltage vs Output current 13 VOL Low-level output voltage vs Output current 14 AVD Large-signal differential voltage amplification vs Frequency vs Free-air temperature 15 16 zo Closed-loop output impedance vs Frequency 17 IOS Short-circuit output current vs Free-air temperature 18 CMRR Common-mode rejection ratio vs Frequency vs Free-air temperature 19 20 kSVR Supply-voltage rejection ratio vs Frequency vs Free-air temperature 21 22 ICC Supply current vs Supply voltage vs Free-air temperature 23 24 Vn Vn Equivalent input noise voltage vs Frequency 25 Input noise voltage Over a 10-second period 26 In THD + N Noise current vs Frequency 27 Total harmonic distortion plus noise vs Frequency 28 SR Slew rate vs Free-air temperature vs Load capacitance 29 30 VOM + Pulse response B1 φm 1, 2, 3 Noninverting large signal vs Time 31 Inverting large signal vs Time 32 Small signal vs Time 33 Unity-gain bandwidth vs Load capacitance 34 Gain margin vs Load capacitance 35 Phase margin vs Load capacitance 36 Phase shift vs Frequency 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 45                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS TLE2141 DISTRIBUTION OF INPUT OFFSET VOLTAGE TLE2142 DISTRIBUTION OF INPUT OFFSET VOLTAGE 24 236 Units Tested From 1 Wafer Lot VCC ± = ± 15 V TA = 25°C P Package 20 Percentage of Units − % Percentage of Units − % 20 24 236 Units Tested From 1 Wafer Lot VCC ± = ± 15 V TA = 25°C P Package 16 12 8 16 12 8 4 4 0 −800 0 −400 400 0 −800 −600 −400 −200 800 VIO − Input Offset Voltage − µV Figure 1 400 600 800 INPUT OFFSET CURRENT† vs FREE-AIR TEMPERATURE 20 24 250 Units Tested From 1 Wafer Lot VCC ± = ± 15 V TA = 25°C N Package 18 IIIO IO − Input Offset Current − nA Percentage of Units − % 200 Figure 2 TLE2144 DISTRIBUTION OF INPUT OFFSET VOLTAGE 20 0 VIO − Input Offset Voltage − µV 16 12 8 4 VO = 0 VIC = 0 16 14 12 10 8 6 VCC ± = ± 2.5 V VCC ± = ± 15 V 4 2 0 − 2 −1.6 −1.2 −0.8 −0.4 0 0.4 0.8 1.2 1.6 2 VIO − Input Offset Voltage − mV 0 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C Figure 3 Figure 4 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS INPUT BIAS CURRENT† vs FREE-AIR TEMPERATURE INPUT BIAS CURRENT† vs COMMON-MODE INPUT VOLTAGE −1000 0 VCC ± = ± 2.5 V VO = 0 VIC = 0 IIIB IB − Input Bias Current − nA uA IIIB IB − Input Bias Current − µA −0.2 −0.4 −0.6 TA = 125°C −0.8 TA = 25°C −1 TA = − 55°C −1.2 −1.4 −3 −1.5 −1 −0.5 0 0.5 −2.5 −2 VIC − Common-Mode Input Voltage − V −900 −800 VCC ± = ± 2.5 V −700 VCC ± = ± 15 V −600 −500 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C 1 Figure 5 Figure 6 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 15 RL = 2 kΩ TA = 25°C 18 V OM − Maximum Peak Output Voltage − V V OM − Maximum Peak Output Voltage − V 24 12 VOM + 6 0 −6 VOM − −12 −18 − 24 0 3 6 9 12 15 18 21 24 VCC ± − Supply Voltage − V VCC ± = ± 15 V 14.6 RL = ∞ 14.2 VOM + 13.8 RL = 2 kΩ −13.8 −14.2 RL = 2 kΩ VOM − −14.6 RL = ∞ −15 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C Figure 8 Figure 7 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 47                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE† vs OUTPUT CURRENT 14.6 VCC ± = ± 15 V 14.4 14.2 TA = 125°C 14 TA = 25°C TA = − 55°C 13.8 13.6 −0.1 −0.4 −1 −10 −4 − 40 −100 V OM − − Maximum Negative Peak Output Voltage − V V OM + − Maximum Positive Peak Output Voltage − V MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE† vs OUTPUT CURRENT −13.4 VCC ± = ± 15 V −13.6 −13.8 TA = 125°C −14 −14.2 TA = − 55°C −14.4 TA = 25°C −14.6 −14.8 − 15 0.1 0.4 1 Figure 9 V O(PP) − Maximum Peak-to-Peak Output Voltage − V VOM V OM − Maximum Peak Output Voltage − V 0.1% 0.01% 5 2.5 Rising 0 Falling −2.5 0.01% −5 0.1% −7.5 −10 −12.5 0 100 200 300 400 500 30 VCC ± = ± 15 V RL = 2 kΩ 25 TA = 25°C 20 TA = 125°C 15 10 TA = − 55°C 5 0 100 k 400 k 1M 4M f − Frequency − Hz ts − Settling Time − ns Figure 11 Figure 12 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 48 100 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE† vs FREQUENCY AVD = −1 VCC ± = ± 15 V TA = 25°C 7.5 40 Figure 10 MAXIMUM PEAK OUTPUT VOLTAGE vs SETTLING TIME 10 10 IO − Output Current − mA IO − Output Current − mA 12.5 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 M                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE† vs OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE† vs OUTPUT CURRENT 4.6 1400 VCC = 5 V VOL V OL − Low-Level Output Voltage − mV V OH − High-Level Output Voltage − V VCC = 5 V 4.4 TA = 125°C 4.2 TA = 25°C 4 TA = − 55°C 3.8 3.6 1200 TA = 125°C 1000 800 600 TA = 25°C 400 200 TA = − 55°C 3.4 −0.1 −1 −10 0 0.1 −100 1 IO − Output Current − mA 10 100 IO − Output Current − mA Figure 13 Figure 14 120 0° 110 20° 100 40° 90 60° 80 Phase Shift 80° 70 100° 60 120° AVD 50 140° 40 160° 30 180° VCC ± = ± 15 V RL = 2 kΩ CL = 100 pF TA = 25°C 20 10 0 200° 220° 240° − 10 1 10 100 Phase Shift A AVD VD − Large-Signal Differential Voltage Amplification − dB LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 1k 10 k 100 k 1M 260° 10 M f − Frequency − Hz Figure 15 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 49                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION† vs FREE-AIR TEMPERATURE 140 A AVD VD − Large-Signal Differential Voltage Amplification − dB VCC ± = ± 15 V VO = ± 10 V RL = 10 kΩ 120 RL = 2 kΩ 100 80 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C Figure 16 SHORT-CIRCUIT OUTPUT CURRENT† vs FREE-AIR TEMPERATURE CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY 60 100 VCC ± = ± 15 V VO = 0 IOS − Short-Circuit Output Current − mA z o − Closed-Loop Output Impedance − Ω 30 Ω 10 1 AVD = 100 0.1 AVD = 10 AVD = 1 0.01 0.001 1k 10 k 100 k 1M 10 M f − Frequency − Hz 50 VID = 1 40 30 VID = − 1 20 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C Figure 18 Figure 17 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS COMMON-MODE REJECTION RATIO† vs FREE-AIR TEMPERATURE COMMON-MODE REJECTION RATIO vs FREQUENCY 120 VCC ± = ± 15 V TA = 25°C 120 CMRR − Common-Mode Rejection Ratio − dB CMRR − Common-Mode Rejection Ratio − dB 140 100 80 60 40 20 0 100 1k 100 k 10 k f − Frequency − Hz VIC = VICRmin 116 112 108 VCC ± = ± 15 V 104 100 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C 1M Figure 20 Figure 19 SUPPLY-VOLTAGE REJECTION RATIO† vs FREE-AIR TEMPERATURE SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY 110 kSVR k SVR − Supply-Voltage Rejection Ratio − dB kSVR k SVR − Supply-Voltage Rejection Ratio − dB 160 140 kSVR + 120 kSVR − 100 80 60 40 20 VCC ± = ± 2.5 V to ± 15 V TA = 25°C 0 10 k 10 100 1k VCC = 5 V 100 k 1M 10 M f − Frequency − Hz VCC ± = ± 2.5 V to ± 15 V 108 106 104 102 100 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C Figure 22 Figure 21 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 51                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS SUPPLY CURRENT† vs FREE-AIR TEMPERATURE SUPPLY CURRENT† vs SUPPLY VOLTAGE 3.8 4 VO = 0 No Load TA = 125°C IIDD CC − Supply Current − mA IDD I CC − Supply Current − mA 3.6 3.5 TA = 25°C 3 TA = − 55°C 2.5 VCC ± = ± 15 V 3.4 VCC ± = ± 2.5 V 3.2 3 VO = 0 No Load 2.8 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C 2 0 4 8 12 16 20 |VCC ±| − Supply Voltage − V 24 Figure 23 Figure 24 EQUIVALENT INPUT NOISE VOLTAGE† vs FREQUENCY INPUT NOISE VOLTAGE OVER A 10-SECOND PERIOD 750 VCC ± = ± 15 V f = 0.1 to 10 Hz TA = 25°C VCC ± = ± 15 V RS = 20 Ω 500 200 Input Noise Voltage − nV Vn − Equivalent Input Noise Voltage − nV/ Hz 250 TA = − 55°C 150 TA = 125°C 100 TA = 25°C 50 250 0 −250 −500 −750 0 1 10 100 1k 10 k 0 2 4 6 8 t − Time − s f − Frequency − Hz Figure 25 Figure 26 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 52 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY NOISE CURRENT† vs FREQUENCY THD + N − Total Harmonic Distortion + Noise − % In − Noise Current − pA/ Hz 8 6 TA = − 55°C 4 TA = 25°C 2 TA = 125°C 0 1 10 100 1k 10 k 1% VO(PP) = 20 V VCC ± = ± 15 V TA = 25°C AV = 100 RL = 600 Ω 0.1% AV = 10 RL = 600 Ω AV = 100 RL = 2 kΩ 0.01% AV = 10 RL = 2 kΩ 0.001% 10 100 f − Frequency − Hz Figure 27 1k 10 k f − Frequency − Hz 100 k Figure 28 SLEW RATE† vs FREE-AIR TEMPERATURE SLEW RATE vs LOAD CAPACITANCE 60 50 50 40 SR − Slew Rate − V/ µ s SR − Slew Rate − V/ µ s SR + 40 SR − 30 20 10 VCC ± = ± 15 V AVD = − 1 RL = 2 kΩ CL = 500 pF SR+ 30 20 SR − 10 VCC ± = ± 15 V AVD = − 1 TA = 25°C 0 −75 −50 −25 0 25 50 75 100 125 150 TA − Free-Air Temperature − °C 0 0.01 Figure 29 0.1 1 CL − Load Capacitance − nF 10 Figure 30 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 53                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS NONINVERTING LARGE-SIGNAL PULSE RESPONSE† INVERTING LARGE-SIGNAL PULSE RESPONSE† 15 15 TA = 125°C TA = 25°C 10 TA = 25°C 5 VO − Output Voltage − V VO VO − Output Voltage − V VO 10 TA = − 55°C 0 TA = − 55°C −5 TA = 25°C VCC ± = ± 15 V AVD = 1 RL = 2 kΩ CL = 300 pF −10 TA = − 55°C TA = 125°C 5 0 TA = 125°C VCC ± = ± 15 V AVD = −1 RL = 2 kΩ CL = 300 pF TA = 125°C −15 0 1 2 3 4 5 0 1 t − Time − µs 2 7 VCC ± = ± 15 V RL = 2 kΩ B1 B 1 − Unity-Gain Bandwidth − MHz TA = − 55°C 50 0 VCC ± = ± 15 V AVD = −1 RL = 2 kΩ CL = 300 pF TA = 25°C −100 400 800 5 UNITY-GAIN BANDWIDTH† vs LOAD CAPACITANCE 100 0 4 Figure 32 SMALL-SIGNAL PULSE RESPONSE −50 3 t − Time − µs Figure 31 VO − Output Voltage − mV VO TA = 25°C −5 −10 −15 TA = − 55°C 1200 1600 6 TA = 25°C 5 TA = 125°C 4 3 2 1 10 100 1000 10000 CL − Load Capacitance − pF t − Time − ns Figure 34 Figure 33 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. 54 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 TYPICAL CHARACTERISTICS PHASE MARGIN† vs LOAD CAPACITANCE GAIN MARGIN† vs LOAD CAPACITANCE 14 12 TA = − 55°C 8 6 TA = 125°C TA = 25°C 50° TA = 125°C 40° 30° 20° 4 10° 2 TA = 25°C 0 10 TA = − 55°C 60° φ m − Phase Margin Gain Margin − dB 10 70° VCC ± = ± 15 V AVD = 1 RL = 2 kΩ to ∞ VO = − 10 V to 10 V 100 1000 CL − Load Capacitance − pF 10000 0° 10 VCC ± = ± 15 V RL = 2 kΩ Figure 35 100 1000 CL − Load Capacitance − pF 10000 Figure 36 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 55                    SLOS183C − FEBRUARY 1997 − REVISED JUNE 2006 APPLICATION INFORMATION input offset voltage nulling The TLE2141 series offers external null pins that can be used to further reduce the input offset voltage. If this feature is desired, connect the circuit of Figure 37 as shown. If external nulling is not needed, the null pins may be left unconnected. IN + 3 2 IN − 5 OFFSET N2 + 6 OUT − 5 kΩ 1 OFFSET N1 1 kΩ VCC − (split supply) GND (single supply) Figure 37. Input Offset Voltage Null Circuit 56 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 5962-9321601QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9321602QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) 5962-9321603Q2A ACTIVE LCCC FK 20 1 TBD 5962-9321603QHA ACTIVE CFP U 10 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 5962-9321603QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9321604Q2A ACTIVE LCCC FK 20 1 TBD 5962-9321604QHA ACTIVE CFP U 10 1 TBD POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 5962-9321604QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9321605Q2A ACTIVE LCCC FK 20 1 TBD 5962-9321605QCA ACTIVE CDIP J 14 1 TBD 5962-9321606Q2A ACTIVE LCCC FK 20 1 TBD 5962-9321606QCA ACTIVE CDIP J 14 1 TBD A42 SNPB TLE2141ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141AMFKB OBSOLETE LCCC FK 20 TLE2141AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB TLE2141CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2141CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141ID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM TBD Addendum-Page 1 POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type POST-PLATE N / A for Pkg Type N / A for Pkg Type POST-PLATE N / A for Pkg Type N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2141IDG4 ACTIVE SOIC D 8 TLE2141IDR ACTIVE SOIC D TLE2141IDRG4 ACTIVE SOIC TLE2141IP ACTIVE TLE2141IPE4 Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2141MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2141MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2141MFKB OBSOLETE LCCC FK 20 TLE2141MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB TLE2142ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142ACP OBSOLETE PDIP P 8 TBD Call TI TLE2142AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142AIP OBSOLETE PDIP P 8 TBD POST-PLATE N / A for Pkg Type TBD Call TI N / A for Pkg Type Call TI Call TI TLE2142AMD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2142AMDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2142AMFKB ACTIVE LCCC FK 20 1 TBD TLE2142AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2142AMUB ACTIVE CFP U 10 1 TBD A42 SNPB N / A for Pkg Type TLE2142CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2142CPE4 ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU N / A for Pkg Type Addendum-Page 2 POST-PLATE N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2142CPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CPWLE OBSOLETE TSSOP PW 16 TBD Call TI TLE2142CPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142CPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2142IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2142IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2142MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (RoHS) TLE2142MDR ACTIVE SOIC D 8 2500 TBD TLE2142MFKB ACTIVE LCCC FK 20 1 TBD TLE2142MJGB ACTIVE CDIP JG 8 1 TBD TLE2142MUB ACTIVE CFP U 10 1 TLE2144ACN ACTIVE PDIP N 14 25 TLE2144ACNE4 ACTIVE PDIP N 14 25 TLE2144AIN ACTIVE PDIP N 14 TLE2144AINE4 ACTIVE PDIP N TLE2144AMFKB ACTIVE LCCC TLE2144AMJB ACTIVE CDIP TLE2144CDW ACTIVE TLE2144CDWG4 Call TI POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type TBD A42 SNPB N / A for Pkg Type Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type FK 20 1 TBD J 14 1 TBD A42 SNPB SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2144CDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2144CDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2144CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2144CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2144IDW ACTIVE SOIC DW 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM Addendum-Page 3 POST-PLATE N / A for Pkg Type N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 11-Dec-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLE2144IDWG4 ACTIVE SOIC DW 16 TLE2144IDWR ACTIVE SOIC DW TLE2144IDWRG4 ACTIVE SOIC TLE2144IN ACTIVE TLE2144INE4 ACTIVE TLE2144MDW TLE2144MFKB Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type ACTIVE SOIC DW 16 40 TBD CU NIPDAU Level-1-220C-UNLIM ACTIVE LCCC FK 20 1 TBD TLE2144MJB ACTIVE CDIP J 14 1 TBD A42 SNPB TLE2144MN OBSOLETE PDIP N 14 TBD Call TI POST-PLATE N / A for Pkg Type N / A for Pkg Type Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 7-May-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 7-May-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLE2141AIDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2141CDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2141IDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2142ACDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2142AIDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2142CDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2142CDR D 8 FMX 330 0 6.4 5.2 2.1 8 12 Q1 TLE2142CPWR PW 16 MLA 330 12 7.0 5.6 1.6 8 12 Q1 TLE2142IDR D 8 TAI 330 12 6.4 5.2 2.1 8 12 Q1 TLE2142IDR D 8 FMX 330 0 6.4 5.2 2.1 8 12 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) TLE2141AIDR D 8 TAI 346.0 346.0 61.0 TLE2141CDR D 8 TAI 346.0 346.0 61.0 TLE2141IDR D 8 TAI 346.0 346.0 61.0 TLE2142ACDR D 8 TAI 346.0 346.0 61.0 TLE2142AIDR D 8 TAI 346.0 346.0 61.0 TLE2142CDR D 8 TAI 346.0 346.0 61.0 TLE2142CDR D 8 FMX 342.9 336.6 20.6 TLE2142CPWR PW 16 MLA 342.9 336.6 20.6 TLE2142IDR D 8 TAI 346.0 346.0 61.0 TLE2142IDR D 8 FMX 342.9 336.6 20.6 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 7-May-2007 Pack Materials-Page 3 MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated