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74AC11240DWR

74AC11240DWR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC24_300MIL

  • 描述:

    IC BUFFER INVERT 5.5V 24SOIC

  • 数据手册
  • 价格&库存
74AC11240DWR 数据手册
74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 D D D D D DB, DW, OR NT PACKAGE (TOP VIEW) Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC t (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT) 1Y1 1Y2 1Y3 1Y4 GND GND GND GND 2Y1 2Y2 2Y3 2Y4 description 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 1OE 1A1 1A2 1A3 1A4 VCC VCC 2A1 2A2 2A3 2A4 2OE This octal buffer/line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device provides inverting outputs and symmetrical active-low output-enable (OE) inputs. This device features high fan-out and improved fan-in. The 74AC11240 is organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. The 74AC11240 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each buffer) INPUTS OUTPUT Y OE A L H L L L H H X Z logic symbol† 1OE 1A1 1A2 1A3 1A4 24 23 EN 2OE 1 1 22 2 21 3 20 4 1Y1 1Y2 2A1 2A2 1Y3 2A3 1Y4 2A4 13 17 EN 1 9 16 10 15 11 14 12 2Y1 2Y2 2Y3 2Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright  1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 13 24 2OE 23 1 22 2 21 3 20 4 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 17 9 16 10 15 11 14 12 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . . . . . . . . . . . . . . . 0.65 W DW package . . . . . . . . . . . . . . . . . . 1.7 W NT package . . . . . . . . . . . . . . . . . . . 1.3 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils, except for the NT package, which has a trace length of zero. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 recommended operating conditions VCC Supply voltage VIH High-level input voltage VCC = 3 V VCC = 4.5 V MIN NOM MAX 3 5 5.5 0.9 Low-level input voltage VI VO Input voltage 0 Output voltage 0 IOH High-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature V 3.85 VIL VCC = 4.5 V VCC = 5.5 V 1.35 V 1.65 VCC VCC VCC = 3 V VCC = 4.5 V Low-level output current V 2.1 3.15 VCC = 5.5 V VCC = 3 V IOL UNIT V V –4 –24 VCC = 5.5 V VCC = 3 V –24 VCC = 4.5 V VCC = 5.5 V 24 mA 12 mA 24 OE 0 5 Data 0 10 –40 85 ns/V °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –50 mA VOH IOH = –4 mA IOH = –24 24 mA IOH = –75 mA{ IOL = 12 mA IOL = 24 mA IOZ II ICC Ci CO IOL = 75 mA{ VO = VCC or GND VI = VCC or GND VI = VCC or GND, MIN TA = 25°C TYP MAX 3V 2.9 2.9 4.4 4.4 5.5 V 5.4 5.4 3V 2.58 2.48 4.5 V 3.94 3.8 5.5 V 4.94 4.8 VI = VCC or GND VO = VCC or GND MAX UNIT V 3.85 3V 0.1 0.1 4.5 V 0.1 0.1 5.5 V 0.1 0.1 3V 0.36 0.44 4.5 V 0.36 0.44 5.5 V 0.36 0.44 5.5 V IO = 0 MIN 4.5 V 5.5 V IOL = 50 mA VOL VCC V 1.65 5.5 V ±0.5 ±5 mA 5.5 V ±0.1 ±1 mA 5.5 V 8 80 mA 5V 4 pF 5V 10 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y MIN TA = 25°C TYP MAX MIN MAX 1.5 7.6 10.5 1.5 11.7 1.5 6.3 8.6 1.5 9.5 1.5 8.2 11.6 1.5 12.7 1.5 7.6 10.8 1.5 12 1.5 5.5 7.5 1.5 7.8 1.5 6.7 9.4 1.5 9.8 UNIT ns ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y TA = 25°C MIN TYP MAX MIN MAX 1.5 5.4 7.5 1.5 8.4 1.5 4.6 6.6 1.5 7.2 1.5 5.7 8.2 1.5 9.2 1.5 5.3 7.7 1.5 8.7 1.5 4.7 6.3 1.5 6.6 1.5 5.2 7.3 1.5 7.7 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd d 4 Power dissipation capacitance per buffer POST OFFICE BOX 655303 TEST CONDITIONS Outputs enabled Outputs disabled • DALLAS, TEXAS 75265 CL = 50 pF, pF f = 1 MHz TYP 39 12 UNIT pF 74AC11240 OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS SCAS448A – MAY 1987 – REVISED APRIL 1996 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test GND CL = 50 pF (see Note A) Output Control (low-level enabling) VCC 50% VCC 50% VCC tPHL 0V tPLH VOH Output S1 Open 2 × VCC GND 500 Ω LOAD CIRCUIT Input Open TEST tPLH /tPHL tPLZ /tPZL tPHZ /tPZH 50% VCC 50% VCC VOL VCC 50% VCC 0V tPZL [ VCC tPLZ Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at GND (see Note B) 50% VCC 50% VCC VOL tPHZ tPZH VOLTAGE WAVEFORMS 20% VCC 50% VCC 80% VCC VOH [0V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  1998, Texas Instruments Incorporated
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