SCAS049C − MARCH 1989 − REVISED MAY 2004
D 3-State Outputs Interface Directly With
D
D
D
D
DB, DW, N, OR PW PACKAGE
(TOP VIEW)
System Bus
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
500-mA Typical Latch-Up Immunity at
125°C
Provides Bus Interface From Multiple
Sources in High-Performance Systems
A/B
1Y
2Y
GND
GND
GND
GND
3Y
4Y
OE
description/ordering information
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
1A
1B
2A
2B
VCC
VCC
3A
3B
4A
4B
This device is designed to multiplex signals from 4-bit data sources to four output data lines in bus-organized
systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at a high logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
PDIP − N
SOIC − DW
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SSOP − DB
TSSOP − PW
Tube
74AC11257N
Tube
74AC11257DW
Tape and reel
74AC11257DWR
Tape and reel
74AC11257DBR
Tube
74AC11257PW
Tape and reel
74AC11257PWR
TOP-SIDE MARKING
74AC11257N
AC11257
AE257
AE257
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
Y
DATA
OE
SELECT
A/B
A
B
H
X
X
X
Z
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
!"# $ %& ' # "$ (&)*%"# +"#',
+&%#$ % ! # $('% %"# $ (' #-' #' !$ '."$ $# &!' #$
$#" +" + /" " #0, +&%# ( %'$$ 1 + '$ # '%'$$" *0 %*&+'
#'$# 1 "** (" "!'#' $,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCAS049C − MARCH 1989 − REVISED MAY 2004
logic diagram (positive logic)
OE
A/B
1A
1B
2A
2B
3A
3B
4A
4B
10
1
20
2
1Y
19
18
3
2Y
17
14
8
3Y
13
12
9
4Y
11
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCAS049C − MARCH 1989 − REVISED MAY 2004
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
High-level input voltage
5.5
0.9
1.35
V
1.65
VCC
VCC
0
VCC = 3 V
VCC = 4.5 V
Low-level output current
V
V
0
High-level output current
Dt/Dv
5
UNIT
3.85
Output voltage
IOL
3
3.15
Input voltage
IOH
MAX
VCC = 4.5 V
VCC = 5.5 V
Low-level input voltage
VI
VO
NOM
2.1
VCC = 5.5 V
VCC = 3 V
VIL
MIN
V
V
−4
−24
VCC = 5.5 V
VCC = 3 V
−24
VCC = 4.5 V
VCC = 5.5 V
24
mA
12
mA
24
Input transition rise or fall rate
10
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = −50 mA
VOH
IOH = −4 mA
VCC
TA = 25°C
MIN
TYP
MAX
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
5.5 V
5.4
5.4
3V
2.58
2.48
3.8
MAX
V
4.5 V
3.94
IOH = −24 mA
5.5 V
4.94
IOH = −75 mA†
5.5 V
3V
0.1
0.1
IOL = 50 mA
4.5 V
0.1
0.1
5.5 V
0.1
0.1
IOL = 12 mA
4.8
3.85
3V
0.36
0.44
4.5 V
0.36
0.44
IOL = 24 mA
5.5 V
0.36
0.44
IOL = 75 mA†
5.5 V
IOZ
II
VO = VCC or GND
VI = VCC or GND
5.5 V
±0.5
5.5 V
ICC
Ci
VI = VCC or GND,
VI = VCC or GND
5.5 V
VOL
IO = 0
5V
• DALLAS, TEXAS 75265
V
1.65
3.5
Co
VO = VCC or GND
5.5 V
8
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
POST OFFICE BOX 655303
UNIT
±5
mA
±0.1
±1
mA
8
80
mA
pF
pF
3
SCAS049C − MARCH 1989 − REVISED MAY 2004
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
tPLH
tPHL
A/B
Any Y
tPZH
tPZL
OE
Any Y
tPHZ
tPLZ
OE
Any Y
MIN
TA = 25°C
TYP
MAX
MIN
MAX
1.5
5.6
8.1
1.5
8.9
1.5
6.2
9
1.5
10.1
1.5
6.1
9.2
1.5
10.2
1.5
6.6
10
1.5
11.2
1.5
5.6
8.2
1.5
9.1
1.5
7.5
10.4
1.5
11.8
1.5
5.6
7.6
1.5
8.3
1.5
6.2
8.8
1.5
9.6
UNIT
ns
ns
ns
ns
switching characteristics, over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
tPLH
tPHL
A/B
Any Y
tPZH
tPZL
OE
Any Y
tPHZ
tPLZ
OE
Any Y
TA = 25°C
MIN
TYP
MAX
MIN
MAX
1.5
3.6
5.8
1.5
6.4
1.5
4.1
6.5
1.5
7.2
1.5
4
6.5
1.5
7.2
1.5
4.4
7.1
1.5
7.9
1.5
3.8
5.9
1.5
6.5
1.5
5
7.6
1.5
8.6
1.5
4.5
6.4
1.5
7.6
1.5
4.8
6.9
1.5
7.6
UNIT
ns
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled
Cpd
4
Power dissipation capacitance
Outputs disabled
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
UNIT
37
CL = 50 pF,
f = 1 MHz
11
pF
SCAS049C − MARCH 1989 − REVISED MAY 2004
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
500 Ω
LOAD CIRCUIT
Output
Control
(low-level
enabling)
VCC
50%
50%
0V
Input
tPHL
tPLH
In-Phase
Output
50% VCC
50% VCC
0V
tPZL
tPLZ
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
VOH
50% VCC
VOL
Output
Waveform 2
S1 at GND
(see Note B)
50%
50%
50% VCC
20% VCC
VOL
tPHZ
tPZH
VOLTAGE WAVEFORMS
[ VCC
50% VCC
80% VCC
VOH
[0V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
30-Jul-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
74AC11257DBR
ACTIVE
SSOP
DB
20
TBD
Call TI
Call TI
74AC11257DBRE4
ACTIVE
SSOP
DB
20
TBD
Call TI
Call TI
74AC11257DBRG4
ACTIVE
SSOP
DB
20
TBD
Call TI
Call TI
74AC11257DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257DWRG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
74AC11257NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
74AC11257PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257PWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257PWG4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AC11257PWR
ACTIVE
TSSOP
PW
20
TBD
Call TI
Call TI
74AC11257PWRE4
ACTIVE
TSSOP
PW
20
TBD
Call TI
Call TI
74AC11257PWRG4
ACTIVE
TSSOP
PW
20
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Jul-2009
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
74AC11257DWR
Package Package Pins
Type Drawing
SOIC
DW
20
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.8
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
13.0
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AC11257DWR
SOIC
DW
20
2000
346.0
346.0
41.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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