74ACTQ541PC

74ACTQ541 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Features General Description ■ ICC and IOZ reduced by 50% ■ Guaranteed simultaneous switching noise level and The 74ACTQ541 is an octal buffer/line driver designed to be employed as memory and address drivers, clock drivers and bus oriented transmitter/receivers. ■ ■ ■ ■ ■ ■ dynamic threshold performance Guaranteed pin-to-pin skew AC performance Inputs and outputs on opposite sides of package for easy board layout Non-inverting 3-STATE outputs Guaranteed 4kV minimum ESD immunity TTL compatible inputs Outputs source/sink 24mA This device is similar in function to the 74ACTQ244 while providing flow-through architecture (inputs on opposite side from outputs). This pinout arrangement makes this device especially useful as an output port for microprocessors, allowing ease of layout and greater PC board density. The 74ACTQ541 utilizes FACT Quiet Series™ technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO™ output control and undershoot corrector in addition to split ground bus for superior performance. Ordering Information Order Number 74ACTQ541SC 74ACTQ541MTC Package Number M20B MTC20 Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. FACT™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation. ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs December 2007 Logic Symbol IEEE/IEC Pin Description Pin Name OE1–OE2 3-STATE Output Enable (Active-LOW) I0–I7 Inputs O1–O7 Truth Table Pin Description Inputs Outputs OE1 OE2 I Outputs L L H H H X X Z X H X Z L L L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 2 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC IIK Parameter Rating Supply Voltage –0.5V to +7.0V DC Input Diode Current VI = –0.5V –20mA VI = VCC + 0.5V +20mA VI DC Input Voltage IOK DC Output Diode Current –0.5V to VCC + 0.5V VO = –0.5V –20mA VO = VCC + 0.5V +20mA VO DC Output Voltage –0.5V to VCC + 0.5V IO DC Output Source or Sink Current ±50mA ICC or IGND DC VCC or Ground Current per Output Pin TSTG ±50mA Storage Temperature –65°C to +150°C DC Latch-Up Source or Sink Current TJ ±300mA Junction Temperature 140°C Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Rating Supply Voltage 4.5V to 5.5V VI Input Voltage 0V to VCC VO Output Voltage 0V to VCC TA Operating Temperature ∆V / ∆t –40°C to +85°C 125mV/ns Minimum Input Edge Rate: VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 3 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Absolute Maximum Ratings TA = +25°C Symbol VIH VIL VOH VOL Parameter VCC (V) Guaranteed Limits 1.5 2.0 2.0 1.5 2.0 2.0 VOUT = 0.1V or VCC – 0.1V 1.5 0.8 0.8 5.5 1.5 0.8 0.8 3.0 IOUT = –50µA 2.99 2.9 2.9 5.5 Maximum LOW Level Input Voltage Maximum LOW Level Output Voltage Typ. VOUT = 0.1V or VCC – 0.1V Minimum HIGH Level Input Voltage Minimum HIGH Level Output Voltage Conditions TA = –40°C to +85°C 4.5 4.5 4.5 4.4 4.4 4.5 VIN = VIL or VIH, 4.49 3.86 3.76 5.5 IOH = –24mA(1) 4.86 4.76 3.0 IOUT = 50µA 0.1 0.1 4.5 0.002 0.1 0.1 4.5 VIN = VIL or VIH, 0.001 0.36 0.44 5.5 IOH = 24mA(1) 0.36 0.44 Units V V V V IIN Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 µA IOZ Maximum 3-STATE Leakage Current 5.5 VI = VIL, VIH; VO = VCC, GND ±0.25 ±2.5 µA ICCT Maximum ICC/Input 5.5 VI = VCC – 2.1V 1.5 mA IOLD Minimum Dynamic Output Current(2) 5.5 VOLD = 1.65V Max. 75 mA 5.5 VOHD = 3.85V Min. –75 mA Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 40.0 µA VOLP Quiet Output Maximum Dynamic VOL 5.0 Figures 1 & 2(3) 1.1 1.5 V VOLV Quiet Output Minimum Dynamic VOL 5.0 Figures 1 & 2(3) –0.6 –1.2 V VIHD Minimum HIGH Level Dynamic Input Voltage 5.0 (4) 1.9 2.2 V VILD Maximum LOW Level Dynamic Input Voltage 5.0 (4) 1.2 0.8 V IOHD ICC 0.6 4.0 Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. Maximum test duration 2.0ms, one output loaded at a time. 3. Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND. 4. Max number of Data Inputs (n) switching. (n–1) Inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD), 0V to threshold (VIHD), f = 1MHz. ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 4 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs DC Electrical Characteristics TA = +25°C, CL = 50pF VCC (V)(5) Min. Typ. Max. Min. Max. Units Propagation Delay, Data to Output 5.0 2.0 4.5 7.0 2.0 7.5 ns 2.0 5.5 7.0 2.0 7.5 Output Enable Time 5.0 Symbol tPLH tPHL tPZH Parameter tPZL tPHZ Output Disable Time 5.0 tPLZ tOSHL tOSLH TA = –40°C to +85°C, CL = 50pF 2.0 5.0 9.0 2.0 9.5 2.0 6.5 9.0 2.0 9.5 1.5 5.5 7.5 1.5 8.0 1.5 5.5 7.5 1.5 8.0 0.5 1.0 1.0 0.5 1.0 1.0 Output to Output Skew, Data to Output(6) ns ns ns Notes: 5. Voltage Range 5.0 is 5.0V ± 0.5V 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol Parameter Conditions Typ. Units CIN Input Capacitance VCC = OPEN 4.5 pF CPD Power Dissipation Capacitance VCC = 5.0V 70 pF ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 5 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs AC Electrical Characteristics VOLP/VOLV and VOHP/VOHV : The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. ■ Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output voltages using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. ■ Measure VOLP and VOLV on the quiet output during the worst case transition for active and enable. Measure VOHP and VOHV on the quiet output during the worst case active and enable transition. ■ Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability of the measurements. Equipment: Hewlett Packard Model 8180A Word Generator PC-163A Test Fixture Tektronics Model 7854 Oscilloscope Procedure: 1. Verify Test Fixture Loading: Standard Load 50pF, 500Ω. 2. Deskew the HFS generator so that no two channels have greater than 150ps skew between them. This requires that the oscilloscope be deskewed first. It is important to deskew the HFS generator channels before testing. This will ensure that the outputs switch simultaneously. VILD and VIHD: ■ Monitor one of the switching outputs using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. ■ First increase the input LOW voltage level, VIL, until the output begins to oscillate or steps out a min of 2ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input LOW voltage level at which oscillation occurs is defined as VILD. ■ Next decrease the input HIGH voltage level, VIH, until the output begins to oscillate or steps out a min of 2ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input HIGH voltage level at which oscillation occurs is defined as VIHD ■ Verify that the GND reference recorded on the oscilloscope has not drifted to ensure the accuracy and repeatability on the measurements. 3. Terminate all inputs and outputs to ensure proper loading of the outputs and that the input levels are at the correct voltage. 4. Set the HFS generator to toggle all but one output at a frequency of 1MHz. Greater frequencies will increase DUT heating and effect the results of the measurement. 5. Set the HFS generator input levels at 0V LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AC devices. Verify levels with an oscilloscope. Notes: 7. VOHVand VOLP are measured with respect to ground reference. 8. Input pulses have the following characteristics: f = 1MHz, tr = 3ns, tf = 3 s, skew < 150ps. Figure 1. Quiet Output Noise Voltage Waveforms Figure 2. Simultaneous Switching Test Circuit ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 6 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs FACT Noise Characteristics 13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 10 0.51 0.35 PIN ONE INDICATOR 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.5M-1994 1.27 0.40 SEATING PLANE E) LANDPATTERN STANDARD: SOIC127P1030X265-20L (1.40) DETAIL A F) DRAWING FILENAME: MKT-M20BREV3 SCALE: 2:1 Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 7 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 4. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 8 ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ * ™ PDP-SPM™ SyncFET™ ® Power220® ® Power247 The Power Franchise® POWEREDGE® Power-SPM™ PowerTrench® TinyBoost™ Programmable Active Droop™ TinyBuck™ ® QFET TinyLogic® QS™ TINYOPTO™ QT Optoelectronics™ TinyPower™ ® Quiet Series™ TinyPWM™ RapidConfigure™ TinyWire™ Fairchild® SMART START™ Fairchild Semiconductor® µSerDes™ ® SPM FACT Quiet Series™ UHC® STEALTH™ FACT® Ultra FRFET™ SuperFET™ FAST® UniFET™ SuperSOT™-3 FastvCore™ VCX™ ® ®* SuperSOT™-6 FlashWriter SuperSOT™-8 * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. FPS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ i-Lo™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I32 ©1993 Fairchild Semiconductor Corporation 74ACTQ541 Rev. 1.6.0 www.fairchildsemi.com 9 74ACTQ541 — Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.