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SN74AHCT1G08
SCLS315Q – MARCH 1996 – REVISED APRIL 2016
SN74AHCT1G08 Single 2-Input Positive-AND Gate
1 Features
3 Description
•
•
•
•
•
•
The SN74AHCT1G08 device is a single 2-input
positive-AND gate. The device performs the Boolean
function Y = A • B or Y = A + B in positive logic. Low
ICC current allows this device to be used in powersensitive or battery-powered applications.
1
Operating Range: 4.5 V to 5.5 V
Maximum tpd of 7.1 ns at 5 V
Low Power Consumption: Maximum ICC of 10-µA
±8-mA Output Drive at 5 V
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA
Per JESD 17
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
TV, Set-Top Box, and Audio
Wireless Infrastructure
Factory Automation and Control
PC and Notebooks
Building Automation
Grid Infrastructure
Medical, Healthcare, and Fitness
Printers
Test and Measurement
EPOS (Electronic Point of Sale)
Telecom Infrastructure
Projectors
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AHCT1G08DBVR
SOT-23 (5)
2.90 mm x 1.60 mm
SN74AHCT1G08DCKR
SC70 (5)
2.00 mm x 1.25 mm
SN74AHCT1G08DRLR
SOT (5)
1.60 mm x 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram
A
B
1
2
4
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AHCT1G08
SCLS315Q – MARCH 1996 – REVISED APRIL 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
3
3
4
4
4
5
5
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 6
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
8.3 Feature Description................................................... 7
8.4 Device Functional Modes.......................................... 7
9
Application and Implementation .......................... 8
9.1 Application Information.............................................. 8
9.2 Typical Application .................................................... 8
10 Power Supply Recommendations ....................... 9
11 Layout..................................................................... 9
11.1 Layout Guidelines ................................................... 9
11.2 Layout Example ...................................................... 9
12 Device and Documentation Support ................. 10
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
10
10
10
10
10
13 Mechanical, Packaging, and Orderable
Information ........................................................... 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision P (May 2013) to Revision Q
•
Added Applications section, Device Information table, Table of Contents, Pin Configuration and Functions section,
Specifications section, ESD Ratings table, Thermal Information table, Typical Characteristics section, Detailed
Description section, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ...... 1
Changes from Revision O (June 2005) to Revision P
•
2
Page
Page
Extended operating temperature range to 125°C................................................................................................................... 4
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SCLS315Q – MARCH 1996 – REVISED APRIL 2016
5 Pin Configuration and Functions
DBV, DCK, and DRL Packages
5-Pin SOT-23, SC70, and SOT
Top View
A
1
B
2
GND
3
5
V
4
Y
CC
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
A
1
I
Input A
B
2
I
Input B
GND
3
—
Ground Pin
VCC
5
—
Supply Pin
Y
4
O
Output
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted). (1)
MIN
MAX
UNIT
Supply voltage
–0.5
7
V
Input voltage (2)
–0.5
7
V
Output voltage (2)
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–20
mA
Output clamp current
VO < 0 or VO > VCC
±20
mA
Continuous output current
VO = 0 to VCC
±25
mA
Continuous current through VCC or GND
±50
mA
Maximum junction temperature, TJ
150
°C
150
°C
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2500
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
4.5
5.5
UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current
–8
mA
IOL
Low-level output current
8
mA
Δt/Δv
Input transition rise and fall rate
20
ns/V
TA
Operating free-air temperature
125
°C
(1)
2
V
V
0.8
V
0
5.5
V
0
VCC
–40
V
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See TI application report, Implications of
Slow or Floating CMOS Inputs (SCBA004).
6.4 Thermal Information
SN74AHCT1G08
THERMAL METRIC
(1)
DBV (SOT-23)
DCK (SC70)
DRL (SOT)
5 PINS
5 PINS
5 PINS
UNIT
226
277.5
242.9
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
Junction-to-case (top) thermal resistance
165
92.9
77.5
°C/W
RθJB
Junction-to-board thermal resistance
59.1
64.2
77.5
°C/W
ψJT
Junction-to-top characterization parameter
45.5
1.9
9.6
°C/W
ψJB
Junction-to-board characterization parameter
58.3
63.5
77.3
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 µA, VCC = 4.5 V
High-level output
voltage
VOH
IOH = –8 mA, VCC = 4.5 V
TA = 25°C
TA = –40°C to 125°C
TA = 25°C
MIN
TYP
4.4
4.5
4.4
TA = –40°C to 125°C
Low-level output
voltage
IOL = 8 mA, VCC = 4.5 V
3.8
0.1
TA = 25°C
0.36
TA = –40°C to 125°C
0.44
TA = 25°C
±0.1
II
Input current
VI = 5.5 V or GND,
VCC = 0 V to 5.5 V
ICC
Supply current
VI = VCC or GND, IO = 0,
VCC = 5.5 V
TA = 25°C
ΔICC (1)
Change in supply
current
One input at 3.4 V, Other Inputs
at VCC or GND, VCC = 5.5 V
TA = 25°C
CI
Input capacitance
VI = VCC or GND, VCC = 5 V
(1)
4
UNIT
V
3.94
IOL = 50 µA, VCC = 4.5 V
VOL
MAX
TA = –40°C to 125°C
±1
1
TA = –40°C to 125°C
10
1.35
TA = –40°C to 125°C
1.5
4
10
V
µA
µA
mA
pF
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
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SCLS315Q – MARCH 1996 – REVISED APRIL 2016
6.6 Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
A or B
Y
CL = 15 pF
TEST CONDITIONS
MIN
TYP
MAX
5
6.2
TA = 25°C
tPLH
Propagation delay,
low to high transition
TA = –40°C to 85°C
1
7.1
TA = –40°C to 125°C
1
7.5
TA = 25°C
tPHL
Propagation delay,
high to low transition
A or B
Y
CL = 15 pF
5
1
7.1
TA = –40°C to 125°C
1
7.5
tPLH
A or B
Y
CL = 50 pF
5.5
Propagation delay,
high to low transition
A or B
Y
CL = 50 pF
1
9
TA = –40°C to 125°C
1
10
5.5
ns
7.9
Propagation delay,
high to low transition
TA = 25°C
tPHL
ns
6.2
TA = –40°C to 85°C
TA = 25°C
Propagation delay,
low to high transition
UNIT
ns
7.9
TA = –40°C to 85°C
1
9
TA = –40°C to 125°C
1
10
ns
6.7 Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
TYP
No load, f = 1 MHz
UNIT
18
pF
6.8 Typical Characteristics
8
7.5
7
Tpd (ns)
6.5
6
5.5
5
4.5
Tpd vs.
Temp
4
-25
-5
15
35
55
75
95
115
135
Temperature (ƒC)
C001
CL = 15 pF
Figure 1. Tpd vs Temperature
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7 Parameter Measurement Information
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
VCC
Open
S1
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
1.5 V
Input
1.5 V
0V
tPHL
tPLH
In-Phase
Output
50% VCC
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
VOH
50% VCC
VOL
1.5 V
1.5 V
0V
tPLZ
tPZL
≈VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
tPZH
tPLH
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
3V
Output
Control
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
CL includes probe and jig capacitance.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output
control.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns,
tf ≤ 3 ns.
The outputs are measured one at a time with one input transition per measurement.
All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
6
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8 Detailed Description
8.1 Overview
The SN74AHCT1G08 device is a single 2-input positive-AND gate. The device performs the Boolean AND
function (Y = A • B or Y = A + B) in positive logic. Low ICC current allows this device to be used in powersensitive or battery-powered applications. Robust inputs allow the device to up-translate with a propagation delay
of 20 ns.
8.2 Functional Block Diagram
A
B
1
4
2
Y
Figure 3. Logic Diagram (Positive Logic)
8.3 Feature Description
The VCC for the device is optimized at 5 V.
Up voltage translation from 3.3 V to 5 V is allowed. The inputs accept VIH levels of 2 V.
Output ringing is minimized by slow edge rates.
Inputs are TTL-Voltage compatible.
8.4 Device Functional Modes
Table 1 lists the functional modes of the SN74AHCT1G08.
Table 1. Function Table
INPUTS
OUTPUT
A
B
Y
H
H
H
L
X
L
X
L
L
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74AHCT1G08 device is a single AND gate, which is often used for many common functions like power
sequencing or an on LED indicator. Because the device is configured to output LOW unless all inputs are HIGH,
an LED tied to the output of the device will only turn HIGH when all systems connected are sending a HIGH, or
ready signal.
9.2 Typical Application
AND Logic Function
Basic LED Driver
VCC
VCC
A– uC or Logic
A– uC or Logic
Y– uC or Logic
B– uC or Logic
AHCT1G08
B– uC or Logic
AHCT1G08
Copyright © 2016, Texas Instruments Incorporated
Figure 4. Typical Application Diagram
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it
can drive currents that would exceed maximum limits. The high drive also creates fast edges into light loads, so
routing and load conditions must be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
– For rise time and fall time specifications, see Δt/ΔV in Recommended Operating Conditions.
– For specified high and low levels, see VIH and VIL in Recommended Operating Conditions.
– Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.
2. Recommended Output Conditions
– Load currents must not exceed 25 mA per output and 50 mA total for the part.
– Outputs must not be pulled above VCC.
8
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Typical Application (continued)
9.2.3 Application Curve
5.5
AHCT1G08
AC
HC
VI
5
4.5
4
3.5
Voltage (V)
3
2.5
2
1.5
1
0.5
0
–0.5
–1.5
0
2
4
6
8
10
12
14
16
18
20
Time (ns)
Load = 50 Ω / 50 pF
VCC = 5 V
Figure 5. Typical Switching Characteristics
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions.
Each VCC pin must have a good bypass capacitor to prevent power disturbance. TI recommends a 0.1-µF
capacitor for devices with a single supply; and a 0.01-µF or 0.022-µF capactor for each power pin if there are
multiple VCC pins. It is ok to parallel multiple bypass capacitors to reject different frequencies of noise. 0.1-μF and
1-μF capacitors are commonly used in parallel. The bypass capacitor must be installed as close to the power pin
as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of
digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3
of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at
the outside connections result in undefined operational states. Observe the following rules under all
circumstances.
• All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from
floating.
• The logic level that must be applied to any particular unused input depends on the function of the device.
Generally they will be tied to GND or VCC, whichever make more sense or is more convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Unused Input
Output
Input
Figure 6. Layout Diagram
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
Implications of Slow or Floating CMOS Inputs, SCBA004
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
10
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
74AHCT1G08DBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
B08G
Samples
74AHCT1G08DCKRE4
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(BE3, BEG, BEJ, BE
L, BES)
Samples
74AHCT1G08DCKRG4
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(BE3, BEG, BEJ, BE
L, BES)
Samples
74AHCT1G08DCKTG4
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(BE3, BEG, BEL, BE
S)
Samples
74AHCT1G08DRLRG4
ACTIVE
SOT-5X3
DRL
5
4000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(BEB, BES)
Samples
SN74AHCT1G08DBV3
ACTIVE
SOT-23
DBV
5
3000
RoHS &
Non-Green
SNBI
Level-1-260C-UNLIM
-40 to 125
B08Y
Samples
SN74AHCT1G08DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(B083, B08G, B08J,
B08L, B08S)
Samples
SN74AHCT1G08DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(B083, B08G, B08J,
B08L, B08S)
Samples
SN74AHCT1G08DCK3
ACTIVE
SC70
DCK
5
3000
RoHS &
Non-Green
SNBI
Level-1-260C-UNLIM
-40 to 125
BEY
Samples
SN74AHCT1G08DCKR
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(BE3, BEG, BEJ, BE
L, BES)
Samples
SN74AHCT1G08DCKT
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(BE3, BEG, BEL, BE
S)
Samples
SN74AHCT1G08DRLR
ACTIVE
SOT-5X3
DRL
5
4000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(BEB, BES)
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
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14-Oct-2022
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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