74CB3T1G125DBVRG4

SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 FEATURES • • • • • • • Output Voltage Translation Tracks VCC Supports Mixed-Mode Signal Operation on All Data I/O Ports – 5-V Input Down to 3.3-V Output Level Shift With 3.3-V VCC – 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V VCC 5-V-Tolerant I/Os, With Device Powered Up or Powered Down Bidirectional Data Flow With Near-Zero Propagation Delay Low ON-State Resistance (ron) Characteristics (ron = 5 Ω Typ) Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 5 pF Typ) Data and Control Inputs Provide Undershoot Clamp Diodes • • • • • • • • • Low Power Consumption (ICC = 20 µA Max) VCC Operating Range From 2.3 V to 3.6 V Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) Supports Digital Applications: Level Translation, USB Interface, Bus Isolation Ideal for Low-Power Portable Equipment DBV PACKAGE (TOP VIEW) OE 5 1 A 2 GND 3 4 DCK PACKAGE (TOP VIEW) VCC OE 1 A 2 GND 3 5 VCC 4 B B See mechanical drawings for dimensions. DESCRIPTION/ORDERING INFORMATION The SN74CB3T1G125 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T1G125 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1). The SN74CB3T1G125 is a 1-bit bus switch with a single ouput-enable (OE) input. When OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the bus switch is OFF, and a high-impedance state exists between the A and B ports. ORDERING INFORMATION TA –40°C to 85°C (1) (2) PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING (2) SOT (SOT-23) – DBV Reel of 3000 SN74CB3T1G125DBVR W25_ SOT (SC-70) – DCK Reel of 3000 SN74CB3T1G125DCKR WM_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. The actual top-side marking has one additional character that designates the assembly/test site. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2006, Texas Instruments Incorporated SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) VCC 5.5 V VCC IN ≈VCC − 1 V ≈VCC OUT ≈VCC − 1 V CB3T 0V 0V Input Voltages Output Voltages NOTE A: If the input high voltage (VIH) level is greater than or equal to VCC – 1 V, and less than or equal to 5.5 V, then the output high voltage (VOH) level will be equal to approximately the VCC voltage level. Figure 1. Typical DC Voltage Translation Characteristics This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE INPUT OE INPUT/OUTPUT A FUNCTION L B A port = B port H Z Disconnect LOGIC DIAGRAM (POSITIVE LOGIC) 2 A OE 2 4 SW 1 Submit Documentation Feedback B SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW) A B VG(1) Control Circuit EN(2) (1) Gate voltage (VG) is equal to approximately VCC + VT when the switch is ON and VI > VCC + VT. (2) EN is the internal enable signal applied to the switch. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VIN Control input voltage range (2) (3) –0.5 7 V VI/O Switch I/O voltage range (2) (3) (4) IIK Control input clamp current VIN < 0 II/OK I/O port clamp current VI/O < 0 IIO ON-state switch current (5) –0.5 7 Continuous current through VCC or GND θJA Package thermal impedance (6) Tstg Storage temperature range (1) (2) (3) (4) (5) (6) UNIT mA –50 mA ±128 mA ±100 mA DBV package 206 DCK package 252 –65 V –50 °C/W °C 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground, unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions for II/O. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage VIH High-level control input voltage VIL Low-level control input voltage VI/O Data input/output voltage TA Operating free-air temperature (1) MIN MAX 2.3 3.6 UNIT VCC = 2.3 V to 2.7 V 1.7 5.5 VCC = 2.7 V to 3.6 V 2 5.5 VCC = 2.3 V to 2.7 V 0 0.7 VCC = 2.7 V to 3.6 V 0 0.8 0 5.5 V –40 85 °C V V V All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback 3 SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 Electrical Characteristics (1) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 3 V, II = –18 mA VOH See Figure 3 and Figure 4 IIN MIN Control inputs VCC = 3.6 V, VIN = 3.6 V to 5.5 V or GND Ioff VCC = 0, VO = 0 to 5.5 V, VI = 0 ICC VCC = 3.6 V, II/O = 0, Switch ON or OFF, VIN = VCC or GND ±10 µA 10 µA VI = VCC or GND 20 VI = 5.5 V 20 Control inputs VCC = 3 V to 3.6 V, One input at VCC – 0.6 V, Other inputs at VCC or GND Cin Control inputs VCC = 3.3 V, VIN = VCC or GND 300 VCC = 3.3 V, VI/O = 5.5 V, 3.3 V, or GND, Switch OFF, VIN = VCC or GND µA µA 3 pF 5 pF VCC = 3.3 V, Switch ON, VIN = VCC or GND VI/O = 5.5 V or 3.3 V VI/O = GND 12 VCC = 2.3 V, TYP at VCC = 2.5 V, VI = 0 IO = 24 mA 5 8 IO = 16 mA 5 8 IO = 64 mA 5 7 IO = 32 mA 5 7 VCC = 3 V, VI = 0 µA ±5 VI = 0 to 0.7 V ∆ICC (4) ron (5) µA –40 VCC = 3.6 V, VO = 0 to 5.5 V, VI = 0, Switch OFF, VIN = VCC or GND Cio(ON) ±10 VI = 0.7 V to VCC – 0.7 V IOZ (3) Cio(OFF) V ±20 VCC = 3.6 V, Switch ON, VIN = VCC or GND UNIT –1.2 VI = VCC – 0.7 V to 5.5 V II (1) (2) (3) (4) (5) TYP (2) MAX 4 pF Ω VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. Measured by the voltage drop between A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2) (1) 4 VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V FROM (INPUT) TO (OUTPUT) tpd (1) A or B B or A 0.25 ns ten OE A or B 1 7.5 1 6.5 ns tdis OE A or B 1 5.5 1 6 ns PARAMETER MIN MAX MIN 0.15 UNIT MAX The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Submit Documentation Feedback SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 PARAMETER MEASUREMENT INFORMATION VCC Input Generator VIN 50 W 50 W VG1 TEST CIRCUIT DUT 2 x VCC Input Generator VI S1 RL VO 50 W GND CL (see Note A) 50 W VG2 RL VD TEST VCC S1 RL VI CL tpd(s) 2.5 V ± 0.2 V 3.3 V ± 0.3 V Open Open 500 W 500 W 3.6 V or GND 5.5 V or GND 30 pF 50 pF tPLZ/tPZL 2.5 V ± 0.2 V 3.3 V ± 0.3 V 2 x VCC 2 x VCC 500 W 500 W GND GND 30 pF 50 pF 0.15 V 0.15 V tPHZ/tPZH 2.5 V ± 0.2 V 3.3 V ± 0.3 V Open Open 500 W 500 W 3.6 V 5.5 V 30 pF 50 pF 0.15 V 0.15 V VCC Output Control (VIN) VCC/2 VCC VCC/2 VCC/2 0V tPLH Output VCC VCC/2 VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s)) Output Waveform 2 S1 at Open (see Note B) VOL + VD VOL tPHZ tPZH VOH VCC/2 tPLZ Output Waveform 1 S1 at 2 x VCC (see Note B) tPHL VCC/2 0V tPZL Output Control (VIN) Open VCC/2 VOH – VD VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W, tr £ 2.5 ns, tt £ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch nd the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. Figure 2. Test Circuit and Voltage Waveforms Submit Documentation Feedback 5 SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs INPUT VOLTAGE OUTPUT VOLTAGE vs INPUT VOLTAGE 3.0 4.0 VCC = 2.3 V IO = 1 µA TA = 25°C V - Output Voltage - V O V - Output Voltage - V O 4.0 2.0 1.0 0.0 3.0 VCC = 3 V IO = 1 µA TA = 25°C 2.0 1.0 0.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0.0 VI - Input Voltage - V 1.0 2.0 Figure 3. Data Output Voltage vs Data Input Voltage 6 3.0 VI - Input Voltage - V Submit Documentation Feedback 4.0 5.0 6.0 SN74CB3T1G125 SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER www.ti.com SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 100 µA 8 mA 16 mA 24 mA 3.0 2.5 2.0 V - Output Voltage High - V OH 3.5 4.0 VCC = 2.3 V to 3.6 V VI = 5.5 V TA = 85°C 2.3 3.5 VCC = 2.3 V to 3.6 V VI = 5.5 V TA = 25°C 100 µA 8 mA 16 mA 24 mA 3.0 2.5 2.0 1.5 1.5 2.5 2.7 2.9 3.1 3.3 VCC - Supply Voltage - V 3.5 3.7 2.3 2.5 2.7 2.9 3.1 3.3 VCC - Supply Voltage - V 3.5 3.7 OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 4.0 V - Output Voltage High - V OH V - Output Voltage High - V OH 4.0 OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE 3.5 VCC = 2.3 V to 3.6 V VI = 5.5 V TA = -40°C 100 µA 8 mA 16 mA 24 mA 3.0 2.5 2.0 1.5 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 VCC - Supply Voltage - V Figure 4. VOH Values Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 74CB3T1G125DBVRE4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 W25F 74CB3T1G125DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 W25F 74CB3T1G125DCKRG4 ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 (WM5, WMF, WMJ, WM R) SN74CB3T1G125DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (W25F, W25J, W25R) SN74CB3T1G125DCKR ACTIVE SC70 DCK 5 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 (WM5, WMF, WMJ, WM R) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of