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SN74CBTLV1G125-Q1
SCDS289B – AUGUST 2009 – REVISED JANUARY 2019
SN74CBTLV1G125-Q1 low-voltage single FET bus switch
1 Features
3 Description
•
The SN74CBTLV1G125 features a single high-speed
line switch. The switch is disabled when the outputenable (OE) input is high.
1
•
•
•
AEC-Q100 Qualified for Automotive Applications
– Device Temperature Grade 1:
–40°C to +125°C, TA
5-Ω Switch Connection Between Two Ports
Rail-to-Rail Switching on Data I/O Ports
Ioff Supports Partial-Power-Down Mode Operation
2 Applications
•
This device is fully specified for partial-power-down
applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device
when it is powered down. The device has isolation
during power off.
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
Ventilator
Device Information(1)
ORDER NUMBER
SN74CBTLV1G125-Q1
PACKAGE
BODY SIZE
SOT-23 (DBV) (5)
2.90 mm × 1.60
mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Application Schematic
2.5 V
C
or
System Logic
C
VCC
A
B
GND
To/From
System
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74CBTLV1G125-Q1
SCDS289B – AUGUST 2009 – REVISED JANUARY 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
5
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions ......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Parameter Measurement Information .................. 6
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
8.3 Feature Description................................................... 7
8.4 Device Functional Modes.......................................... 7
9
Application and Implementation .......................... 8
9.1 Application Information.............................................. 8
9.2 Typical Application ................................................... 8
10 Power Supply Recommendations ....................... 9
11 Layout..................................................................... 9
11.1 Layout Guidelines ................................................... 9
11.2 Layout Example ...................................................... 9
12 Device and Documentation Support ................. 10
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
10
10
10
10
10
10
13 Mechanical, Packaging, and Orderable
Information ........................................................... 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2018) to Revision B
Page
•
Changed Feature From: Qualified for Automotive Applications To: AEC-Q100 Qualified for Automotive Applications ........ 1
•
Changed the ESD Ratings table notes................................................................................................................................... 4
•
Changed the TA MAX value From: 85°C To 125°C in the Recommended Operating Conditions ........................................ 4
Changes from Original (August 2009) to Revision A
•
2
Page
Added Application list, Device Information table, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ............................... 1
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SCDS289B – AUGUST 2009 – REVISED JANUARY 2019
5 Pin Configuration and Functions
DBV Package
SOT-23 (5-Pin)
Top View
OE
1
A
2
GND
3
5
VCC
4
B
Not to scale
Pin Functions
PIN
NAME
NO.
I/O
OE
1
I
A
2
I/O
GND
3
-
B
4
I/O
VCC
5
-
DESCRIPTION
Active low enable
Switch I/O
Ground
Switch I/O
Power Supply
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
VCC
Supply voltage range
–0.5
4.6
V
VI
Input voltage range (2)
–0.5
4.6
V
128
mA
–50
mA
150
°C
Continuous channel current
IIK
Input clamp current
Tstg
Storage temperature range
(1)
(2)
VI/O < 0
–65
UNIT
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002 (1)
HBM ESD Classification Level 2
±2000
Charged-device model (CDM), per AEC Q100-011
CDM ESD Classification Level C5
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
VCC
Supply voltage
VIH
High-level control input voltage
VIL
Low-level control input voltage
TA
Operating free-air temperature
(1)
MIN
MAX
2.3
3.6
VCC = 2.3 V to 2.7 V
1.7
VCC = 2.7 V to 3.6 V
2
V
V
VCC = 2.3 V to 2.7 V
0.7
VCC = 2.7 V to 3.6 V
0.8
–40
UNIT
125
V
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6.4 Thermal Information
SN74CBTLV1G125-Q1
THERMAL METRIC
(1)
SOT-23 (DBV)
UNIT
5 PINS
RθJA
Junction-to-ambient thermal resistance
249.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
174.2
°C/W
RθJB
Junction-to-board thermal resistance
83.9
°C/W
ψJT
Junction-to-top characterization parameter
67.3
°C/W
ψJB
Junction-to-board characterization parameter
83.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VCC = 3 V, II = –18 mA
II
VCC = 3.6 V, VI = VCC or GND
VCC = 0, VI or VO = 0 to 3.6 V, OE = 3.6 V
Ioff
(2)
Ci
Control inputs
VCC = 3.6 V, One input at 3 V, Other inputs at VCC or GND
Control inputs
VI = 3 V or 0
Cio(OFF)
μA
VO = 3 V or 0, OE = VCC
10
μA
μA
VI = 1.7 V,
(3)
VI = 0
VCC = 3 V
pF
7
VI = 0
VI = 2.4 V,
μA
300
2.5
VCC = 2.3 V,
TYP at VCC = 2.5 V
(1)
(2)
(3)
V
±1
100
VCC = 3.6 V, VI = VCC or GND
ΔICC
UNIT
–1.2
15
VCC = 0, VI or VO = 0 to 3.6 V, OE = 0 V
ICC
ron
MIN TYP (1) MAX
TEST CONDITIONS
pF
II = 32 mA
7
10
II = 24 mA
7
10
II = 15 mA
15
25
II = 32 mA
5
7
II = 24 mA
5
7
II = 15 mA
10
15
Ω
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined
by the lower of the voltages of the two (A or B) terminals.
6.6 Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
(1)
(1)
FROM
(INPUT)
TO
(OUTPUT)
VCC = 2.5 V
± 0.2 V
MIN
VCC = 3.3 V
± 0.3 V
MAX
MIN
0.15
UNIT
MAX
A or B
B or A
0.25
ns
ten
OE
A or B
0.5
8
0.5
7.5
ns
tdis
OE
A or B
0.5
8
0.5
7.5
ns
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load
capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
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7 Parameter Measurement Information
2 × VCC
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
RL
LOAD CIRCUIT
VCC
CL
RL
VD
2.5 V ±0.2 V
3.3 V ±0.3 V
30 pF
50 pF
500 W
500 W
0.15 V
0.3 V
VCC
Timing Input
VCC/2
0V
tw
tsu
VCC
VCC/2
Input
th
VCC
VCC/2
VCC/2
VCC/2
Data Input
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
VCC/2
Input
0V
tPHL
tPLH
VOH
VCC/2
Output
VCC/2
VOL
tPHL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLH
VOH
Output
VCC/2
VCC
Output
Control
VCC/2
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VCC/2
VCC/2
0V
tPZL
tPLZ
VCC
VCC/2
tPZH
VOL + VD
tPHZ
VCC/2
VOH − VD
≈0 V
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output
control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns,
tf ≤ 2 ns.
D.
The outputs are measured one at a time, with one transition per measurement.
E.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
G.
tPLH and tPHL are the same as tpd.
H.
All parameters and waveforms are not applicable to all devices.
VOH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
A.
F.
VOL
Figure 1. Load Circuit and Voltage Waveforms
6
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SCDS289B – AUGUST 2009 – REVISED JANUARY 2019
8 Detailed Description
8.1 Overview
The SN74CBTLV1G125 device is a 1-channel 1:1 high-speed FET switch. The low ON-state resistance of the
switch allows connections to be made with minimal propagation delay. The (OE) pin is an active low logic control
pin that controls the data flow. The FET is disabled when the output-enable (OE) input is high. This device is fully
specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not
backflow through the device when it is powered down. The device has isolation during power off. To ensure the
high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking capability of the driver.
8.2 Functional Block Diagram
2
A
4
SW
B
1
OE
8.3 Feature Description
The SN74CBTLV1G125 features 5-Ω switch connection between ports, allowing for low signal loss across the
switch. Rail-to-rail switching on data I/O allows for full voltage swing outputs. Ioff supports partial-power-down
mode operation, protecting the chip from voltages at output ports when it is not powered on.
8.4 Device Functional Modes
Table 1 shows the functional modes of SN74CBTLV1G125.
Table 1. Function Table
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74CBTLV1G125 can be used to switch a signal path. The switch is bidirectional, so the A and B pins can
be used as either inputs or outputs. This switch is typically used when there is one signal path that needs to be
isolated at certain times.
9.2 Typical Application
2.5 V
C
or
System Logic
C
VCC
A
To/From
System
B
GND
Figure 2. Typical Application
9.2.1 Design Requirements
The SN74CBTLV1G125 device can be properly operated without any external components. TI recommends
pulling up the digital control pin (OE) to VCC or pulling down to GND to avoid undesired switch positions that
could result from the floating pin. A floating digital pin could cause excess current consumption refer to
Implications of Slow or Floating CMOS Inputs.
9.2.2 Detailed Design Procedure
When OE is high, the active bus. This means that there is a low impedance path between the A and B pins. The
0.1-µF capacitor on VCC is a decoupling capacitor and should be placed as close as possible to the device.
8
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10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating listed in the
Recommended Operating Conditions table. Each VCC terminal should have a good bypass capacitor to prevent
power disturbance. For devices with a single supply, a 0.1-μF bypass capacitor is recommended. If multiple pins
are labeled VCC, then a 0.01-μF or 0.022-μF capacitor is recommended for each VCC because the VCC pins
are tied together internally. For devices with dual supply pins operating at different voltages, for example VCC
and VDD, a 0.1-µF bypass capacitor is recommended for each supply pin. To reject different frequencies of
noise, use multiple bypass capacitors in parallel. Capacitors with values of 0.1 μF and 1 μF are commonly used
in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to the loop antenna theory but are different enough to be discussed
separately from the theory. When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection
occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to
1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed
capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight,
and therefore; some traces must turn corners. Figure 3 shows progressively better techniques of rounding
corners. Only the last example (BEST) maintains constant trace width and minimizes reflections.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 3. Example Layout
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12 Device and Documentation Support
12.1 Device Support
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
10
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
74CBTLV1G125DBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
VCTO
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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