[ /Title
(CD74
HC139
,
CD74
HCT13
9)
/Subject
(High
Speed
CMOS
Logic
Dual
2-to-4
Line
Decod
CD54HC139, CD74HC139,
CD54HCT139, CD74HCT139
Data sheet acquired from Harris Semiconductor
SCHS148D
September 1997 - Revised October 2003
High-Speed CMOS Logic
Dual 2- to 4-Line Decoder/Demultiplexer
Features
Description
• Multifunction Capability
- Binary to 1 of 4 Decoders or 1 to 4 Line
Demultiplexer
The ’HC139 and ’HCT139 devices contain two independent
binary to one of four decoders each with a single active low
enable input (1E or 2E). Data on the select inputs (1A0 and
1A1 or 2A0 and 2A1) cause one of the four normally high
outputs to go low.
• Active Low Mutually Exclusive Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
If the enable input is high all four outputs remain high. For
demultiplexer operation the enable input is the data input.
The enable input also functions as a chip select when these
devices are cascaded. This device is functionally the same
as the CD4556B and is pin compatible with it.
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
The outputs of these devices can drive 10 low power
Schottky TTL equivalent loads. The HCT logic family is
functionally as well as pin equivalent to the LS logic family.
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30%of VCC at
VCC = 5V
Ordering Information
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
• Memory Decoding, Data Routing, Code Conversion
Pinout
CD54HC139, CD54HCT139
(CERDIP)
CD74HC139, CD74HCT139
(PDIP, SOIC)
TOP VIEW
1E 1
TEMP. RANGE
(oC)
PACKAGE
CD54HC139F3A
-55 to 125
16 Ld CERDIP
CD54HCT139F3A
-55 to 125
16 Ld CERDIP
CD74HC139E
-55 to 125
16 Ld PDIP
CD74HC139M
-55 to 125
16 Ld SOIC
CD74HC139MT
-55 to 125
16 Ld SOIC
CD74HC139M96
-55 to 125
16 Ld SOIC
CD74HCT139E
-55 to 125
16 Ld PDIP
CD74HCT139M
-55 to 125
16 Ld SOIC
CD74HCT139MT
-55 to 125
16 Ld SOIC
CD74HCT139M96
-55 to 125
16 Ld SOIC
PART NUMBER
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
16 VCC
1A0 2
15 2E
1A1 3
14 2A0
1Y0 4
13 2A1
1Y1 5
12 2Y0
1Y2 6
11 2Y1
1Y3 7
10 2Y2
GND 8
9 2Y3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
1
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
Functional Diagram
4 (12)
2 (14)
Y0
5 (11)
A0
Y1
6 (10)
3 (13)
Y2
A1
7 (9)
Y3
1 (15)
E
TRUTH TABLE
INPUTS ENABLE SELECT
OUTPUTS
E
A1
A0
Y3
Y2
Y1
Y0
0
0
0
1
1
1
0
0
0
1
1
1
0
1
0
1
0
1
0
1
1
0
1
1
0
1
1
1
1
X
X
1
1
1
1
X = Don’t Care, Logic 1 = High, Logic 0 = Low
Logic Diagram
4 (12)
Y0
2 (14)
A0
5 (11)
Y1
3 (13)
A1
6 (10)
Y2
7 (9)
Y3
1 (15)
E
2
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . . . .±50mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
67
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
73
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Supply Voltage Range, VCC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
PARAMETER
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL
VI (V)
IO (mA)
VCC
(V)
VIH
-
-
2
1.5
-
-
1.5
4.5
3.15
-
-
3.15
-
3.15
-
V
6
4.2
-
-
4.2
-
4.2
-
V
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
-
1.5
-
V
HC TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
VIL
VOH
-
VIH or VIL
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
VOL
VIH or VIL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
-
2
-
-
0.5
-
0.5
-
0.5
V
4.5
-
-
1.35
-
1.35
-
1.35
V
6
-
-
1.8
-
1.8
-
1.8
V
-0.02
2
1.9
-
-
1.9
-
1.9
-
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-0.02
6
5.9
-
-
5.9
-
5.9
-
V
-
-
-
-
-
-
-
-
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
-5.2
6
5.48
-
-
5.34
-
5.2
-
V
0.02
2
-
-
0.1
-
0.1
-
0.1
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
0.02
6
-
-
0.1
-
0.1
-
0.1
V
-
-
-
-
-
-
-
-
-
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
5.2
6
-
-
0.26
-
0.33
-
0.4
V
II
VCC or
GND
-
6
-
-
±0.1
-
±1
-
±1
µA
ICC
VCC or
GND
0
6
-
-
8
-
80
-
160
µA
3
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
SYMBOL
VI (V)
IO (mA)
High Level Input
Voltage
VIH
-
-
Low Level Input
Voltage
VIL
-
High Level Output
Voltage
CMOS Loads
VOH
VIH or VIL
PARAMETER
25oC
VCC
(V)
-40oC TO 85oC -55oC TO 125oC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
4.5 to
5.5
2
-
-
2
-
2
-
V
-
4.5 to
5.5
-
-
0.8
-
0.8
-
0.8
V
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
±0.1
-
±1
-
±1
µA
HCT TYPES
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
VOL
VIH or VIL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
II
VCC and
GND
0
5.5
-
ICC
VCC or
GND
0
5.5
-
-
8
-
80
-
160
µA
∆ICC
(Note 2)
VCC
-2.1
-
4.5 to
5.5
-
100
360
-
450
-
490
µA
NOTE:
2. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
All
0.7
NOTE: Unit Load is ∆ICC limit specified in DC Electrical Table, e.g.,
360µA max at 25oC.
Switching Specifications Input tr, tf = 6ns
PARAMETER
-40oC TO
85oC
25oC
-55oC TO
125oC
SYMBOL
TEST
CONDITIONS
VCC
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
tPLH, tPHL
CL = 50pF
2
-
-
145
-
180
-
220
ns
4.5
-
-
29
-
36
-
44
ns
6
-
-
25
-
31
-
38
ns
2
-
-
135
-
170
-
205
ns
4.5
-
-
27
-
34
-
41
ns
6
-
-
23
-
29
-
35
ns
HC TYPES
Propagation Delay
A0, A1 to Outputs
E to Outputs
tPLH, tPHL
CL = 50pF
Select to Output
tPLH, tPHL
CL = 15pF
5
-
12
-
-
-
-
-
ns
Enable to Output
tPLH, tPHL
CL = 15pF
5
-
11
-
-
-
-
-
ns
4
CD54HC139, CD74HC139, CD54HCT139, CD74HCT139
Switching Specifications Input tr, tf = 6ns
PARAMETER
SYMBOL
Output Transition Time (Figure 1) tTLH, tTHL
(Continued)
-40oC TO
85oC
25oC
-55oC TO
125oC
TEST
CONDITIONS
VCC
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
CL = 50pF
2
-
-
75
-
95
-
110
ns
4.5
-
-
15
-
19
-
22
ns
6
-
-
13
-
16
-
19
ns
Power Dissipation
Capacitance, (Notes 3, 4)
CPD
-
5
-
55
-
-
-
-
-
pF
Input Capacitance
CIN
-
-
-
-
10
-
10
-
10
pF
A0, A1 to Outputs
tPLH,
tPHL
CL = 50pF
4.5
-
-
34
-
43
-
51
ns
E to Outputs
tPLH,
tPHL
CL = 50pF
4.5
-
-
34
-
43
-
51
ns
Select to Output
tPLH, tPHL
CL = 15pF
5
-
14
-
-
-
-
-
ns
Enable to Output
tPLH, tPHL
CL = 15pF
5
-
14
-
-
-
-
-
ns
Output Transition Time
(Figure 2)
tTLH, tTHL
CL = 50pF
4.5
-
-
15
-
19
-
22
ns
Power Dissipation
Capacitance, (Notes 3, 4)
CPD
-
5
-
59
-
-
-
-
-
pF
Input Capacitance
CIN
-
-
-
-
10
-
10
-
10
pF
HCT TYPES
Propagation Delay
NOTES:
3. CPD is used to determine the dynamic power consumption, per decoder/demux.
4. PD = VCC2 fi (CPD + CL) where: fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Test Circuits and Waveforms
tr = 6ns
tf = 6ns
INPUT
GND
tTLH
GND
tTHL
90%
50%
10%
INVERTING
OUTPUT
3V
2.7V
1.3V
0.3V
INPUT
tTHL
tPHL
tf = 6ns
tr = 6ns
VCC
90%
50%
10%
tTLH
90%
1.3V
10%
INVERTING
OUTPUT
tPLH
tPHL
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC
tPLH
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
5
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
CD54HC139F
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
CD54HC139F
CD54HC139F3A
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
8409201EA
CD54HC139F3A
CD54HCT139F
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
CD54HCT139F
CD54HCT139F3A
ACTIVE
CDIP
J
16
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
CD54HCT139F3A
CD74HC139E
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-55 to 125
CD74HC139E
CD74HC139EE4
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-55 to 125
CD74HC139E
CD74HC139M
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HC139M
CD74HC139M96
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HC139M
CD74HCT139E
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-55 to 125
CD74HCT139E
CD74HCT139EE4
ACTIVE
PDIP
N
16
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-55 to 125
CD74HCT139E
CD74HCT139M
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HCT139M
CD74HCT139M96
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HCT139M
CD74HCT139M96G4
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HCT139M
CD74HCT139ME4
ACTIVE
SOIC
D
16
40
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-55 to 125
HCT139M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2021
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of