74FCT162841CTPACT

Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16841T CY74FCT162841T 20-Bit Latches SCCS067A - July 1994 - Revised October 2001 Features • • • • • • • • Functional Description FCT-C speed at 5.5 ns (FCT16841T Com’l) Ioff supports partial-power-down mode operation Edge-rate control circuitry for significantly improved noise characteristics Typical output skew < 250 ps ESD > 2000V TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages Industrial temperature range of −40˚C to +85˚C VCC = 5V ± 10% The CY74FCT16841T and CY74FCT162841T are 20-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 10-bit latches, or as a single 10-bit latch, or as a single 20-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16841T is ideally suited for driving high-capacitance loads and low-impedance backplanes. CY74FCT16841T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce)