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ADC08351
8-Bit, 42 MSPS, 40 mW A/D Converter
General Description
The ADC08351 is an easy to use low power, low cost, small
size, 42 MSPS analog-to-digital converter that digitizes signals to 8 bits. The ADC08351 uses an unique architecture
that achieves 7.2 Effective Bits with a 4.4 MHz input and
42 MHz clock frequency and 6.8 Effective Bits with a 21 MHz
input and 42 MHz clock frequency. Output formatting is
straight binary coding.
To minimize system cost and power consumption, the
ADC08351 requires minimal external components and includes input biasing to allow optional a.c. input signal coupling. The user need only provide a +3V supply and a clock.
Many applications require no separate reference or driver
components.
The excellent dc and ac characteristics of this device, together with its low power consumption and +3V single supply
operation, make it ideally suited for many video and imaging
applications, including use in portable equipment. Total
power consumption is reduced to less than 7 mW in the
power-down mode. Furthermore, the ADC08351 is resistant
to latch-up and the outputs are short-circuit proof.
Fabricated on a 0.35 micron CMOS process, the ADC08351
is offered in TSSOP and LLP (a molded lead frame-based
chip-scale package), and is designed to operate over the
industrial temperature range of −40˚C to +85˚C.
Features
n Single +3V Operation
n Power Down Feature
n TRI-STATE Outputs
Key Specifications
j Resolution
8 Bits
j Maximum Sampling Frequency
42 MSPS (min)
j ENOB @ fCLK = 42 MHz, fIN = 4.4 MHz
7.2 Bits (typ)
j Guaranteed No Missing Codes
j Power Consumption
40 mW (typ); 48 mW (max)
(Excluding Reference Current)
Applications
n
n
n
n
n
n
n
n
n
Video Digitization
Digital Still Cameras
Set Top Boxes
Digital Camcorders
Communications
Medical Imaging
Personal Computer Video
CCD Imaging
Electro-Optics
n Low Input Capacitance
n Internal Sample-and-Hold Function
Pin Configuration
20-Pin TSSOP
24-Pin LLP (CSP)
10089501
Top View
10089534
Bottom View
© 2003 National Semiconductor Corporation
DS100895
www.national.com
ADC08351 8-Bit, 42 MSPS, 40 mW A/D Converter
November 2003
ADC08351
Ordering Information
ADC08351CIMTC
TSSOP
ADC08351CIMTCX
TSSOP (tape & reel)
ADC08351CILQ
LLP (tape & reel - 1, 000 units)
ADC08351CILQX
LLP (tape & reel - 4, 500 units)
ADC08351 Block Diagram
10089502
Pin Descriptions and Equivalent Circuits
(LLP pins in parentheses)
Pin
No.
Symbol
17
(17)
VIN
Analog signal input. Conversion range is 0.5 VP-P to
0.68 VA.
14
(14)
VREF
Positive reference voltage input. Operating range of
this voltage is 0.75V to VA. This pin should be
bypassed with a 10 µF tantalum or aluminum
electrolytic capacitor and a 0.1 µF ceramic chip
capacitor.
1
(22)
OE
CMOS/TTL compatible digital input that, when low,
enables the digital outputs of the ADC08351. When
high, the outputs are in a high impedance state.
12
(11)
CLK
CMOS/TTL compatible digital clock input. VIN is
sampled on the falling edge of CLK input.
PD
CMOS/TTL compatible digital input that, when high,
puts the ADC08351 into the power down mode,
where it consumes minimal power. When this pin is
low, the ADC08351 is in the normal operating mode.
15
(15)
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Equivalent Circuit
Description
2
Pin
No.
Symbol
Equivalent Circuit
ADC08351
Pin Descriptions and Equivalent Circuits (LLP pins in parentheses)
(Continued)
Description
D0–D7
Conversion data digital output pins. D0 is the LSB,
D7 is the MSB. Valid data is output just after the
rising edge of the CLK input. These pins are enabled
by bringing the OE pin low.
11, 13
(10,
12)
VD
Positive digital supply pin. Connect to a clean, quiet
voltage source of +3V. VA and VD should have a
common supply and be separately bypassed with a
10 µF tantalum or aluminum electrolytic capacitor and
a 0.1 µF ceramic chip capacitor. See Section 3.0 for
more information.
2, 20
(21,
23)
DGND
3 thru
10
(1 thru
8)
16
(16)
VA
18, 19
(18,
19)
AGND
The ground return for the digital supply. AGND and
DGND should be connected together close to the
ADC08351.
Positive analog supply pin. Connected to a clean,
quiet voltage source of +3V. VA and VD should have
a common supply and be separately bypassed with a
10 µF tantalum or aluminum electrolytic capacitor and
a 0.1 µF ceramic chip capacitor. See Section 3.0 for
more information.
The ground return for the analog supply. AGND and
DGND should be connected together close to the
ADC08351 package.
3
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ADC08351
Absolute Maximum Ratings
Package Dissipation at TA = 25˚C
(Notes 1,
(Note 4)
ESD Susceptibility (Note 5)
2)
Human Body Model
4000V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Soldering Temp., Infrared, 10 sec. (Note 6)
Supply Voltage (VA, VD)
Storage Temperature
Machine Model
4.2V
Voltage on Any Input or Output
Pin
−0.3V to 4.2V
Ground Difference
(AGND–DGND)
Operating Temperature Range
VD to DGND
Input Current at Any Pin (Note 3)
± 25 mA
± 50 mA
Package Input Current (Note 3)
−40˚C TA ≤ +85˚C
Supply Voltage (VA, VD)
−0.5 to (VA + 0.5V)
Digital Output Voltage (VOH, VOL)
−65˚C to +150˚C
Operating Ratings (Notes 1, 2)
± 100 mV
CLK, OE Voltage Range
200V
235˚C
+2.7V to +3.6V
Ground Difference
|DGND–AGND|
0V to 100 mV
VIN Voltage Range (VP-P)
0.5V to 0.68 VA
Converter Electrical Characteristics
The following specifications apply for VA = VD = +3.0 VDC, VREF = 2.4V, VIN = 1.63 VP-P, OE = 0V, CL = 20 pF,
fCLK = 42 MHz, 50% duty cycle, unless otherwise specified. Boldface limits apply for TA = TMIN to TMAX: all other limits TA =
25˚C (Notes 7, 8)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
± 0.7
± 1.4
LSB (max)
+1.3
LSB (max)
−1.0
LSB (min)
0
(max)
DC Accuracy
INL
Integral Non Linearity Error
DNL
Differential Non Linearity
± 0.6
Missing Codes
EZ
Zero Scale Offset Error
−17
mV
EFS
Full Scale Offset Error
−7
mV
Video Accuracy
DP
Differential Phase Error
fCLK = 20 MHz, Video Ramp Input
1.0
Degree
DG
Differential Gain Error
fCLK = 20 MHz, Video Ramp Input
1.5
%
4
pF
Analog Input and Reference Characteristics
CIN
VIN Input Capacitance
RIN
RIN Input Resistance
FPBW
Full-Power Bandwidth
VREF
Reference Input Voltage
IREF
Reference Input Current
VIN = 1.5V + 0.7 Vrms
(CLK LOW)
(CLK HIGH)
At pin 14
11
pF
7.2
kΩ
120
MHz
0.735
V
VA
V
7.7
mA
PD = Low
10.5
mA
PD = High
1
mA
2.9
mA
Power Supply Characteristics
IA
ID
Analog Supply Current
Digital Supply Current
PD = Low, No Digital Output Load
PD = High
0.5
Total Operating Current
Excluding Reference Current, VIN = 0 VDC
13.4
16
mA (max)
Power Consumption (active)
PD = Low (excluding reference current)
40.2
48
mW (max)
Power Consumption (power
down)
PD = High (excluding reference current)
mA