ADC121S625EVAL/NOPB

National Semiconductor July 25, 2006 Rev - 2.1/CS RoHS Compliant Evaluation Board User's Guide ADC121S625 12-Bit, 50 kSPS to 200 kSPS, Differential Input, Micro-Power Sampling A/D Converter 1 http://www.national.com Table of Contents 1.0 Introduction 3 2.0 Board Assembly 3 3.0 Quick Start 4 3.1 Stand Alone Mode 4 3.2 Computer Mode 4 4.0 Functional Description 5 4.1 The Signal Input 5 4.2 ADC Reference Circuitry 5 4.3 ADC Clock Circuit 5 4.4 Digital Data Output 5 4.5 Power Supply Connections 5 5.0 Software Operation and Settings 6 6.0 Hardware Schematic 7 7.0 Evaluation Board Specifications 8 8.0 ADC121S625B Evaluation Board Bill of Materials 8 9.0 Tables of Test Points, Jumpers and Connectors 9 2 http://www.national.com 1.0 Introduction The ADC121S625EVAL/RoHS Design Kit (consisting of the ADC121S625B Evaluation Board and this User's Guide) is designed to ease evaluation and design-in of the National Semiconductor ADC121S625 12-bit Analog-toDigital Converter, which can operate at speeds up to 200 kSPS. The evaluation board can be used in either of two modes. In the Stand-Alone or Manual mode, suitable test equipment, such as a logic analyzer, can be used with the board to evaluate the ADC121S625’s performance. In the Computer or Automatic mode, data capture and evaluation is simplified by connecting this board to National Semiconductor's Data Capture Board (order number WAVEVSN BRD 4.0) with a ribbon cable (order number WV4ADCIFCABLE), which is connected to a personal computer through a USB port and running WaveVision4 software. The WaveVision4 program can be downloaded from the web at http://www.national.com/adc. The WaveVision4 software operates under Microsoft Windows. The signal at the Analog Input is digitized, captured, and displayed on a PC monitor in the time and frequency domain. The software will perform an FFT on the captured data upon command. This FFT plot shows dynamic performance in the form of SNR, SINAD, THD, SFDR and ENOB. A histogram of the captured data is also available. The differential signal at analog inputs J2 or J3 is digitized by U1, the ADC121S625. The ADC121S625 uses an external oscillator that is provided on this board by Y2 or J6. 2.0 Board Assembly The ADC121S625B evaluation board comes fully assembled and ready for use. Refer to the Bill of Materials for a description of components, to Figure 1 for major component placement and to Figure 2 for the Evaluation Board schematic. U1 DUT VREF select WV4 connector J2 VIN JP5 CLK select 5V remote J6 EXT CLK input Y2 CLK OSC 3 http://www.national.com Figure 1 Component and Test Point Locations voltage, the jumper must be removed from 3.0 Quick Start JP1 and pin 2 may be driven directly. The ADC121S625B evaluation board may be 9. The digital inputs and outputs are available for used in the Stand-Alone mode to capture data probing at J4. with a logic analyzer or third party equipment, or it 3.2 Computer Mode may be used in the Computer Mode with a WaveVision4 Data Capture (WV4) Board. In both Refer to Figure 1 for locations of test points and cases, the data may be analyzed with the major components. WaveVision4 software. 1. Run the WaveVision4 program. Version 4.2 3.1 Stand Alone Mode or higher is required to interface the WV4 board with the ADC121S625B evaluation Refer to Figure 1 for locations of test points and board. While the program is loading, continue major components. below. 1. Install an appropriate crystal oscillator into 2. Install an appropriate crystal oscillator into socket Y2 and short pins 1 & 2 of JP5 (See socket Y2 and short pins 1 & 2 of JP5 (See Table 1). Alternatively, connect a signal Table 1). Alternatively, connect a signal generator with TTL logic levels to BNC generator with TTL logic levels to BNC connector J6 and short pins 2 & 3 of JP5. In connector J6 and short pins 2 & 3 of JP5. either case, short pins 4 & 10 of J4 to provide 3. Connect a USB cable between the the clock signal to the ADC121S625. If using WaveVision4 Data Capture Board and the PC an external source, remove the oscillator from running the WaveVision4 program. Y2. If using an oscillator at Y2, remove the signal source from J6. The presence of a 4. Connect a ribbon cable (order number second clock source could add noise to the WV4ADCIFCABLE) between J4 of the conversion process. ADC121S625B evaluation board and J3 of the WV4 board. 2. Connect a clean analog (non-switching) +5V power source to Power Connector J5. 5. Connect a clean analog (non-switching) +5V power source to Power Connector J5. 3. Short pins 1 & 2 of JP3 and turn on the power supply. 6. Short pins 1 & 2 of JP3 and turn on the power supply. See Section 4.5 for detailed Power 4. Dynamic differential signal sources centered Supply Information around ground should be connected across pins 1 & 3 of J2. Pin 2 of J2 is ground. If the 7. Connect a separate analog +5V power source to power connector J1 on the WV4 board and source has a 50Ω output impedance, install a turn on the power. 51 ohm resistor at R4. Otherwise, the signal level will be twice as large as expected. To 8. Connect a jumper cable between TP10 accurately evaluate the performance of the (+3.3V) of the WV4 board and TP5 (3P3V) of ADC121S625, the source must be better than the ADC121S625B board. 90dB THD. 9. Perform steps 4 & 5 or 6 & 7 of section 3.1 to 5. Short pins 1 & 2 and pins 3 & 4 of JP2 to drive the analog inputs. provide the bias voltage of VREF for the input 10. Perform step 8 of section 3.1 to select the to the ADC when driving the ADC from J2. reference voltage. 6. Differential DC sources or dynamic differential 11. Refer to section 5.0 on Software Operation signal sources centered at a DC bias point and Settings. should be connected across pins 1 & 3 of J3. Pin 2 of J3 is ground. 7. Remove the shorts across pins 1 & 2 and pins 3 & 4 of JP2 when driving the ADC input from J3. 8. Select the 2.5V shunt voltage reference as VREF by shorting pins 2 & 3 of JP1 or select VA as VREF by shorting pins 1 & 2 of JP1. If it is desirable to provide an external reference 4 http://www.national.com 4.0 Functional Description Table 1 describes the function of the various jumpers on the ADC121S625B evaluation board. The Evaluation Board schematic is shown in Figure 2. Jumper Pins 1 & 2 Pins 2 & 3 JP1 Select VA as the VREF Select 2.5V reg. as the VREF reference as VREF by shorting pins 2 & 3 of JP1 or select VA as VREF by shorting pins 1 & 2 of JP1. If it is desirable to provide an external reference voltage, the jumper must be removed from JP1 and pin 2 may be driven directly. If it is desirable to change the LM4040DIM3-2.5 to an LM4040 with a different voltage, carefully remove it and adjust the value of R3 to limit the current through the LM4040. 4.3 ADC Clock Circuit JP2 JP3 JP4 JP5 Short pins 1 & 2 and pins 3 & 4 to bias input pins at VREF Select 5P0V_REMOTE from J5 Select 5P0V from J1 (WV4S) Enable OSC (not required) Select on-board clock OSC Y2 Select clock OSC at BNC J6 Table 1 Jumper Functions 4.1 The Signal Input The input signal to be digitized should be applied across pins 1 & 3 of J2 or J3. For input signals centered around ground, J2 should be utilized. Pin 2 of J2 is ground. Resistor R4 is a terminating resistor for the input source. Since all sources do not have the same output impedance, R4 is not stuffed. However, it is recommended that it is stuffed by the end user with the appropriate value that matches the source. The DC biasing for inputs applied to J2 is supplied through JP2. Short pins 1 & 2 and 3 & 4 of JP2 to properly bias the input to VREF. If it is desired to digitize a differential DC voltage or a dynamic signal that is already properly biased for the ADC121S625, apply the signal to be digitized across pins 1 & 3 of J3. Pin 2 of J3 is ground. When applying the input at J3, all shorts on JP2 need to be removed. Dynamic input signals should be applied through a bandpass filter to eliminate the noise and harmonics commonly associated with signal sources. To accurately evaluate the performance of the ADC121S625, the source must be better than 90dB THD 4.2 ADC Reference Circuitry This evaluation board includes the option of selecting a fixed 2.5V shunt voltage reference or VA as the reference voltage. Select the 2.5V 5 The crystal-based oscillator provided on the evaluation board is selected by shorting pins 1 & 2 of JP5. It is best to remove any external signal generator from J6 when using this oscillator to reduce any unnecessary noise. This board will also accept a clock signal from an external source by connecting that source to BNC J6 and shorting pins 2 & 3 of JP5. The input applied at J6 is 50 ohm terminated by R14. The external clock signal must meet TTL input requirements. It is best to remove the oscillator at Y2 when using an external clock source to reduce any unnecessary noise. Regardless of the clock source selected by JP5, the clock signal is designed to be routed off the ADC121S625B evaluation board to National’s WV4 board. This assumes a “computer mode” operation of the evaluation board. For applications utilizing the evaluation board in manual mode, short pins 4 & 10 of J4 with a short jumper wire to provide the clock signal to the ADC121S625. 4.4 Digital Data Output The serial data output from this board may be monitored at J1 or J4. 4.5 Power Supply Connections When operating in “computer mode” with the WV4 Board, voltage 5P0V for VA and 3P3V for U3 must be supplied to the ADC121S625B evaluation board. For best performance from the ADC121S625, the 5P0V voltage for VA should be supplied by a separate power supply to J5. The 3P3V voltage may be pulled off the WV4 Board with a jumper wire at TP10 (WV4) and applied to TP5. When operating in “manual mode”, only voltage 5P0V needs to be applied to J5. The 5P0V voltage needs to be set between +4.5V and +5.5V and a shorting jumper must be placed across pins 1 & 2 of JP3. 5.0 Software Operation and Settings http://www.national.com The WaveVision4 software is included with the WV4 board and the latest version can be downloaded for free from National's web site at http://www.national.com/adc. To install this software, follow the procedure in the WaveVision4 Board User's Guide. Once the software is installed, run it and set it up as follows: 1. Connect the WV4 board to the host computer with a USB cable. 2. From the WaveVision main menu, go to Settings, then Board Settings and do the following: Select the following from the WaveVision4 main menu: • WaveVision 4.0 (USB) • # of Samples: 2K to 32K, as desired 3. Apply power as specified in Section 4.5, click on the "Test" button and await the firmware to download. 4. Click on the "Accept" button. 5. After the steps outlined in Section 3.2 are completed, click on ‘Acquire’ then ‘Samples’ from the Main Menu (you can also press the F1 shortcut key). If a dialog box opens, select ‘Discard’ or press the Escape key to start collecting new updated samples. A plot of the selected number of samples will be displayed. Make sure there is no clipping of data samples. The samples may be further analyzed by clicking on the magnifying glass icon, then clicking and dragging across a specific area of the plot for better data inspection. See the WaveVision4 Board User's Guide for details. To view an FFT of the data captured, click on the ‘FFT’ tab. This plot may be zoomed in on like the data plot. A display of dynamic performance parameters in the form of SINAD, SNR, THD, SFDR and ENOB will be displayed at the top right hand corner of the FFT plot. Acquired data may be saved to a file. Plots may also be exported as graphics. See the Data Capture Board User's Guide for details. 6 http://www.national.com VA TP4 VA 1 2 5P0V_REMOTE A GND J5 5P0V_REMOTE D3 1N4001 VA V IN_AC J2 VIN_AC 1 2 3 1 VA J3 VIN_DC 5P0V_REMOTE 1 VA V IN_DC 1.0uF 1.0uF C14 C6 1.0uF C2A C8 L2 100uH A GND V A SELECTION VA OUT CLK_IN J6 CLK 0.1uF C15 R12 5.1K 8 0.1uF C13 R11 51 2 51 R13 5.1K VA 5 6 7 8 OE C3 CLKSEND 1 2 C4 VA TP1 AGND OSC ENA BLE R6 0 DOUT SCLK CSB 3P3V VA R5 NS JP4 OSC ENABLE L1 100uH CLKSEND 0.1uF 1.0uF Y1 4.0MHz OSC 1 1.0uF C10 A GND CSB DOUT SCLK TP3 AGND OUT Y2 socket 1 3 NS GND -IN +IN VREF CLK SELECT R14 2K U1 ADC121S625CIMT C9 4 3 2 1 R1 U2 LM4040/SOT23 JP5 CLK SELECT OE 470pF 470pF C7 37 mil inch drills w ith 57 mil inch pads 100 mil inch spacing JP3 VA SELECTION TP7 AGND C2B 1.0uF 0.1uF 0.1uF C1 R2 5.1K Perforated Board A rea 3 5P0V 2 1 5P0V_REMOTE RED LED D1 R7 510 R4 NS C5 JP2 HEADER 2X2 VBIA S R3 5.1K 1 2 A GND 3 4 VREF 2 1 2 TP2 AGND 1 1 2 3 1 14 7 3 1 1 1 2 3 VDD GND 3P3V 1 5P5V 4 VDD GND 2 14 7 9 8 CLKSEND 10 13 14 A GND R9 NS 0.1uF 1.0uF TP6 AGND C12 3P3V 11 12 C11 SDA 5 6 DOUT 3 4 SCLK 1 2 CSB 3P3V 5P0V SCL WV 4S 3P3V R10 0 SCL WV 4 5P0V 12 13 3P3V 10 11 8 6 4 2 SDA J4 WV4 J1 WV4S 9 7 5 3 1 CLKSEND DOUT SCLK CSB A GND 7 VREF SELECT JP1 1 8 WP VCC 1 A0 2 A1 5 SCL 6 SDA A2 3P3V 3 GND 4 7 U3 24C02 RED LED D2 3P3V 3P3V 3P3V R8 200 TP5 3P3V 1 VA 6.0 Hardware Schematic Figure 2 ADC121S625B Evaluation Board Schematic http://www.national.com 7.0 Evaluation Board Specifications Board Size: Power Requirements Clock Frequency Range: Analog Input 3.0" x 3.0" (7.6 cm x 7.6 cm) Min: +4.5V, Max: +5.5V, 100mA 100 mA 800 kHz to 4.0 MHz 0V to 2VREF 8.0 ADC121S625B Evaluation Board Bill of Materials Item Qty Reference 1 2 3 4 5 6 7 8 9 10 11 12 7 4 2 2 2 1 1 1 1 1 1 1 C1,C4,C5,C6,C10,C11,C14 C2,C3,C12,C13 C8,C7 C15,C9 D2,D1 D3 JP1 JP2 JP3 JP4 JP5 J1 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 1 1 1 1 1 2 1 2 6 1 1 1 2 5 1 1 1 1 1 J2 J3 J4 J5 J6 L1,L2 R1 R3,R2 R4,R5,R9,R10,R15,R16 R6 R7 R8 R14,R11 TP1,TP2,TP3,TP6,TP7 TP4 TP5 U1 U2 U3 32 33 34 1 1 1 Y2B Y2B PCB 35 36 5 4 2-pin jumpers Rubber Feet 8 PCB Footprint sm/c_1206 sm/c_0805 sm/c_0805 sm/c_0805 sm/led_21 DAX2/DO41 header header header header header rt angle header header header header term_block BNC sm/l_1210 sm/r_0805 sm/r_0805 sm/r_0805 sm/r_0805 sm/r_0805 sm/r_0805 sm/r_0805 header header header MSOP8 sm/SOT23 EEPROM OSC OSC_socket Eval Board rev 1 Jumper Source Source Part # Value Digikey Digikey Digikey 445-1423-2-ND PCC1840TR-ND 399-1142-1-ND Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey 516-1440-1-ND 1N4003-TPMSTR-ND S1011E-36-ND S2041E-30-ND S1011E-36-ND S1011E-36-ND S1011E-36-ND S5803-21-ND Digikey Digikey Digikey Digikey Digikey Digikey S1011E-36-ND S1011E-36-ND S2041E-30-ND ED1609-ND ARF1177-ND 445-15435-1-ND P2.0KATR-ND 311-5.10KCRTR-ND Allied Digikey Adv Cir RHM0.0ATR-ND RHM510CTR-ND P200CTR-ND P51ACT-ND S1011E-36-ND S1011E-36-ND S1011E-36-ND ADC121S625CIMT LM4040DIM3-2.5TR AT24C02BN-10SU1.8-ND EC1145-4.000M A462-ND 121S725_r1 Digikey Digikey S9001-ND SJ5003-0-ND Digikey Digikey Digikey National Digikey Digikey 1.0uF 0.1uF 470pF NS RED LED IN4003 VREF SELECT HEADER 2X2 VA SELECTION OSC ENABLE CLK SELECT WV4S VIN_AC VIN_DC WV4 5P0V_REMOTE CLK 100uH 2K 5.1K NS 0 510 200 51 AGND VA 3P3V ADC121S625 2.5V REF 24C02 4.0MHz OSC SOCKET ADC121S725 SHUNT BUMP http://www.national.com 9.0 Test Points, Connectors, and Jumpers Test Points on the ADC121S625B Evaluation Board TP1: AGND Ground. Located at the bottom right area of the board. TP2: AGND Ground. Located at the center of the board. TP3: AGND Ground. Located at the top left area of the board. TP4: VA VA test point. Located at the center of the board. TP5: 3P3V 3.3V test point. Located at the middle right area of the board. TP6: AGND Ground. Located at the top right corner of the board. TP7: AGND Ground. Located in the middle right area of the board. Connectors on the ADC121S625B Evaluation Board J1: WV4S 14 pin dual row right angle male header: Connects to WV4S board. J2: VIN_AC Three pin male header: Differential AC input. J3: VIN_DC Three pin male header: Differential DC input. J4: WV4 14 pin dual row male header: Connects to WV4 board. J5: 5P0V_REMOTE Terminal Block: Power connector for 5P0V. J6: CLK_IN BNC Connector: External clock input. Selection Jumpers on the ADC121S625B Evaluation Board (Refer to Table 1 in Section 4.0 for configuration details) 9 JP1: VREF SELECT Selects reference source for VREF. JP2: VBIAS Provides DC bias for analog inputs. JP3: VA Selection Selects source of voltage for VA. JP4: OSC ENABLE Not required for OSC provided with evaluation board. JP5: CLK_SELECT Selects clock source (on-board oscillator or external source). http://www.national.com BY USING THIS PRODUCT, YOU ARE AGREEING TO BE BOUND BY THE TERMS AND CONDITIONS OF NATIONAL SEMICONDUCTOR'S END USER LICENSE AGREEMENT. DO NOT USE THIS PRODUCT UNTIL YOU HAVE READ AND AGREED TO THE TERMS AND CONDITIONS OF THAT AGREEMENT. IF YOU DO NOT AGREE WITH THEM, CONTACT THE VENDOR WITHIN TEN (10) DAYS OF RECEIPT FOR INSTRUCTIONS ON RETURN OF THE UNUSED PRODUCT FOR A REFUND OF THE PURCHASE PRICE PAID, IF ANY. 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Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に 輸入される評価用キット、ボードについては、次のところをご覧ください。 http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs: 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. SPACER SPACER SPACER SPACER SPACER 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. SPACER SPACER SPACER SPACER SPACER SPACER SPACER 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM. 7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated spacer IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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