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ADS1235EVM

ADS1235EVM

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

  • 描述:

    ADS1235 - 24 位 7.2k 采样率模数转换器 (ADC) 评估板

  • 数据手册
  • 价格&库存
ADS1235EVM 数据手册
User's Guide SBAU293A – March 2018 – Revised September 2018 ADS1261 and ADS1235 Evaluation Module ADS1261, ADS1235 Evaluation Module (ADS1261EVM Shown) The ADS1261EVM and ADS1235EVM are evaluation module kits providing hardware and software support for evaluation of the ADS1261, or ADS1235, delta-sigma analog-to-digital converter (ADC). The kit utilizes the TM4C1294NCPDT processor to communicate with the ADC via SPI and provide communication with a PC over a USB interface. The EVM kit also includes a USB micro cable and a downloadable software application that runs on a PC, allowing for register manipulation and data collection from the ADC. This document includes a detailed description of the hardware (HW), software setup and use, bill of materials, and schematic for the EVM. Throughout this document, the term EVM is synonymous with ADS1261EVM and ADS1235EVM, demonstration kit, and evaluation module. The term GUI is synonymous with Delta-Sigma ADC EvaluaTIon Software, core application, and EVM software. The use of Tiva™ is synonymous with the TM4C1294NCPDT microcontroller. Table 1. Related Documentation Device Literature Number ADS1261 SBAS760 ADS1235 SBAS824 SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 1 www.ti.com 1 2 3 4 5 Contents EVM Overview ............................................................................................................... 3 1.1 Description ........................................................................................................... 3 1.2 Requirements ....................................................................................................... 3 1.3 Software Reference ................................................................................................ 3 1.4 Supported Functionality ............................................................................................ 3 Quick Start .................................................................................................................... 4 2.1 Default Jumper and Switch Configuration ....................................................................... 4 2.2 Powering the EVM .................................................................................................. 4 2.3 Software Installation and Hardware Connection Procedure .................................................. 5 Hardware Reference ........................................................................................................ 6 3.1 Jumper and Switch Configuration Reference ................................................................... 6 3.2 Header, Connector, and Test Point Reference ................................................................. 7 Software Details ............................................................................................................ 11 4.1 Installing the Software ............................................................................................ 11 4.2 Connecting to the EVM Hardware .............................................................................. 13 4.3 Using the Software With the EVM .............................................................................. 13 EVM Bill of Materials, PCB Layouts, and Schematics................................................................. 16 5.1 Bill of Materials .................................................................................................... 16 5.2 PCB Layouts ....................................................................................................... 21 5.3 Schematic .......................................................................................................... 24 List of Figures 1 Default Configurations for ADS1261 and ADS1235 EVM .............................................................. 4 2 Input Terminal Blocks (ADS1261EVM Shown) .......................................................................... 7 3 Delta-Sigma Evaluation Engine Installation Instructions .............................................................. 11 4 Device Package Installation Instructions ................................................................................ 12 5 GUI View Before Connecting EVM Hardware .......................................................................... 13 6 GUI View After Connecting EVM Hardware ............................................................................ 13 7 Top Silkscreen .............................................................................................................. 21 8 Top Layer (Positive) 9 Ground Layer (Negative) .................................................................................................. 22 10 Power Layer (Negative) ................................................................................................... 22 11 Bottom Layer (Positive).................................................................................................... 23 12 Bottom Silkscreen .......................................................................................................... 23 13 ADS1261EVM Block Diagram Schematic 14 ADS1261EVM Analog Inputs Schematic................................................................................ 25 15 ADS1261EVM ADC Main Schematic .................................................................................... 26 16 ADS1261EVM Digital Header Schematic ............................................................................... 27 17 ADS1261EVM USB and Peripherals Schematic ....................................................................... 28 18 ADS1261EVM Processor Main Schematic ............................................................................. 29 19 ADS1261EVM USB Power Schematic .................................................................................. 30 20 ADS1261EVM External Power Schematic .............................................................................. 31 ....................................................................................................... .............................................................................. 21 24 Trademarks Tiva is a trademark of Texas Instruments, Incorporated. Microsoft, Windows are registered trademarks of Microsoft Corporation. All other trademarks are the property of their respective owners. 2 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Overview www.ti.com 1 EVM Overview 1.1 Description This user guide describes the operation and use of the ADS1261 and ADS1235 evaluation module. The EVM platform is intended for evaluating the ADS1261 or ADS1235 performance and functionality. 1.2 Requirements 1.2.1 Software Requirements PC with Microsoft® Windows® 7 or higher operating system. 1.2.2 Hardware Requirements PC with available USB 2.0 or greater connection. 1.2.2.1 Power Supply USB powered. 1.3 Software Reference For the core software documentation, see the Delta-Sigma ADC EvaluaTIon Software User Manual or navigate to the File -> About option from within the GUI, then click on the Software user guide icon. 1.4 1.4.1 Supported Functionality Hardware Functionality The EVM features the following hardware capabilities: • Onboard 5-V unipolar and ±2.5-V bipolar AVDD and AVSS supplies • Onboard 3.3-V DVDD supply • Digital header for external processor or controller configuration • Analog header and configurable input circuitry for direct sensor connections • Fault LED for STATUS or CRC error notification • Place holder for optional REF62xx external reference source 1.4.2 Software Functionality The EVM features the following software functions: • Device conversion control • Device software reset • Device power down • Register read and write • Conversion result readback • Self offset and system input calibration • Readback of STATUS and CRC data bytes(for error detection) SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 3 Quick Start 2 www.ti.com Quick Start This section provides a guide to quickly begin using the EVM. 2.1 Default Jumper and Switch Configuration The EVM is configured with the settings listed in Table 2 and illustrated in Figure 1. Table 2. Default Settings Jumper Position Function JP1 (Not Installed) Use onboard processor JP2 (Not Installed) USB-derived supplies ON JP3 (Not Installed) DVDD from USB power (1-2 connection via R94) JP4 (Not Installed) AVDD from USB power (1-2 connection via R95) JP5 (Not Installed) N/A Jumper Position Function S1 Right Unipolar analog supply (AVDD = 5 V, AVSS = 0 V) OPEN RIGHT OPEN OPEN Figure 1. Default Configurations for ADS1261 and ADS1235 EVM 2.2 Powering the EVM The EVM is powered through the USB interface with the PC. Follow the installation and connection procedure in Section 2.3 before connecting the EVM to the PC. Sections Section 2.2.1 and Section 2.2.2 provide additional details about the analog and digital power supply configurations of the ADC. 2.2.1 Analog Supply Configuration of the ADC The ADS1261 (or ADS1235) analog supply requires a 5-V source connected between the AVDD and AVSS pins. The EVM provides onboard 5-V, 2.5-V and –2.5-V supply rails to allow for both unipolar and bipolar supply polarities, respectively. The analog supply polarity can be selected by S1. 4 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Quick Start www.ti.com NOTE: When switching S1, the ADC may experience a temporary brown-out which causes the device configurations to be reset to the default power on configurations. TI recommends disconnecting the USB cable from the EVM, toggling the switch, and then reconnecting the USB cable to avoid any communication issues with the PC software. R33 may be used to measure the AVDD supply current, either by determining the voltage drop across this resistor or by removing the resistor and connecting a dc current meter between the "A+" and "A–" test points. 2.2.2 Digital Supply Configuration of the ADC The ADS1261 (or ADS1235) digital supply requires a 2.7- to 5.25-V source connected between DVDD and DGND. The EVM provides a (typical) 3.3-V onboard supply for the digital supply of the ADC. R38 may be used to measure the DVDD supply current, either by determining the voltage drop across this resistor or by removing the resistor and connecting a dc current meter between the "D+" and "D–" test points. 2.3 Software Installation and Hardware Connection Procedure Follow the steps below to use the EVM for the first time: 1. Download all required software from http://www.ti.com/tool/ads1261evm (for the ADS1261EVM) or http://www.ti.com/tool/ads1235evm (for the ADS1235EVM). 2. Install the GUI software (DELTASIGMAEVAL-GUI) on the PC. 3. Install the device package software on the PC. (ADS1261EVM-DVCPKG for the ADS1261EVM, or ADS1235EVM-DVCPKG for the ADS1235EVM.) 4. Ensure all jumpers and switches are configured in the default configuration per Table 2 and Figure 1. 5. Connect the EVM to the PC using the provided USB cable. 6. If prompted, install any required drivers. 7. Start the GUI application on your PC. The GUI should automatically detect the connected EVM. SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 5 Hardware Reference www.ti.com 3 Hardware Reference 3.1 Jumper and Switch Configuration Reference Table 3 provides all jumper and switch configuration settings for the EVM. Table 3. Jumper and Switch Options Jumper Position JP1 Operation of EVM with external digital signals JP2 JP3 JP4 JP5 Installed (ON) Hold Tiva processor (U9) in reset and disable level shifters to allow external digital signals Uninstalled (OFF) Normal operation with onboard Tiva processor (default) Power down USB power supplies Installed (ON) USB-derived power supplies disabled and powered down Uninstalled (OFF) USB-derived power supplies enabled and ON (default) Digital supply source 1–2 shorted Digital supply (U19) powered from USB power (default using R94 as the short) 2–3 shorted Digital supply (U19) powered from external supply source Open No digital system power provided 5-V supply source Installed (ON) 5-V supply powered from USB (default using R95 as the short) Uninstalled (OFF) No analog supply powering AVDD EXT_5V supply power down Installed (ON) External supply regulator (U18-not installed) disabled Uninstalled (OFF) External supply regulator (U18-not installed) enabled (default) Switch Position Description S1 (1) AVDD and AVSS supply polarity switch S2 S3 S4 (1) 6 Description Right (pin connections: 5–6, 2–3) Unipolar supply (AVDD = 5 V, AVSS = GND) (default) Left (pin connections: 5–4, 2–1) Bipolar supply (AVDD = 2.5 V, AVSS = –2.5 V) Tiva reset (U1 RST) button Closed (depressed) Tiva held in reset, level shifters (U6, U7, and U8) tri-stated Open (normally) Normal operation (default) Reset FAULT button Closed (depressed) Clears FAULT LED indicator and writes 0x00 to the STATUS register of the ADC Open (normally) Normal operation (default) BSL button for Device Firmware Update (DFU) mode Closed (depressed on RESET) Total Tiva FLASH erasure (on reset Tiva enumerates as a DFU device) Open (normally) Normal operation (default) Switch is DPDT. Pin 1 is identified with a dot on the PCB silkscreen. ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Hardware Reference www.ti.com 3.2 Header, Connector, and Test Point Reference This section provides the connection information and details for all of the connectors and test points utilized on the EVM. 3.2.1 Analog Input Terminal Blocks Analog input to the EVM can be connected at the terminal blocks located on the left side of the board (see Figure 2) to provide external analog signal input to the EVM for evaluation purposes. The functions for these terminal blocks are listed in Table 4. At no time should a voltage be applied that exceeds the absolute maximum ratings for the input of the ADS1261 or ADS1235. Pin 1 J1 Pin 2 Pin 1 Pin 2 Pin 3 Pin 4 J2 Pin 5 Pin 6 Pin 7 Pin 8 J3 Pin 1 Pin 2 J4 Pin 1 Pin 2 Figure 2. Input Terminal Blocks (ADS1261EVM Shown) SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated ADS1261 and ADS1235 Evaluation Module 7 Hardware Reference www.ti.com Table 4. Analog Input Terminal Blocks, J1–J4 Pin Function Test Point ADS1261 Input Pin ADS1235 Input Pin J1 (ADS1261EVM only) (1) 1 Analog input (2) A9 2 (2) A8 Analog input AIN9 – AIN8 – J2 1 Analog input (2) A7 AIN7 AIN5 2 Analog input (2) A6 AIN6 AIN4 3 Analog input (2) A5 AIN5 AIN3 4 Analog input (2) A4 AIN4 AIN2 5 Analog input (2) A3 AIN3 AIN1 6 Analog input (2) A2 AIN2 AIN0 7 Analog input (2) A1 AIN1 REFN0 8 Analog input (2) A0 AIN0 REFP0 A10 AINCOM – REFOUT – J3(ADS1261EVM only) (1) 1 Analog input (2) 2 Reference output – 1 GND – DGND DGND 2 AVSS (3) – AVSS AVSS J4 (1) (2) (3) J1 and J3 are not populated on the ADS1235EVM. Analog inputs are pinned out to terminal blocks through RC filters. Refer to Figure 14 for additional connection details. The AVSS voltage is set by the S1 switch position. 3.2.2 External Clock By default, a clock is supplied by the internal oscillator of the ADC when the CLKIN pin is pulled low. However, the EVM also provides the capability to connect an external clock directly to the ADC using the J6 connector (see Figure 16). When connecting to J6, a direct connection can be made between pins 42 (CLKIN) and 40 (GND). A typical clock source of 7.3728 MHz (or 10.24 MHz for 40 kSPS mode, on the ADS1261) will track with all timing shown in the respective product datasheet (refer to Table 1). NOTE: The CLKIN pin connects to the Tiva microcontroller. The microcontroller holds the CLKIN pin low in order to enable the internal oscillator of the ADC. Before connecting an external clock, disable the GPIO output on this pin by sending the "HOLDCLOCK 0" command, described in Table 7. 8 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Hardware Reference www.ti.com 3.2.3 Digital Interface Header Table 5 lists the functions and pin numbers for all signals used on the J6 digital interface header. The J6 header allows for the connection to a logic analyzer or when the EVM is used in a stand-alone configuration for connections to an external microprocessor or microcontroller. If controlling the ADS1261 with an external processor, power down the onboard TM4C1294NCPDT by placing a jumper on JP1. This configuration can be accomplished by soldering a wire between the JP1 terminals or by installing a 2-pin, 0.1-in spaced header that has the pins shorted with a shorting block (see Table 3). Table 5. Digital Interface, J6 Function ADC Side Signal Name Pin Number (2) Signal Name , Tiva Connection (3) External voltage input GND 56 55 EXT_5V Bank3 level-shifter voltage DVDD 54 53 LVDD1 GPIO for ADC FAULT_LED 52 51 PD7 EXT_CLK 42 41 PD3 (Unused) Bank2 level-shifter voltage DVDD 36 35 LVDD2 ADC GPIO ADC_nPWDN 34 33 PA0 SPI0 ADC_nDRDY 32 31 PA1 ADC_SCLK 30 29 PA2 (SSI0CLK) ADC_nCS 28 27 PA3 ADC_MOSI (DIN) 26 25 PA4 (SSI0XDAT0) ADC_MISO (DOUT) 24 23 PA5 (SSI0XDAT1) ADC_START 22 21 PA6 ADC_nRESET 20 19 PA7 DVDD 18 17 LVDD3 (Unused) ADC GPIOs Bank1 level-shifter voltage (1) (2) (3) 3.2.4 Processor Side Pin Number (1) Even-numbered pins not included in this list are connected to GND. Odd-numbered pins not included are connected to the Tiva microcontroller (after passing through level shifters) but the functionality is not used for this EVM. For connection details, see Figure 16. Signals connected to the Tiva microcontroller are named according to their respective processor pin connections. For connection details, see Figure 16. Test Points The test points listed in Table 6 may be used to probe onboard voltage supplies and signals. Table 6. Useful Test Points Function Signal Name Restrictions ADC side Analog input (ADS1261EVM: AIN9) A9 Probe only Analog input (ADS1261EVM: AIN8) A8 Probe only Analog input (ADS1261EVM: AIN7, ADS1235EVM: AIN5) A7 Probe only Analog input (ADS1261EVM: AIN6, ADS1235EVM: AIN4) A6 Probe only Analog input (ADS1261EVM: AIN5, ADS1235EVM: AIN3) A5 Probe only Analog input (ADS1261EVM: AIN4, ADS1235EVM: AIN2) A4 Probe only Analog input (ADS1261EVM: AIN3, ADS1235EVM: AIN1) A3 Probe only Analog input (ADS1261EVM: AIN2, ADS1235EVM: AIN0) A2 Probe only Analog input (ADS1261EVM: AIN1, ADS1235EVM: REFN0) A1 Probe only Analog input (ADS1261EVM: AIN0, ADS1235EVM, REFP0) A0 Probe only Analog input (ADS1261EVM: AINCOM) A10 Probe only SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated ADS1261 and ADS1235 Evaluation Module 9 Hardware Reference www.ti.com Table 6. Useful Test Points (continued) Function Signal Name Restrictions External bridge supply (EXC+ positive supply) AVDD/EXC+ Remove R6 before connecting to an external supply, and consider the input common mode voltage of the ADC when setting EXC+ voltage AVDD For external supply ground reference only. Do not apply a voltage to this test point. External bridge supply (EXC– negative supply) AVSS/EXC– Remove R25 before connecting to external supply, and consider the common mode voltage of the ADC when setting EXC– voltage REF62xx, U2 supply U2–1 (REF) Remove R27 before connecting to external supply. External supply source must be referenced to AVSS. Do not violate absolute maximum ratings of U2. AVDD current measurement (source) AVDD (A+) Probe only AVDD current measurement (sink) U3–4 (A–) Probe only DVDD current measurement (source) DVDD (D+) Probe only DVDD current measurement (sink) U3–17 (D–) Probe only External bridge supply (AVSS "ground" reference) 5-V supply +5V Probe only 3.3-V supply +3.3V Probe only 2.5-V supply +2.5V Probe only Ground GND Probe only –2.5-V supply –2.5V Probe only Processor Side USB "VBUS" supply (source) USB_VBUS (VBUS+) Probe only USB "VBUS" supply (sink) USB_VBUSP (VBUS–) Probe only 5.5-V, U15 output USB_BOOST (+5.5V) Probe only 1.8-V, U17 output +1.8V Probe only 5.0-V, U16 output +5V Probe only Ground GND Probe only 3.3-V, U19 output +3.3V Probe only HVBoost Probe only High-voltage linear regulator, U24 (not populated) output +HVDD Probe only Inverting dc/dc converter, U25 (not populated) output HVInvert Probe only –HVSS Probe only Step-up dc/dc converter, U23 (not populated) output Negative high-voltage linear regulator, U26 (not populated) output 10 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Software Details www.ti.com 4 Software Details 4.1 Installing the Software 4.1.1 Delta-Sigma ADC EvaluaTIon Software Download the Delta-Sigma ADC EvaluaTIon Software installer from the DELTASIGMAEVAL-GUI page and save to a known folder. Run the installer and follow the on-screen prompts. Note that future software versions may show slightly different screens. Figure 3. Delta-Sigma Evaluation Engine Installation Instructions SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 11 Software Details 4.1.2 www.ti.com ADS1261 and ADS1235 EVM Device Package Download the ADS1261 Device Package installer from the ADS1261EVM tool page for the ADS1261EVM (or the ADS1235 Device Package installer from the ADS1235EVM tool page for the ADS1235EVM) and save it to a known folder. Run the appropriate device package installer and follow the on-screen prompts. Note that future software versions may show slightly different screens. STEP 1 STEP 2 STEP 3 STEP 4 Figure 4. Device Package Installation Instructions 12 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Software Details www.ti.com 4.2 Connecting to the EVM Hardware After the Delta-Sigma ADC EvaluaTIon Software and the ADS1261 Device Package (or ADS1235 Device Package) are installed, connect the hardware with the provided USB micro cable, and start the DeltaSigma ADC EvaluaTIon Software. The GUI automatically detects the connected hardware and displays the device register map under the Device tab, as shown in Figure 5 and Figure 6. Figure 5. GUI View Before Connecting EVM Hardware 4.3 Figure 6. GUI View After Connecting EVM Hardware Using the Software With the EVM The Delta-Sigma ADC EvaluaTIon Software User Manual provides an overview of the GUI, an explanation of how to modify device register settings, how to collect and analyze data, and control device operations with scripts. For a list of commands that are supported on the ADS1261 and ADS1235 EVM, see the ADS1261 and ADS1235 EVM Commands section. 4.3.1 ADS1261 and ADS1235 EVM Commands A list of all the EVM commands are given in Table 7. These commands are available for use within the Scripts and Console tabs of the Delta-Sigma ADC EvaluaTIon software. All of these commands are implemented in the Tiva firmware; however, many of these commands only trigger SPI commands to the ADC, as defined in the device data sheet. In general, most device commands that communicate with the ADC via SPI will require the /PWDN pin to be set high, prior to issuing the command. When the /PWDN pin is low, the device is in hardware powerdown mode and all device functions are disabled (only the internal LDO remains powered). Returning the /PWDN pin high resumes normal ADC operations and preserves the registers settings. The ADC may also be placed into a software power-down mode by setting the PWDN bit high, in the MODE3 register. In this mode the internal LDO, internal reference, and serial interface remain enabled. SPI commands can be sent while the device is in software power-down mode; however, these actions may or may not take effect in this mode. Note that some of the commands shown in Table 7 may wake the ADC prior to taking effect, particularly for EVM commands that are utilized by the GUI. Refer to the "Wakes Device?" column in Table 7 to determine if a command implements this behavior. SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 13 Software Details www.ti.com Table 7. Firmware Commands Command Command Arguments Wakes Device? Description GUI Commands ID COMMANDLIST Returns EVM ID string: " ", where "" is either "ADS1261" or "ADS1235", and " " indicates when the EVM firmware was complied. N Returns a list of all commands supported by the EVM firmware. N COLLECT Collects a number of ADC samples equal to "", where "" is an unsigned integer. During this operation, all other commands will be ignored and the BUSY LED will blink until all samples have been collected. READSINGLE This command is used by the GUI. It provides the same function as RREG, but wakes the device from power down and returns to previous power-down mode after completion. Y (1) WRITESINGLE This command is used by the GUI. It provides the same function as WREG, but wakes the device from power down and returns to previous power-down mode after completion. Y (1) This command is used by the GUI to read the values of all device registers. Y (1) REGMAP Y (1) ADC SPI Commands NOP Issues the NOP device command to the ADC (via SPI). N N (2) RESET Issues the RESET device command to the ADC (via SPI). START Sets the START pin low and issues the START device command to the ADC (via SPI). N STOP Sets the START pin low and issues the STOP device command to the ADC (via SPI). N Starts a single conversion, waits for /DRDY to go low, and prints the conversion result to the console. N SYOCAL Issues the system-offset calibration device command to the ADC (via SPI). N SYGCAL Issues the system-gain calibration device command to the ADC (via SPI). N SFOCAL Issues the self-offset calibration device command to the ADC (via SPI). N N RDATA RREG Issues a read register device command to the ADC (via SPI), where "" is the starting register address in hexadecimal (without the "0x" prefix or "h" postfix). WREG Issues a write register device command to the ADC (via SPI), where "" is the starting register address in hex, and "" is the value to write to the register in hex (without the "0x" prefix or "h" postfix). N LOCK Sends the lock register device command to the ADC (via SPI). While in this mode, all write register commands will be ignored until the device is unlocked. N UNLOCK Sends the unlock register device command to the ADC (via SPI). This command unlocks the device register to allow write commands to take effect. N Hardware Control Commands This command controls the Tiva pin connected to the ADC's "CLKIN" pin to hold it low (to use the ADC's internal oscillator) or to release control of CLKIN and allow for external clocks to be applied to J6. HOLDCLOCK • "HOLDCLOCK 1" enables the TIVA's GPIO output and pulls CLKIN low. • "HOLDCLOCK 0" disables the GPIO output and reconfigures the TIVA GPIO pin to a high-impedance input. N See Section 3.2.2 for additional hardware information. HOLDPWDN HWRESET HOLDSTART This command controls the state of the /PWDN GPIO pin. An argument of "1" sets the /PWDN pin high, while a "0" argument sets the /PWDN pin low. · (3) This command toggles the /RESET GPIO pin. N (2) This command controls the state of the START GPIO pin. An argument of "1" sets the START pin high, while a "0" argument sets the START pin low. N Additional Firmware Commands (1) (2) (3) 14 CLEAR Clears the software fault flag, writes "0x00" to the STATS register (to clear the CRC_ERR and RESET bits), and turns off the FAULT LED. NOTE: Pressing S3 will perform the same action as the CLEAR command. N STATUS Reads the STATUS register (to check for any new fault conditions) and prints (to the console) a description of each fault type that has occurred since last clearing the software fault flag (with S3 or the CLEAR command). N CRC Computes the CRC-n of the data bytes given in "" through "", where "" is the number of bytes to be used in the CRC-n calculation. If the number of data bytes provided is greater than "", the extra data bytes will be ignored. N DONTCARE Sets the "Don't care" byte value that is used for all SPI commands that include a "Don't care" byte. Changing the value of this byte has the effect of modifying the resulting CRC byte that is used with CRCmode. N Returns device to previous state after completion. Resetting will wake the device from software-power down mode. Setting the /PDWN pin high exits hardware power-down mode; however, the previous software power-down mode remains unchanged. ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Software Details www.ti.com Table 7. Firmware Commands (continued) Command Command Arguments SPISEND ... Wakes Device? Description Sends a user-specified SPI command sequence to the ADC. /CS remains low until all bytes have been sent. After issuing this command the firmware will read the STATUS register to check for an CRC errors. This command allows for testing of the CRC command validation of the ADC, for example, since it allows the user to provide invalid CRC bytes with the various SPI commands. SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated N 15 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com 5 EVM Bill of Materials, PCB Layouts, and Schematics 5.1 Bill of Materials The bill of materials (BOM) quantities are shown for the ADS1261EVM. For BOM differences between the ADS1261EVM and ADS1235EVM, such as components not populated or substituted on the ADS1235EVM, a footnote is shown next to the affected component designator in Table 8 to indicate the difference. NOTE: EVM populated parts may be substituted with alternate components with similar characteristics. All components (listed or substituted)are compliant with the European Union Restriction on Use of Hazardous Substances (RoHS) directive. For more information about TI's position on RoHS compliance, see http://www.ti.com/support-quality/quality-reliability.html. Table 8. EVM Bill of Materials Designator Qty !PCB1 1 Part Number Manufacturer PA044 C1, C3, C4, C6, C7, C9, C10, C12, C15, C17 10 1000pF CAP, CERM, 1000 pF, 50 V, ±10%, C0G/NP0, 0603 Any 0603 06035A102KAT2A AVX C2, C5, C8, C11, C16, C18 6 0.01uF CAP, CERM, 0.01 uF, 25 V, ±5%, C0G/NP0, 0603 0603 CL10C103JA8NNNC Samsung ElectroMechanics C13, C35, C36 3 C14 1 2.2uF CAP, CERM, 2.2 uF, 10 V, ±10%, X7R, 0603 0603 LMK107B7225KA-T Taiyo Yuden 220pF CAP, CERM, 220 pF, 50 V, ±5%, C0G/NP0, 0603 0603 06035A221JAT2A AVX 27 0.1uF CAP, CERM, 0.1 uF,50 V, ±5%, X7R, 0603 0603 C0603C104J5RACTU Kemet C28 1 4700pF CAP, CERM, 4700 pF, 100 V, ±5%, C0G/NP0, 0603 0603 C0603C472J1GAC7867 Kemet C29 1 10uF CAP, CERM, 10 uF, 10 V, ±10%, X7R, 0805 0805 CL21B106KPQNFNE Samsung ElectroMechanics C32, C34 2 4.7uF CAP, CERM, 4.7 uF, 25 V, ±10%, X7R, 0805 0805 C2012X7R1E475K125AB TDK C23, C26, C30, C33, C58, C74, C75, C76, C79, C80 10 1uF CAP, CERM, 1 uF, 50 V, ±10%, X7R, 0603 0603 UMK107AB7105KA-T Taiyo Yuden C45, C46 2 12pF CAP, CERM, 12 pF, 50 V, ±5%, C0G/NP0, 0603 0603 C0603C120J5GACTU Kemet C47, C57 2 2.2uF CAP, CERM, 2.2 uF, 35 V, ±10%, X5R, 0603 0603 GRM188R6YA225KA12D Murata C55, C56 2 6.8pF CAP, CERM, 6.8 pF, 50 V, ±4%, C0G/NP0, 0603 0603 06035A6R8CAT2A AVX C68 1 4.7uF CAP, CERM, 4.7 uF, 50 V, ±10%, X7R, 1206 1206 UMK316AB7475KL-T Taiyo Yuden C69 1 100pF CAP, CERM, 100 pF, 50 V, ±5%, C0G/NP0, 0603 0603 C0603C101J5GACTU Kemet C70 1 22uF CAP, CERM, 22 uF, 16 V, ±10%, X7R, 1210 1210 GRM32ER71C226KE18L Murata C71 1 10uF CAP, CERM, 10 uF, 35 V, ±10%, X7R, 1206 1206 GMK316AB7106KL Taiyo Yuden C73 1 47uF CAP, CERM, 47 uF, 10 V, ±20%, X5R, 1206 1206 LMK316BJ476ML-T Taiyo Yuden C77, C81 2 1000pF CAP, CERM, 1000 pF, 100 V, ±5%, X7R, 0603 0603 06031C102JAT2A AVX D1 1 Orange LED, Orange, SMD LED_0603 LTST-C191KFKT Lite-On C22, C38, C49, C59, C67, 16 C24, C39, C50, C60, C72, C25, C40, C51, C61, C78 C27, C43, C52, C62, C31, C44, C53, C63, C37, C48, C54, C65, Value Description Package Reference Printed Circuit Board ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Table 8. EVM Bill of Materials (continued) Designator Qty Value Description Package Reference Part Number Manufacturer D2, D3, D5 3 Green LED, Green, SMD LED_0603 LTST-C191TGKT Lite-On D4 1 Red LED, Red, SMD LED_0603 LTST-C191KRKT Lite-On H1, H2, H3, H4 4 Bumpon, Cylindrical, 0.312 X 0.200, Black Black Bumpon SJ61A1 3M J1 (1), J3 (1), J4, J5 4 Terminal Block, 3.5mm Pitch, 2x1, TH 7.0x8.2x6.5mm ED555/2DS On-Shore Technology J2 1 Terminal Block, 3.5mm, 8-Pos, TH Terminal Block, 3.5mm, 8-Pos, TH ED555/8DS On-Shore Technology J8 1 Connector, Receptacle, Micro-USB Type B, R/A, Bottom Mount SMT 7.5x2.45x5mm 473460001 Molex L1 1 1uH Inductor, Wirewound, Ferrite, 1 uH, 2.05 A, 0.054 ohm, SMD 1210 LQH32PH1R0NN0L Murata R1, R2, R3, R4, R5, R7, R10, R15, R18, R24, R26, R63, R72, R74 14 100 RES, 100, 1%, 0.1 W, 0603 0603 RC0603FR-07100RL Yageo America R6, R25 2 0 RES, 0, 5%, 0.25 W, 1206 1206 RC1206JR-070RL R9, R12, R14, R17, R19, R23, R49, R52, R65, R87, R90, R94, R95 13 0 RES, 0, 5%, 0.1 W, 0603 0603 RC0603JR-070RL Yageo America R21, R22, R34, R35, R36, R37, R48, R57, R58, R84 10 100k RES, 100 k, 1%, 0.1 W, 0603 0603 RC0603FR-07100KL Yageo America R33, R38, R82 3 0.1 RES, 0.1, 1%, 0.1 W, 0603 0603 ERJ-L03KF10CV Panasonic R39, R40, R41, R42, R43, R44, R45, R46, R47 9 47 RES, 47, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060347R0JNEA Vishay-Dale R50 1 1.69k RES, 1.69 k, 1%, 0.1 W, 0603 0603 RC0603FR-071K69L Yageo America R53 1 604k RES, 604 k, 0.5%, 0.1 W, 0603 0603 RT0603DRE07604KL Yageo America R54 1 549k RES, 549 k, 1%, 0.1 W, 0603 0603 RC0603FR-07549KL Yageo America R55 1 511k RES, 511 k, 0.5%, 0.1 W, 0603 0603 RT0603DRE07511KL Yageo America R56 1 536k RES, 536 k, 1%, 0.1 W, 0603 0603 RC0603FR-07536KL Yageo America R60, R67, R70, R71, R73 5 10.0k RES, 10.0 k, 5%, 0.1 W, 0603 0603 RC0603JR-0710KL Yageo America R61 1 1.0Meg RES, 1.0 M, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06031M00JNEA Vishay-Dale R62 1 51 RES, 51, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060351R0JNEA Vishay-Dale R64 1 2.00k RES, 2.00 k, 1%, 0.1 W, 0603 0603 RC0603FR-072KL Yageo America R66 1 4.87k RES, 4.87 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06034K87FKEA Vishay-Dale R68, R77, R93 3 1.00k RES, 1.00 k, 5%, 0.1 W, 0603 0603 RC0603JR-071KL Yageo America R69 1 8.06k RES, 8.06 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06038K06FKEA Vishay-Dale R78, R79 2 2.94k RES, 2.94 k, 1%, 0.1 W, 0603 0603 RC0603FR-072K94L Yageo America R83 1 768k RES, 768 k, 1%, 0.1 W, 0603 0603 RC0603FR-07768KL Yageo America R85 1 20.0k RES, 20.0 k, 1%, 0.1 W, 0603 0603 RC0603FR-0720KL Yageo America R86 1 215k RES, 215 k, 1%, 0.1 W, 0603 0603 RC0603FR-07215KL Yageo America S1 1 SLIDE SWITCH DPDT .1A, SMT SWITCH, 5.4x2.5x3.9mm CAS-220TA Copal Electronics (1) Component is not populated on the ADS1235EVM. SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 17 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Table 8. EVM Bill of Materials (continued) Designator Qty Description Package Reference Part Number Manufacturer S2, S3, S4 3 Switch, Tactile, SPST-NO, 0.05A, 12V, SMT Switch, 4.4x2x2.9 mm TL1015AF160QG E-Switch U1 1 Dual, 5A, High-Speed Low-Side Power MOSFET Driver, D0008A (SOIC-8) D0008A UCC27524DR Texas Instruments U3 (2) 1 6- and 11-Channel, 40-kSPS, 24-Bit, Delta-Sigma ADC with PGA RHB0032E and Voltage Reference, RHB0032E (VQFN-32) ADS1261IRHBR Texas Instruments U4 1 DCK0005A SN74LVC1G06DCKT Texas Instruments U5 1 Low-Noise Positive- and Negative-Output Charge Pump With Integrated LDO, DSS0012B (WSON-12) DSS0012B LM27762DSSR Texas Instruments U6, U7 2 8-Bit Bidirectional Voltage-Level Shifter For Open-Drain And Push-Pull Application, RGY0020A (VQFN-20) RGY0020A TXS0108ERGYR Texas Instruments U9 1 Tiva C Series Microcontroller, 1024 KB Flash, 256 KB SRAM, 12 Bit, 20 Channels, -40 to 85 degC, 128-Pin TQFP (PDT), Green (RoHS & no Sb/Br), Tape and Reel PDT0128A TM4C1294NCPDTI3R Texas Instruments U10 1 Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver, QFN-32 5x5 QFN-32 USB3320C-EZK Microchip U11 1 High-Speed USB 2.0 (480 Mbps) 1:2 Multiplexer / Demultiplexer Switch with Single Enable, 6 ohm RON, 2.5 to 3.3V, -40 to 85 degC, 10-Pin UQFN (RSE), Green (RoHS & no Sb/Br) RSE0010A TS3USB221ERSER Texas Instruments U12 1 USB ESD Solution with Power Clamp, 4 Channels, -40 to +85 degC, 6-pin SON (DRY), Green (RoHS & no Sb/Br) DRY0006A TPD4S012DRYR Texas Instruments U13 1 Triple Inverter Buffer/Driver with Open-Drain Output, DCU0008A, SMALL T&R DCU0008A SN74LVC3G06DCUT Texas Instruments U15 1 3.5MHz, 1.5A, 92% Efficient Boost Converter with Adjustable Input Current Limit, DSG0008A (WSON-8) DSG0008A TPS61252DSGR Texas Instruments U16 1 36-V, 1-A, 4.17-uVRMS, RF LDO Voltage Regulator, RGW0020A RGW0020A (VQFN-20) TPS7A4700RGWR Texas Instruments U17 1 Single Output High PSRR LDO, 150 mA, Fixed 1.8 V Output, 2.5 to 6.5 V Input, with Low IQ, 5-pin SC70 (DCK), -40 to 85 degC, Green (RoHS & no Sb/Br) DCK0005A TPS71718DCKR Texas Instruments U18 1 Voltage Supervisor with Active-Low, Open Drain Reset, 1 Supply Monitored, -40 to 125 degC, 3-pin SOT-23 (DBZ), Green (RoHS & no Sb/Br) DBZ0003A TLV803MDBZR Texas Instruments U19 1 Single Output LDO, 1A, Adj. (1.2 to 5.0V), Reverse Current Protection, DRV0006A (WSON-6) DRV0006A TPS73733DRVR Texas Instruments Y1 1 Crystal, 25 MHz, 18 pF, SMD ABM3 ABM3-25.000MHZ-D2Y-T Abracon Corporation Y2 1 CRYSTAL, 32.768KHz, 7PF, SMD 1.5x1.4x6.7mm SSPT7F-7PF20-R Seiko Instruments C19 0 22uF CAP, CERM, 22 uF, 10 V, ±10%, X7R, 1206 1206 LMK316AB7226KL-TR Taiyo Yuden C20 0 2.2uF CAP, CERM, 2.2 uF, 10 V, ±10%, X7R, 0603 0603 GRM188R71A225KE15D Murata C21 0 1uF CAP, CERM, 1 uF, 50 V, ±10%, X7R, 0603 0603 UMK107AB7105KA-T Taiyo Yuden C41, C42, C64, C66, C83, C92, C94, C102, C105 0 0.1uF CAP, CERM, 0.1 uF, 25 V, ±5%, X7R, 0603 0603 06033C104JAT2A AVX C82, C84, C86, C89, C90, C91, C96, C100, C101 0 10uF CAP, CERM, 10 uF, 35 V, ±10%, X7R, 1206 1206 GMK316AB7106KL Taiyo Yuden (2) 18 Value For the ADS1235EVM, U3 is replaced with the ADS1235IRHBR. ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Table 8. EVM Bill of Materials (continued) Designator Qty Value Description Package Reference Part Number Manufacturer C85, C88, C93, C97, C103 0 0.01uF CAP, CERM, 0.01 uF, 25 V, ±10%, X7R, 0603 0603 GRM188R71E103KA01D Murata C87 0 1uF CAP, CERM, 1 uF, 25 V, ±10%, X7R, 0603 0603 GRM188R71E105KA12D Murata C98 0 4700pF CAP, CERM, 4700 pF, 100 V, ±10%, X7R, 0603 0603 06031C472KAT2A AVX C99 0 10pF CAP, CERM, 10 pF, 50 V, ±5%, C0G/NP0, 0603 0603 06035A100JAT2A AVX D6 0 12V Diode, TVS, Uni, 12 V, 19.9 Vc, SMB SMB SMBJ12A-13-F Diodes Inc. D7 0 Green LED, Green, SMD LED_0603 LTST-C191TGKT Lite-On D8 0 20V Diode, Schottky, 20 V, 1 A, SOD-123F SOD-123F PMEG2010AEH,115 Nexperia D9 0 20V Diode, Schottky, 20 V, 1.1 A, DO-219AB DO-219AB SL02-GS08 Vishay-Semiconductor F1 0 Fuse, 2 A, 125VAC/VDC, SMD SMD, 2-Leads, Body 9.73x5.03mm 0154002.DRT Littelfuse FID1, FID2, FID3, FID4, FID5, FID6 0 Fiducial mark. There is nothing to buy or mount. N/A N/A N/A H5 0 CABLE USB-A TO MICRO USB-B 1M Used in PnP output and some BOM reports 102-1092-BL-00100 CNC Tech J6 0 Header, 2.54 mm, 28x2, Gold, TH Header, 2.54 mm, 28x2, TH TSW-128-07-S-D Samtec J7 0 Header, 100mil, 7x1, Gold, TH 7x1 Header TSW-107-07-G-S Samtec J9 0 Terminal Block, 3.5mm Pitch, 2x1, TH 7.0x8.2x6.5mm ED555/2DS On-Shore Technology J10 0 Connector, DC Jack 2.1X5.5 mm, TH POWER JACK, 14.4x11x9mm PJ-102A CUI Inc. JP1, JP2, JP5 0 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec JP3, JP4 0 Header, 100mil, 3x1, Gold, SMT Samtec_TSM-103-01-X-SV TSM-103-01-L-SV Samtec L2 0 3.3uH Inductor, Shielded Drum Core, Ferrite, 3.3 uH, 1.5 A, 0.033 ohm, SMD CDPH4D19F CDPH4D19FNP-3R3MC Sumida L3 0 10uH Inductor, Shielded Drum Core, Ferrite, 10 uH, 1.2 A, 0.124 ohm, SMD CDRH5D18 CDRH5D18NP-100NC Sumida R8, R59 0 100k RES, 100 k, 1%, 0.1 W, 0603 0603 RC0603FR-07100KL Yageo America R11, R16 0 0 RES, 0, 5%, 0.1 W, 0603 0603 ERJ-3GEY0R00V Panasonic R13, R20, R76 0 100 RES, 100, 1%, 0.1 W, 0603 0603 RC0603FR-07100RL Yageo America R27, R28, R29, R31, R32, R51 0 0 RES, 0, 5%, 0.1 W, 0603 0603 RC0603JR-070RL Yageo America R30 0 0.005 RES, 0.005, 1%, 0.25 W, 1206 1206 WSL12065L000FEA Vishay-Dale R75, R80, R81, R97, R109 0 10.0k RES, 10.0 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060310K0FKEA Vishay-Dale R88, R89, R91, R92 0 0 RES, 0, 5%, 0.1 W, AEC-Q200 Grade 0, 0603 CRCW06030000Z0EA Vishay-Dale R96 0 1.00k RES, 1.00 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06031K00FKEA Vishay-Dale R98 0 9.31k RES, 9.31 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06039K31FKEA Vishay-Dale R99 0 3.01k RES, 3.01 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06033K01FKEA Vishay-Dale R100 0 158k RES, 158 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603158KFKEA Vishay-Dale R101 0 453k RES, 453 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603453KFKEA Vishay-Dale R102 0 15.0k RES, 15.0 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060315K0FKEA Vishay-Dale R103 0 51.1k RES, 51.1 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060351K1FKEA Vishay-Dale SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 19 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Table 8. EVM Bill of Materials (continued) Designator Qty Value Description Package Reference Part Number Manufacturer R104 0 49.9k RES, 49.9 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060349K9FKEA Vishay-Dale R105 0 1.30Meg RES, 1.30 M, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW06031M30FKEA Vishay-Dale R106 0 100k RES, 100 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603100KFKEA Vishay-Dale R107 0 93.1k RES, 93.1 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060393K1FKEA Vishay-Dale R108 0 121k RES, 121 k, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW0603121KFKEA Vishay-Dale R110 0 10.0 RES, 10.0, 1%, 0.1 W, AEC-Q200 Grade 0, 0603 0603 CRCW060310R0FKEA Vishay-Dale S5 0 Switch, Tactile, SPST-NO, 0.05A, 12V, SMT Switch, 4.4x2x2.9 mm TL1015AF160QG E-Switch TP7, TP10, TP12, TP15, TP32, TP33, TP34 0 Terminal, Turret, TH, Double Keystone1573-2 1573-2 Keystone U2 0 High-Precision Voltage Reference with Integrated HighBandwidth Buffer, DGK0008A (VSSOP-8) DGK0008A REF6225IDGKR Texas Instruments U8 0 8-Bit Bidirectional Voltage-Level Shifter For Open-Drain And Push-Pull Application, RGY0020A (VQFN-20) RGY0020A TXS0108ERGYR Texas Instruments U14 0 256K I2C™ CMOS Serial EEPROM, TSSOP-8 TSSOP-8 24AA256-I/ST Microchip U20 0 Single Output Fast Transient Response LDO, 1.5 A, Adjustable 1.21 to 20 V Output, 2.1 to 20 V Input, 6-pin SOT-223 (DCQ), -40 to 125 degC, Green (RoHS & no Sb/Br) DCQ0006A TL1963ADCQR Texas Instruments U21 0 3-Pin Supply Voltage Supervisors for Automotive, DBV0003A (SOT-23-3) DBV0003A TPS3809I50QDBVRQ1 Texas Instruments U22 0 Single Inverter Buffer/Driver With Open-Drain Output, DCK0005A, SMALL T&R DCK0005A SN74LVC1G06DCKT Texas Instruments U23 0 Step-Up DC-DC Converter with Forced PWM Mode, 2.3 to 6 V, -40 to 105 degC, 8-pin SOP (PW8), Green (RoHS & no Sb/Br) PW0008A TPS61085TPWR Texas Instruments U24 0 Single Output High PSRR LDO, 150 mA, Adjustable 1.2 to 33 V Output, 3 to 36 V Input, with Ultra-Low Noise, 8-pin MSOP (DGN), -40 to 125 degC, Green (RoHS & no Sb/Br) DGN0008D TPS7A4901DGNR Texas Instruments U25 0 Inverting Buck-Boost Adjustable Converter with 2.7 to 5.5 V Input and -15 to -2 V Output, -40 to 85 degC, 10-Pin SON (DRC), Green (RoHS & no Sb/Br) DRC0010J TPS63700DRCR Texas Instruments U26 0 Single Output High PSRR LDO, 200 mA, Adjustable -1.18 to -33 V Output, -3 to -36 V Input, with Ultra-Low Noise, 8-pin MSOP (DGN), -40 to 125 degC, Green (RoHS & no Sb/Br) DGN0008D TPS7A3001DGNR Texas Instruments 20 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com 5.2 PCB Layouts Figure 7 through Figure 12 illustrate the PCB layout. The same PCB layout is used for both the ADS1261EVM and ADS1235EVM. Figure 7. Top Silkscreen Figure 8. Top Layer (Positive) SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 21 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Figure 9. Ground Layer (Negative) Figure 10. Power Layer (Negative) 22 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com Figure 11. Bottom Layer (Positive) Figure 12. Bottom Silkscreen SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 23 EVM Bill of Materials, PCB Layouts, and Schematics 5.3 www.ti.com Schematic Figure 13 through Figure 20 show the schematics for the ADS1261EVM and ADS1235EVM. The schematic drawings show the ADS1261EVM populated components, as listed in Table 8. Schematic Block Diagram ADC Side MCU Side 5V Analog Supply Switch 5V Power Jack (Not Installed) 3.3V +/-2.5V Bipolar Power Supply Power Management 3.3V 1.8V USB Power Analog Inputs + RC Filters ADC Fault LED SPI / GPIO J6 Level-shifters (TXS0108E) SPI / I2C / UART / GPIO Analog Headers DVDD AVDD 3.3V I2C 256K EEPROM (Not Installed) TIVA MCU (TM4C1294NCPDT) 3.3V Standard-speed USB 2.0 USB (1:2) MUX (TS3USB221E) Bridge Driver ULPI REF62xx Voltage reference (Not Installed) LEDs Buttons Data Micro-USB (Type B) Connector High-Speed USB 2.0 tranceiver (USB3320C) 3.3V 1.8V JTAG Header (Not Installed) Figure 13. ADS1261EVM Block Diagram Schematic 24 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com ADS1261 Pinout Input Filtering J1 1 2 Differential cutoff frequency: 75.79 kHz Common-mode cutoff frequency: 1.59 MHz AIN9 AIN8 ADS1235 Pinout R1 100 A9DNP J2 1 2 3 4 5 6 7 8 AIN7 AIN6 AIN5 AIN4 AIN3 AIN2 AIN1 AIN0 C1 1000pF AIN5 AIN4 AIN3 AIN2 AIN1 AIN0 REFN0 REFP0 C3 1000pF AVSS R2 100 R3 100 J3 AINCOM REFOUT C6 1000pF AVSS R4 100 R5 100 (ADS1261 Only) A8DNP A7DNP C4 1000pF 1 2 C2 0.01uF C5 0.01uF A6DNP Bridge Driver (OPTIONAL) J4 AVDD A5DNP C7 1000pF GND AVSS C9 1000pF AVSS REFN1 R9 0 R7 100 R10 100 C10 1000pF C12 1000pF AVSS REFP1 REFN0 R17 R15 0 C17 1000pF AVSS REFP0 R23 0 R24 (ACX1) R11 DNP 0 A4 (ACX1) R12 (ON) AVDD/EXC+DNP 0 U1 A1DNP C15 1000pF A2 A2DNP 100 DNPR20 R6 0 R8 DNP 100k C11 0.01uF 100 R18 0 AVDD Populate R8 instead of R22 to activate positive bridge excitation without requiring the GPIO control signals. A4DNP A3DNP DNPR13 R14 C8 0.01uF ENBA and ENBB are internally pulled-up. 100 VDD 1 ENA A3 (ACX2) R16 DNP 0 2 INA A5 (ACX2) R19 0 4 INB 8 ENB C16 0.01uF A0DNP 6 R21 100k R22 100k (OFF) OUTA 7 EXC+_OUT J5 1 2 OUTB 5 GND 3 C13 2.2uF C14 220pF DNP AVSS EXC-_OUT AVSS/EXC- DNP External excitation source inputs 1 2 UCC27524DR R25 0 R26 100 A10 DNP C18 0.01uF Cutoff frequency: 159.1 kHz AVSS AVSS (ADS1261 Only) ALTERNATIVE 2-WIRE AC EXCITATION MODE (SHOWN): AVSS REFOUT Control the UCC27524DR (Dual non-inverting) driver using ACX1/ACX2 connected to INA/INB, respectively. Set the ADS1261 to 4-wire ACX mode, but ONLY enable the ACX1/ACX2 GPIOs. NORMAL 2-WIRE AC EXCITATION MODE: AVDD R27 DNP 0 Reference supply input to support 5V external reference Replace UCC27524DR with the UCC27523DR (Dual inverting) driver and use ACX1/ACX2 to control INA/INB, respectively. Set the ADS1261 to 2-wire ACX mode, and enable the ACX1/ACX2 GPIOs. External Reference (OPTIONAL) ! U2 DNP 1 VIN 2 EN OUT_F 6 OUT_S 5 DNP C19 22uF R30 DNP 0.005 DNP DNP C20 2.2uF 3 SS GND_S 8 4 FILT GND_F 7 REF6225IDGKR DNP C21 1uF AVSS AVSS REF6225IDGKR may be substituted with the REF6250IDGKR R28 DNP 0 REFP0 R29 DNP 0 REFP1 R31 DNP 0 REFN0 R32 DNP 0 REFN1 De-populate 0-Ohm resistors before connecting external excitation voltage sources to input terminals! AVSS Figure 14. ADS1261EVM Analog Inputs Schematic SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 25 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com AVDD DVDD DNP A+ R33 0.1 DVDD DNP D+ R34 100k DNP A- R38 0.1 Analog Supply +5V C26 1uF 6 GND GND 4 AVDD 17 DVDD 32 31 30 29 28 27 26 25 24 23 AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 AIN8 AIN9 GND 4 +2.5V S1 B) Bipolar +3.3V DVDD R49 0 Depopulate 0-Ohm resistor before applying external supply to DVDD ADS1261_DIGITAL ADC_START ADC_nPWDN ADC_nRESET ADC_SCLK ADC_MOSI ADC_MISO ADC_nDRDY ADC_nCS EXT_CLK FAULT_LED U3 5 -2.5V 1 R37 100k C24 0.1uF AVSS AVDD 2 AVSS GND C27 0.1uF C23 1uF C25 0.1uF A) Unipolar (Shown) 3 R36 100k ADC C22 0.1uF DNP D- R35 100k A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 (ADS1261 Only) (ADS1261 Only) A10 (ADS1261 Only) 1 AINCOM REFOUT (ADS1261 Only) 6 REFOUT 15 BYPASS START PWDN RESET SCLK DIN DOUT/DRDY DRDY CS CLKIN 18 CAPP 2 CAPN NC NC NC NC R39 R40 R41 R42 R43 R44 R45 R46 9 7 8 11 12 14 13 10 47 47 47 47 47 47 47 47 R47 C28 4700pF 3 R48 100k 19 DNP 20 DNP 21 22 DGND 16 AVSS PAD 5 33 47 External Clock Input Pull-down enables internal oscillator when no external clock source is provided GND GND FAULT LED ADS1261IRHBR C29 10uF C30 1uF ADS1261_DIGITAL +5V The orange LED will light up to indicate when a STATUS byte error flag is set OR if a CRC mismatch occurred in the SPI communication. AVSS AVSS +3.3V GND D1 Orange FAULT? U4 1 NC 2 A 3 GND VCC 5 Y 4 C31 0.1uF SN74LVC1G06DCKT +5V DNP R51 DNP 0 Bipolar Supply Source (OPTIONAL) +3.3V R50 1.69k GND GND DNP R52 0 U5 3 9 C32 4.7uF C33 1uF 10 1 GND VIN CPOUT OUT+ 5 C1- C1+ +2.5V DNP 11 R53 604k FB+ 2 R54 549k PGOOD DNP R55 511k GND FB- 12 EN+ 8 EN- GND 7 R56 536k OUT- 6 GND PAD 4 13 C34 4.7uF C35 2.2uF C36 2.2uF -2.5V DNP LM27762DSSR GND Figure 15. ADS1261EVM ADC Main Schematic 26 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com U6 GND DVDD NT1 NT2 NT3 21 11 PAD GND 12 13 14 15 16 17 18 20 B8 B7 B6 B5 B4 B3 B2 B1 19 VCCB BANK3_DIGITAL A8 A7 A6 A5 A4 A3 A2 A1 OE NT4 NT5 ADS1261_DIGITAL FAULT_LED EXT_CLK ADS1261_DIGITAL (Connection to 'ADC_Main' page) ADC_nPWDN ADC_nDRDY ADC_SCLK ADC_nCS ADC_MOSI ADC_MISO ADC_START ADC_nRESET DNP 10 LVDD1 EXT_5V 56 54 52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 9 8 7 6 5 4 3 1 55 53 51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 SSI2XDAT3 SSI2XDAT2 SSI2XDAT1_RX SSI2XDAT0_TX SSI2FSS SSI2CLK UART7TX UART7RX PD7 : BANK_ENABLE PH1 : BANK3_DIGITAL PD3 : (Connection to 'TM4C_Main' page) +3.3V C37 0.1uF VCCA 2 TXS0108ERGY C38 0.1uF R57 100k LVDD1 GND GND GND B8 : B3 : U7 LVDD2 GND B8 : B7 : B6 : B5 : B4 : B3 : B2 : B1 : 21 11 PAD GND 12 13 14 15 16 17 18 20 B8 B7 B6 B5 B4 B3 B2 B1 BANK2_DIGITAL A8 A7 A6 A5 A4 A3 A2 A1 9 8 7 6 5 4 3 1 OE 10 LVDD2 I2C9SCL I2C9SDA SSI0CLK SSI0FSS SSI0XDAT0_TX SSI0XDAT1_RX UART2RX UART2TX PA0 : PA1 : PA2 : PA3 : PA4 : PA5 : PA6 : PA7 : BANK_ENABLE PH2 : BANK2_DIGITAL (Connection to 'TM4C_Main' page) +3.3V 19 C39 0.1uF VCCB VCCA 2 TXS0108ERGY C40 0.1uF R58 100k J6 GND GND NT6 NT7 NT8 NT9 NT10 NT11 NT12 NT13 GND GND LVDD3 U8 GND 21 11 PAD GND 12 13 14 15 16 17 18 20 B8 B7 B6 B5 B4 B3 B2 B1 BANK1_DIGITAL DNP A8 A7 A6 A5 A4 A3 A2 A1 OE 9 8 7 6 5 4 3 1 SSI3XDAT1_RX SSI3XDAT0_TX SSI3FSS SSI3CLK I2C1SCL I2C1SDA I2C4SDA I2C4SCL 10 LVDD3 BANK1_DIGITAL (Connection to 'TM4C_Main' page) BANK_ENABLE +3.3V 19 DNP C41 0.1uF VCCB TXS0108ERGY GND VCCA 2 DNP C42 0.1uF GND R59 DNP 100k GND Figure 16. ADS1261EVM Digital Header Schematic SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 27 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com USB_VBUS +3.3V +3.3V +1.8V U10 R67 10.0k 28 30 VDD18 VDD18 20 VDD33 32 VDDIO 21 VBAT 9 10 11 C60 0.1uF GND VBUS USB Micro USB, Type-B, Recepticle R68 1 1.00k U11 D- 2 D+ 3 ID 4 GND 5 7 8 DD+ 9 6 S OE U12 6 2 1 3 4 8 7 6 J8 VBUS DD+ ID GND +3.3V 10 5 NC C61 0.1uF VCC 1D1D+ 2 1 2D2D+ 4 3 VBUS DM DP ID 17 CPEN 15 16 SPK_L SPK_R 26 25 REFCLK XO 5 GND GND TS3USB221ERSER TPD4S012DRYR GND 22 19 18 23 12 NOTE: Pins 1 and 2 are equivalent and swapped for simplified layout GND GND NC ULPI_DIGITAL DATA[0] DATA[1] DATA[2] DATA[3] DATA[4] DATA[5] DATA[6] DATA[7] 3 4 5 6 7 9 10 13 STP NXT DIR CLKOUT RESET 29 2 31 1 27 RBIAS 24 REFSEL[0] REFSEL[1] REFSEL[2] PAD USBD0 USBD1 USBD2 USBD3 USBD4 USBD5 USBD6 USBD7 ULPI_DIGITAL_BUS ULPI_DIGITAL (Connection to 'TM4C_Main' page) USBSTP USBNXT USBDIR USBCLK USBRST +3.3V 8 11 14 R69 8.06k R70 10.0k 33 USB3320 GND GND USB_DIGITAL USB_MUX_SEL USB_FS_DM USB_FS_DP +3.3V R72 R73 10.0k C62 0.1uF Pressing S1 clears the fault indicator and corresponding LED. BUTTON1 BSL_BUTTON BUTTON2 +3.3V 100 S3 FAULT_RST USB_DIGITAL (Connection to 'TM4C_Main' page) MISC_DIGITAL R71 10.0k BUTTONS USB_DIGITAL_BUS R74 +3.3V R75 DNP 10.0k 100 C63 0.1uF S4 BSL GND R76 DNP100 S5 DNP LED1_GREEN LED2_GREEN LED3_RED MISC_DIGITAL_BUS MISC_DIGITAL (Connection to 'TM4C_Main' page) EEPROM.SCL EEPROM.SDA DNP C64 0.1uF +5V GND GND R77 1.00k R78 2.94k R79 2.94k D2 Green START LEDs 7 D3 Green 1 U13A D4 Red BUSY 5 3 U13B 2 6 8 +3.3V EEPROM A0 VCC 8 +3.3V 2 A1 WP 7 3 A2 SCL 6 4 VSS SDA 5 DNP DNP C66 0.1uF VCC GND 4 C65 0.1uF U14 1 U13D SN74LVC3G06DCUT +3.3V U13C DNPR80 DNPR81 10.0k 10.0k GND WP Pin Connection: - GND: Writing enabled - VCC: Writing disabled GND GND Figure 17. ADS1261EVM USB and Peripherals Schematic 28 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com U9A BANK2_DIGITAL_BUS.I2C9SCL BANK2_DIGITAL_BUS.I2C9SDA BANK2_DIGITAL_BUS.SSI0CLK BANK2_DIGITAL_BUS.SSI0FSS BANK2_DIGITAL_BUS.SSI0XDAT0_TX BANK2_DIGITAL_BUS.SSI0XDAT1_RX BANK2_DIGITAL_BUS.UART2RX BANK2_DIGITAL_BUS.UART2TX (Connection to 'Digital_Header' page) BANK1_DIGITAL_BUS BANK1_DIGITAL BANK2_DIGITAL BANK2_DIGITAL_BUS BANK3_DIGITAL BANK3_DIGITAL_BUS 33 34 35 36 37 38 40 41 BANK3_DIGITAL_BUS.UART7RX BANK3_DIGITAL_BUS.UART7TX (Connection to 'USB_Misc page) ULPI_DIGITAL ULPI_DIGITAL_BUS USB_DIGITAL USB_DIGITAL_BUS MISC_DIGITAL MISC_DIGITAL_BUS BANK1_DIGITAL_BUS.I2C1SCL BANK1_DIGITAL_BUS.I2C1SDA 100 99 98 97 25 24 23 22 PC0/SWCLK/TCK PC1/SWDIO/TMS PC2/TDI PC3/SWO/TDO PC4/C1-/EPI0S7/U7RX PC5/C1+/EPI0S6/RTCCLK/U7TX PC6/C0+/EPI0S5/U5RX PC7/C0-/EPI0S4/U5TX 15 14 13 12 123 124 PE0/AIN3/U1RTS PE1/AIN2/U1DSR PE2/AIN1/U1DCD PE3/AIN0/U1DTR PE4/AIN9/SSI1XDAT0/U1RI PE5/AIN8/SSI1XDAT1 49 50 116 117 JTAG header J7 7 UART1TX 6 UART1RX 5 4 DNP 3 2 1 JTAG_RESET ULPI_DIGITAL_BUS.USBD0 ULPI_DIGITAL_BUS.USBD1 ULPI_DIGITAL_BUS.USBD2 ULPI_DIGITAL_BUS.USBD3 ULPI_DIGITAL_BUS.USBD4 ULPI_DIGITAL_BUS.USBD5 USB_DIGITAL_BUS.USB_FS_DP USB_DIGITAL_BUS.USB_FS_DM 81 82 83 84 85 86 94 93 ULPI_DIGITAL_BUS.USBNXT ULPI_DIGITAL_BUS.USBDIR ULPI_DIGITAL_BUS.USBD7 ULPI_DIGITAL_BUS.USBD6 PA0/CAN0RX/I2C9SCL/T0CCP0/U0RX PA1/CAN0TX/I2C9SDA/T0CCP1/U0TX PA2/I2C8SCL/SSI0CLK/T1CCP0/U4RX PA3/I2C8SDA/SSI0FSS/T1CCP1/U4TX PA4/I2C7SCL/SSI0XDAT0/T2CCP0/U3RX PA5/I2C7SDA/SSI0XDAT1/T2CCP1/U3TX PA6/EPI0S8/I2C6SCL/SSI0XDAT2/T3CCP0/U2RX/USB0EPEN PA7/EPI0S9/I2C6SDA/SSI0XDAT3/T3CCP1/U2TX/USB0EPEN/USB0PFLT PB0/CAN1RX/I2C5SCL/T4CCP0/U1RX/USB0ID PB1/CAN1TX/I2C5SDA/T4CCP1/U1TX/USB0VBUS PB2/EPI0S27/I2C0SCL/T5CCP0/USB0STP PB3/EPI0S28/I2C0SDA/T5CCP1/USB0CLK PB4/AIN10/I2C5SCL/SSI1FSS/U0CTS PB5/AIN11/I2C5SDA/SSI1CLK/U0RTS 95 96 91 92 121 120 ULPI_DIGITAL_BUS.USBSTP ULPI_DIGITAL_BUS.USBCLK MISC_DIGITAL_BUS.EEPROM.SCL MISC_DIGITAL_BUS.EEPROM.SDA PD0/AIN15/C0O/I2C7SCL/SSI2XDAT1/T0CCP0 PD1/AIN14/C1O/I2C7SDA/SSI2XDAT0/T0CCP1 PD2/AIN13/C2O/I2C8SCL/SSI2FSS/T1CCP0 PD3/AIN12/I2C8SDA/SSI2CLK/T1CCP1 PD4/AIN7/SSI1XDAT2/T3CCP0/U2RX PD5/AIN6/SSI1XDAT3/T3CCP1/U2TX PD6/AIN5/SSI2XDAT3/T4CCP0/U2RTS/USB0EPEN PD7/AIN4/NMI/SSI2XDAT2/T4CCP1/U2CTS/USB0PFLT 1 2 3 4 125 126 127 128 BANK3_DIGITAL_BUS.SSI2XDAT1_RX BANK3_DIGITAL_BUS.SSI2XDAT0_TX BANK3_DIGITAL_BUS.SSI2FSS BANK3_DIGITAL_BUS.SSI2CLK USB_DIGITAL_BUS.USB_MUX_SEL MISC_DIGITAL_BUS.BSL_BUTTON BANK3_DIGITAL_BUS.SSI2XDAT3 BANK3_DIGITAL_BUS.SSI2XDAT2 42 43 44 45 46 BANK1_DIGITAL_BUS.SSI3XDAT1_RX BANK1_DIGITAL_BUS.SSI3XDAT0_TX BANK1_DIGITAL_BUS.SSI3FSS BANK1_DIGITAL_BUS.SSI3CLK PF0/EN0LED0/M0PWM0/SSI3XDAT1/TRD2 PF1/EN0LED2/M0PWM1/SSI3XDAT0/TRD1 PF2/M0PWM2/SSI3FSS/TRD0 PF3/M0PWM3/SSI3CLK/TRCLK PF4/EN0LED1/M0FAULT0/SSI3XDAT2/TRD3 PH0/EPI0S0/U0RTS PH1/EPI0S1/U0CTS PH2/EPI0S2/U0DCD PH3/EPI0S3/U0DSR 29 30 31 32 BANK3_DIGITAL_BUS.BANK_ENABLE BANK2_DIGITAL_BUS.BANK_ENABLE BANK1_DIGITAL_BUS.BANK_ENABLE PK0/AIN16/EPI0S0/U4RX PK1/AIN17/EPI0S1/U4TX PK2/AIN18/EPI0S2/U4RTS PK3/AIN19/EPI0S3/U4CTS PK4/EN0LED0/EPI0S32/I2C3SCL/M0PWM6 PK5/EN0LED2/EPI0S31/I2C3SDA/M0PWM7 PK6/EN0LED1/EPI0S25/I2C4SCL/M0FAULT1 PK7/EPI0S24/I2C4SDA/M0FAULT2/RTCCLK/U0RI 18 19 20 21 63 62 61 60 ULPI_DIGITAL_BUS.USBRST MISC_DIGITAL_BUS.LED3_RED MISC_DIGITAL_BUS.LED2_GREEN MISC_DIGITAL_BUS.LED1_GREEN MISC_DIGITAL_BUS.BUTTON1 MISC_DIGITAL_BUS.BUTTON2 BANK1_DIGITAL_BUS.I2C4SCL BANK1_DIGITAL_BUS.I2C4SDA PM0/EPI0S15/T2CCP0 PM1/EPI0S14/T2CCP1 PM2/EPI0S13/T3CCP0 PM3/EPI0S12/T3CCP1 PM4/T4CCP0/TMPR3/U0CTS PM5/T4CCP1/TMPR2/U0DCD PM6/T5CCP0/TMPR1/U0DSR PM7/T5CCP1/TMPR0/U0RI 78 77 76 75 74 73 72 71 PG0/EN0PPS/EPI0S11/I2C1SCL/M0PWM4 PG1/EPI0S10/I2C1SDA/M0PWM5 PJ0/EN0PPS/U3RX PJ1/U3TX PL0/EPI0S16/I2C2SDA/M0FAULT3/USB0D0 PL1/EPI0S17/I2C2SCL/PHA0/USB0D1 PL2/C0O/EPI0S18/PHB0/USB0D2 PL3/C1O/EPI0S19/IDX0/USB0D3 PL4/EPI0S26/T0CCP0/USB0D4 PL5/EPI0S33/T0CCP1/USB0D5 PL6/T1CCP0/USB0DP PL7/T1CCP1/USB0DM 107 108 109 110 111 112 PN0/U1RTS PN1/U1CTS PN2/EPI0S29/U1DCD/U2RTS PN3/EPI0S30/U1DSR/U2CTS PN4/EPI0S34/I2C2SDA/U1DTR/U3RTS PN5/EPI0S35/I2C2SCL/U1RI/U3CTS 118 119 103 104 105 106 PP0/C2+/SSI3XDAT2/U6RX PP1/C2-/SSI3XDAT3/U6TX PP2/EPI0S29/U0DTR/USB0NXT PP3/EPI0S30/RTCCLK/U0DCD/U1CTS/USB0DIR PP4/U0DSR/U3RTS/USB0D7 PP5/I2C2SCL/U3CTS/USB0D6 *Locked 5 6 11 27 102 PQ0/EPI0S20/SSI3CLK PQ1/EPI0S21/SSI3FSS PQ2/EPI0S22/SSI3XDAT0 PQ3/EPI0S23/SSI3XDAT1 PQ4/DIVSCLK/U1RX TM4C1294NCPDTI3R +3.3V U9C +3.3V R60 10.0k R63 R61 1.0M 100 S2 RESET C44 0.1uF GND GND 64 WAKE 70 RST 65 HIB +3.3V R65 0 R66 4.87k R62 U9B 9 59 54 53 VREFA+ OSC0 OSC1 XOSC0 51 88 R64 89 C43 0.1uF 2.00k Y1 66 XOSC1 67 EN0TXOP EN0TXON 57 56 C45 12pF C46 12pF GND +3.3V RBIAS EN0RXIP EN0RXIN GND C51 0.1uF GND C52 0.1uF C53 0.1uF C54 0.1uF Y2 TM4C1294NCPDTI3R 4 1 3 2 GND JP1 TIVA RST External Controller Select DNP C55 6.8pF This jumper is used to hold TIVA in reset and disable level shifters when using external microprocessor/microcontroller GND C57 2.2uF GND GND C56 6.8pF C58 1uF C59 0.1uF 68 VBAT 7 16 26 28 39 47 51 52 69 79 90 101 113 122 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD 8 87 115 VDDA VDDC VDDC GND GND GND GND GND GND 17 48 55 58 80 114 VBAT VDDIO VDD18 +3.3V +3.3V +1.8V C47 2.2uF GND GNDA TM4C1294NCPDTI3R C48 0.1uF GND C49 0.1uF C50 0.1uF GND 10 GND GND GND Figure 18. ADS1261EVM Processor Main Schematic SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 29 EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com USB 5.0V to regulated 5.0V USB_VBUS USB_REG VBUS+ VBUS- U15 USB_BOOST DNP R82 DNP USB_VBUSP 0.1 L1 C67 0.1uF C68 4.7uF 8 VIN GND 1 7 SW VOUT 2 EN FB 3 5 PG ILIM 4 9 PAD 6 1uH R84 100k +5.5V GND U16 DNP 15 16 R83 768k R85 20.0k TPS61252 C69 100pF C70 22uF GND C71 10uF GND GND DNP JP2 USB PWDN GND GND OUT OUT EN 4 5 6 8 9 10 11 12 R86 215k GND IN IN 13 SENSE 6P4V2 6P4V1 3P2V 1P6V 0P8V 0P4V 0P2V 0P1V 1 20 5V 3 NR 14 NC NC NC NC 19 18 17 2 GND PAD 7 21 C72 0.1uF C73 47uF C74 1uF GND TPS7A4700RGW R87 R88 R89 R90 R91 R92 DNP DNP DNP DNP 0 0 0 0 0 0 GND GND GND U17 TPS71718DCKR C75 1uF +1.8V 1 IN OUT 5 3 EN NR 4 DNP Programmable LDO Configuration (U16) Vout (V) 3P2V 1P6V 0P8V 0P4V 0P2V 1.4 DNI DNI DNI DNI DNI 1.5 DNI DNI DNI DNI DNI 1.8 DNI DNI 2.5 DNI DNI 3.0 DNI INSTALLED DNI DNI 3.3 DNI INSTALLED DNI DNI DNI INSTALLED C76 1uF GND 2 C77 1000pF GND GND GND 4.5 +5V 5.0 INSTALLED DNI DNI INSTALLED INSTALLED DNI INSTALLED DNI INSTALLED INSTALLED 0P1V DNI INSTALLED DNI DNI INSTALLED INSTALLED DNI DNI INSTALLED INSTALLED INSTALLED INSTALLED DNI DNI DNP DNI = Do not install INSTALLED = install 0 Ohm jumper or short pads together U18 R93 1.00k 2 1 RESET C78 0.1uF VDD GND 1 TLV803MDBZR 2 3 D5 Green LED Threshold: 4.38V GND USB_BOOST USB_REG GND R94 0 JP3 1 2 DNP 3 JP4 DNP 1 2 3 R95 0 U19 6 IN OUT 1 4 EN NR/FB 2 GND PAD 3 7 EXT_5V C79 1uF 5 Jumper Position DVDD (JP3) AVDD (JP10) 1-2 USB 5V USB 5V 2-3 EXT 5V EXT 5V +3.3V NC GND GND GND DNP DNP DNP DNP C80 1uF C81 1000pF GND TPS737xxDRV GND GND GND Figure 19. ADS1261EVM USB Power Schematic 30 ADS1261 and ADS1235 Evaluation Module SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated EVM Bill of Materials, PCB Layouts, and Schematics www.ti.com 1 DNP 2 Replacement Fuse Littlefuse P/N 0453002. (Fast Acting) Littlefuse P/N 0454002. (Slow acting) *Installed EXT_5V U20 TL1963ADCQR DNP 3 2 Fuse DNP R97DNP 10.0k D6 Diode_TVS_Uni 12V 2 IN 1 SHDN DNP GND DNP C82 10uF OUT 4 ADJ 5 R96 DNP 1.00k DNPR98 9.31k U21 6 DNP DCV_WALL 1 F1 1 3 J10 DNPR99 3.01k DNP C83 DNP C84 DNP C85 0.1uF 10uF 0.01uF U22 VDD 1 GND DNP RESET DNP JP5 EXT 5V PWDN 3 1 NC 2 2 A 3 GND VCC 5 Y 4 D7 DNP Green EXT 5V OK? 2 J9 TPS3809I50QDBVRQ1 GND DNP SN74LVC1G06DCKT GND GND GND L2 DNP 3.3uH EXT_5V U23 DNP C87 1uF GND GND SW 5 3 EN FB 2 7 FREQ COMP 1 8 SS PGND 4 DNP C94 0.1uF DNP HVBoost DNP R100 DNP 158k R102 DNP 15.0k R103 DNP 51.1k DNP C89 10uF DNP C90 10uF GND GND 8 IN OUT 1 5 EN FB 2 3 7 NC DNP DNC NR/SS 6 DNP C95 1100pF DNP 12V/50mA DNP C88 0.01uF DNPR101 453k DNP C91 10uF EP GND TPS61085TPWR GND +HVDD U24 TPS7A4901DGNR DNP 9 DNP C86 10uF IN DNP C92 0.1uF DNPR104 49.9k DNP C93 0.01uF 4 D8 6 GND GND GND GND GND GND DNP C96 10uF 1 COMP R110 DNP 10.0 6 8 FB 9 VREF 4 GND SW OUT DNP DNP C98 4700pF GND D9 IN 3 EN VIN PP GND PS_GND HVInvertDNP DNPR105 1.30M DNP TPS63700DRCR DNP C105 0.1uF 8 DNPR106 100k DNPC99 10pF 10 11 2 7 U26 TPS7A3001DGNR DNP DNP C100 10uF 1 FB 2 EN 3 7 NC DNC NR/SS 6 DNP GND DNP C104 0.22uF DNP -12V/50mA DNP C97 0.01uF EP GND DNPR108 121k L3 10uH 5 -HVSS OUT IN 4 U25 5 9 EXT_5V DNP C103 0.01uF GND DNPR107 93.1k DNP C101 10uF DNP C102 0.1uF DNPR109 10.0k GND GND GND GND GND GND Figure 20. ADS1261EVM External Power Schematic SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback ADS1261 and ADS1235 Evaluation Module Copyright © 2018, Texas Instruments Incorporated 31 Revision History www.ti.com Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (March 2018) to A Revision ....................................................................................................... Page • • • • • • • • • • • • • • • • • • • • 32 Changed general overview of EVM for clarity ......................................................................................... 1 Changed Hardware Functionality section .............................................................................................. 3 Changed last bullet in Software Functionality section ................................................................................ 3 Added note to Analog Supply Configuration of the ADC section ................................................................... 5 Changed onboard digital supply to onboard supply in Digital Supply Configuration of the ADC section ...................... 5 Added first step and changed software names in steps 2 and 3 in Software Installation and Hardware Connection Procedure section ......................................................................................................................... 5 Changed 2.55 V to 2.5 V in left position description of switch S1 .................................................................. 6 Added (default) to open position description of switches S2, S3, and S4 ......................................................... 6 Changed FAULT indicator to FAULT LED indicator in closed position description of switch S3 ............................... 6 Added (ADS1261EVM Shown) to title of Input Terminal Blocks (ADS1261EVM Shown) figure ............................... 7 Added AVSS footnote to Analog Input Terminal Blocks, J1–J4 table .............................................................. 8 Changed Digital Interface Header section ............................................................................................. 9 Added REF62xx to U2–1 (REF) row in Useful Test Points tabke ................................................................. 10 Added EVM Hardware to title of GUI View Before Connecting EVM Hardware figure ......................................... 13 Added Hardware to title of GUI View After Connecting EVM Hardware figure .................................................. 13 Changed first sentence of ADS1261 and ADS1235 EVM Commands section .................................................. 13 Changed Firmware Commands table title and contents ............................................................................ 14 Deleted overview text from EVM Bill of Materials, PCB Layouts, and Schematics section .................................... 16 Added overview text to Bill of Materials section, changed note ................................................................... 16 Changed Schematic section text ...................................................................................................... 24 Revision History SBAU293A – March 2018 – Revised September 2018 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated STANDARD TERMS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms. 1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms that accompany such Software 1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system. 2 Limited Warranty and Related Remedies/Disclaimers: 2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement. 2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM. User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10) business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected. 2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period. 3 Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter. 3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant: CAUTION This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • • • • Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 3.2 Canada 3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247 Concerning EVMs Including Radio Transmitters: This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concernant les EVMs avec appareils radio: Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concerning EVMs Including Detachable Antennas: Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に 輸入される評価用キット、ボードについては、次のところをご覧ください。 http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs (which for the avoidance of doubt are stated strictly for convenience and should be verified by User): 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures. 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. 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