ADS42B49EVM

User's Guide SLAU477A – December 2012 – Revised January 2015 ADS42B4x EVM This is the user’s guide for the ADS42B4x EVM (Revision A). The ADS42B49 (dual-channel, 14-bit, up to 250 MSPS) is a dual analog-to-digital converter family. This EVM is specifically suited for interfacing with TI’s TSW1400 EVM to capture and display waveforms from the ADC. The EVM schematic, Bill of Materials (BOM), and layout files are found in the design package in the ADS42B4x EVM product folder on www.ti.com. 1 2 3 Contents Software Control ............................................................................................................. 2 Basic Test Procedure ....................................................................................................... 4 Optional Configurations.................................................................................................... 10 1 ADS42Bxx_GUI Front Panel – Top Level List of Figures 2 3 4 5 6 7 ............................................................................... ADS42B4xEVM and TSW1400 ............................................................................................ Test Set-Up Block Diagram ................................................................................................ High Speed Data Converter Pro ........................................................................................... ADS42Bxx GUI ............................................................................................................... FFT Plot: 250-MHz clock, 170-MHz Input to Channel A ............................................................... FFT Plot: 250-MHz clock, 170-MHz Input to Channel B ............................................................... 3 4 5 7 8 9 9 List of Tables 1 2 3 4 5 ............................................ 5 Parallel Interface with Pin Control of ADS58C28 and ADS42Bxx EVM Revision B Jumper Setting ............. 6 Jumper Setting for Transformer-coupled or OPA-driven Input ...................................................... 10 Jumper Setting for Transformer-Coupled or CDCE72010 Input .................................................... 11 Jumper and Component Settings for DDR LVDS Output and Parallel CMOS Output ............................ 11 Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 1 Software Control 1 Software Control 1.1 Installation Instructions • • • • • • 1.2 www.ti.com Open folder named: ADS42Bxx_Installer_vxpx (where xpx represents the latest version) Double-click: setup.exe Follow on-screen instructions to complete GUI installation – Wait for ADS42Bxx_Installer initializing screen to complete – Click Next to install files in the default destination directory – Select I accept the License Agreement and click Next – Select Next on the summary page – Wait for files to load and then click Next – Once all files are installed, click Next If Windows® Logo Message window appears, click Continue Anyway. Once installed, launch by clicking on the ADS42Bxx_GUI_vxpx program in Start→Texas Instruments ADCs When plugging in the USB cable for the first time, you are prompted to install the USB drivers – On the Welcome to the Found New Hardware Wizard window select No, not at this time – Select Install the software automatically button on the next window – Select Continue Anyway on the Windows Logo Message window – If the computer cannot find the drivers automatically, access them directly in the install directory: C:\Program Files (x86)\Texas Instruments ADCs\ADS42Bxx GUI – Click Finish once completed Software Operation The software allows full programming control of the ADC device. Figure 1 shows the GUI front panel that has register tabs. The GUI tab provides an interface to the most-used registers. 1.2.1 Top Level Figure 1 shows the top level tab of the register user interface. Below is a brief explanation of the controls. Please refer to the ADS42B49 datasheet for more detailed explanations of the register functions as needed. ● Reset: ● Powerdown Global: ● Data format: ● ● ● ● Output Buffer Selection: Gain ChA: Gain ChB: Test Pattern ChA: ● Test Pattern ChB: ● ● ● ● ● 2 HP[0] HP[1:11] Digital Function Enable Low Speed Mode En: Low Speed Mode ChA: ADS42B4x EVM Device reset, clicking this switch resets the device Clicking the Device power down switch on powers down the device Clicking the Device output data format, sets the 2’s complement or offset binary format. High Speed Data Converter Pro expects offset binary. Select this box for LVDS or CMOS output format Set this box for gain of channel A. Must enable digital functions first. Set this box for gain of channel B. Must enable digital functions first. Select device test pattern for channel A. Must enable digital functions first. Select device test pattern for channel B. Must enable digital functions first. High-performance mode bit 0 - set for CMOS outputs High-performance mode bits 1 to 11. Always set this control. Set this bit to control digital functions, such as gain and test patterns. Low-Speed Mode Enable or Disable Low-speed mode for channel A SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Software Control www.ti.com ● ● ● ● ● ● ● ● Low Speed Mode ChB: LVDS Data Strength: LVDS Clkout Strength: CMOS Clk Strength: ClkOut Delay: Offset Correction: ChA Offset Pedestal: ChB Offset Pedestal: Low-speed mode for channel B Set the data strength from this switch Set the output clock strength from this switch Set CMOS output clock strength from this switch Programming the delay of CLKOUT Enables or Disables offset correction Programming Channel A for different offset pedestals Programming Channel B for different offset pedestals Figure 1. ADS42Bxx_GUI Front Panel – Top Level 1.2.2 Register Control ● ● ● ● Send All: Read All: Save: Load: Sends all the register configurations on the panel to the device Not active Saves the register configuration to text file Loads a register file from a text file. After loading registers, the relative switches and selecting boxes are automatically updated. — Select Load button — Double click on the desired register file — Click Send All to ensure all of the values are loaded properly SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 3 Basic Test Procedure 1.2.3 Miscellaneous Settings ● Reset USB: ● Exit: 2 www.ti.com Toggle this button if the USB port is not responding. This generates a new USB handle address. After hitting this, USB Status has to be turned to “Green”. Stops the program Basic Test Procedure This section outlines the basic test procedure for testing the EVM. Figure 2 shows how to connect the ADS42B4xEVM to TSW1400. Figure 2. ADS42B4xEVM and TSW1400 4 ADS42B4x EVM SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Basic Test Procedure www.ti.com 2.1 Test Block Diagram The test set-up for general testing of the ADS42B4x EVM with the TSW1400 capture card is shown in Figure 3. PC Mini-USB Mini-USB J17 J5 J8 J4 CLK J19 15dBm LVDS TSW1400 Signal Generator Ref_out ADS42B49EVM BPF J3/J6 J12 J23 +5V +5V ±1dBFS RX IF Signal Generator Ref_in Figure 3. Test Set-Up Block Diagram 2.2 Verify Board Set-up Verify jumper settings are in the correct position as outlined in Table 1 and Table 2. Parallel configuration is not recommended because the high performance modes cannot be enabled. The high performance modes are required to achieve best performance. Table 1. Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface Jumper Default position Function JP15 Short 1 - 2 DC supply for +1.8VA JP16 Short 1 - 2 DC supply for +1.8VD JP17 Short 3 - 2 DC supply, LDO for +5V JP19 Short 3 - 2 DC supply, LDO for +1.8V JP28 Short 3 - 2 DC supply, LDO for +5V JP29 Short 3 - 2 DC supply, LDO for +3.3VCLK JP26 Open DC supply for ext buffer JP27 Open DC supply for ext buffer JP3 Short 2 - 3 OPA power down JP4 Short 2 - 3 OPA power down JP22 Open SDOUT to FPGA JP20 Short 1 - 2 CDC JP21 Short 1 - 2 CDC J14 Short 1 - 2 CDC power down J18 Open CDC, VCXO JP8 (1) Short 3 - 2 ADC SCLK for SPI JP9 Short 3 - 2 ADC SDATA for SPI JP10 Short 3 - 2 ADC SEN for SPI JP11 Short 3 - 2 ADC for SPI, also reset JP 12 Short 1 - 2 ADC Low speed mode disable JP 13 Open (1) The EVM schematic shows default setting of JP8 to JP11 as parallel interface Table 2) which is for EVM installation. After EVM tested and released these jumpers are set as serial interface (Table 1). SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 5 Basic Test Procedure www.ti.com Table 1. Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface (continued) Jumper Default position Function JP14 Short 7 - 8 ADC 2’s complement, DDR LVDS JP5 Short 1 - 2 ADC CTRL3, normal operation JP6 Short 1 - 2 ADC CTRL2, normal operation JP7 Short 1 - 2 ADC CTRL1, normal operation JP 18 Short 1 - 2 Ext Buffer JP 23 Short 1 - 2 Ext Buffer JP 24 Short 1 - 2 Ext Buffer JP 25 Short 1 - 2 Ext Buffer JP30 Short ADC buffer 3.3-V supply Table 2. Parallel Interface with Pin Control of ADS58C28 and ADS42Bxx EVM Revision B Jumper Setting 2.3 Jumper Position Function JP8 Short 1 - 2 ADC SCLK for parallel control JP9 Short 1 - 2 ADC SDATA for parallel control JP10 Short 1 - 2 ADC SEN for parallel control JP11 Short 1 - 2 ADC parallel control Test Set-Up Connections • • • • • • 6 Connect Connect Connect Connect Connect Connect the ADS42B4x EVM to TSW1400 EVM 5-V power to banana jack at J10; connect ground to J12 USB cable to programming computer at J17 USB and power supply jack to TSW1400 the clock signal through the appropriate BPF to J19 the input signal through the appropriate BPF to J6/J3 ADS42B4x EVM SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Basic Test Procedure www.ti.com 2.4 TSW1400 Quick Start Operation Reference the TSW1400 User’s Guide for more detailed explanation of the TSW1400 set-up and operation. This document assumes that High Speed Data Converter Pro (HSDCPro) is installed and functioning properly. The front panel of HSDCPro is shown in Figure 4. The following configuration needs to be changed from the default settings. Note that HSDCPro version 3.1 or newer is required to properly run the ADS42B4x EVM. • Select the ADS42B4x device name from the TI ADC Selection pull-down menu • Select Single Tone for FFT from the Test pull-down menu • Select the desired channel (that is, Channel A or B) from the Channel Display pull-down menu • Check the box for Auto Calculation of Coherent Frequencies. • Change the ADC sampling rate to the desired value (that is, 250 MHz) • Change the input frequency to desired value (that is, 170 MHz or other) • Verify status display in the lower left has no errors • Press the Capture button to initiate a data capture. The ADS42B4x EVM must be configured before a capture can be made. Figure 4. High Speed Data Converter Pro SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 7 Basic Test Procedure 2.5 www.ti.com ADS42B4x Test Procedure • • • • • Switch on the 5-V power supply for the EVM. Connect clock signal at J19 through an appropriate bandpass filter. – Set the signal generator to 10 dBm and 250 MHz. – Use a high-quality, low phase-noise generator for this input to ensure proper device evaluation. – A tight bandpass filter is required to achieve optimal performance. Connect the input signal through an appropriate bandpass filter at either J6 or J3 (Channel A or B). – Adjust the frequency of the generator to match the coherent frequency displayed in HSDCPro. – Select the proper Display Channel in HSDCPro, corresponding to the input connection. – Use a high-quality, low phase-noise generator for this input to ensure proper device evaluation. – A tight bandpass filter is required to achieve optimal performance. Open the ADS42B4x GUI by going to the Start Menu and finding ADS42B4x GUI in the Texas Instruments folder. – Press the Reset button. – Press the Data Format button to choose "Offset Bin" – Turn on HP[1:11] to enable the high performance modes. – Click Send All, see Figure 5. Initiate a capture by pressing the Capture button in HSDCPro. Figure 5. ADS42Bxx GUI 8 ADS42B4x EVM SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Basic Test Procedure www.ti.com 2.6 ADS42B4x Performance Results Figure 6 shows the performance result at 250-MSPS clock frequency and with a 170-MHz input tone. Figure 6 shows the performance of channel A from ADS42B4xEVM. SNR is 69.85 dBFS and SFDR is 82.85 dBFS. Figure 6. FFT Plot: 250-MHz clock, 170-MHz Input to Channel A Figure 7 shows the performance of channel B from ADS42B4xEVM. SNR is 69.94 dBFS and SFDR is 84.77 dBFS. Figure 7. FFT Plot: 250-MHz clock, 170-MHz Input to Channel B SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 9 Optional Configurations www.ti.com 3 Optional Configurations 3.1 THS4509 Input Op-Amp Configuration The default analog input configuration is transformer coupling through T1 and T2 for channel A, and T3 and T4 for channel B. The optional configuration for analog input is through an Op-Amp THS4509. The changes required to modify the transformer coupled input to the OPA-driven input are shown in Table 3. Table 3. Jumper Setting for Transformer-coupled or OPA-driven Input Jumpers or 0 Ω Transformer-coupled input (default) OPA-driven input R119 Install Do not install R123 Install Do not install R120 Do not install install R129 Do not install install R143 Install Do not install R141 Install Do not install R131 Do not install Install R132 Do not install Install R93 Install Do not install R94 Install Do not install R95 Do not install Install R96 Do not install Install R97 Install Do not install R98 Install Do not install R99 Do not install Install R114 Do not install Install SJP3 Shunt 2 - 3, default Shunt 1-2 SJP4 Shunt 2 - 3, default Shunt 1-2 J11 and J13 are the power supply for the THS4509. An on-board layout option for a LPF or BPF is available between the amplifier and the ADC. By default the filter is bypassed, allowing the flexibility to design according to desired specifications. 10 ADS42B4x EVM SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Optional Configurations www.ti.com 3.2 On-Board CDCE72010 Clock The default clock input configuration is 1:4 transformer coupling through T6. The optional configuration is through clock driver CDCE72010. The changes required to modify the transformer coupled clock input to clock driver input are shown in Table 4. Table 4. Jumper Setting for Transformer-Coupled or CDCE72010 Input Jumper Transformer-coupled (Default) CDCE72010 J14 shunt open JP20 Shunt 1-2 Shunt 1-2 JP21 Shunt 1-2 Shunt 1-2 J18 open open R121 0Ω DNI R122 DNI 0Ω SJP7 Short 1-2 Short 3-4 SJP6 Short 3-4 Short 5-6 The on-board layout is available for the option of VCXO and crystal BPF. The CDCE72010 comes with a default configuration (please see CDCE72010 data sheet for details about device default configuration). With a 10-MHz primary reference at J19 and a 983.04-MHz VCXO on-board the CDC outputs a LVCMOS clock at U0P (pin7) at 245.76 MHz. With a 491.52-MHz VCXO the CDC outputs a LVCMOS clock at U0P at 122.88 MHz. The clock goes through an on-board crystal BPF (Y0) and is used as the input clock to the ADC through SJP6. 3.3 Parallel CMOS Output The default ADC output is configured as DDR LVDS output on the EVM. The layout provides an option of 1.8-V parallel CMOS output from the ADC. The changes required to modify from DDR LVDS output to parallel CMOS output are shown in Table 5. Table 5. Jumper and Component Settings for DDR LVDS Output and Parallel CMOS Output Jumper/Component DDR LVDS Output Parallel CMOS U12 (SN74AVC16T245) DNI Installed U13 (SN74AVC16T245) DNI Installed RN5 to RN8 Installed DNI RN9 to RN12 Installed DNI JP26 Open Shunt JP27 Open Shunt The CMOS output data is output from the EVM board at 40-pin connectors J1 (ch A) and J2 (ch B). SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated ADS42B4x EVM 11 Revision History www.ti.com Revision History Changes from Original (December 2012) to A Revision ................................................................................................ Page • • • • • • • • • Changed register information in Top Level section. .................................................................................. Changed ADS42Bxx_GUI Front Panel – Top Level image. ......................................................................... Changed content in Miscellaneous Settings section. ................................................................................. Added JP30 row to the end of the Default ADS42Bxx EVM Revision A Jumper Setting for Serial Interface table. ......... Changed content of the bullets in TSW1400 Quick Start Operation section. ..................................................... Added content in the ADS42B4x Test Procedure section. .......................................................................... Added new image in the ADS42B4x Test Procedure section. ...................................................................... Changed FFT Plot: 250-MHz clock, 170-MHz Input to Channel A image. ........................................................ Changed FFT Plot: 250-MHz clock, 170-MHz Input to Channel B image. ........................................................ 2 3 4 5 7 8 8 9 9 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 12 Revision History SLAU477A – December 2012 – Revised January 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. 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These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. 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Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. 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SPACER SPACER SPACER SPACER SPACER 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. SPACER SPACER SPACER SPACER SPACER SPACER SPACER 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM. 7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. 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