User's Guide
SLAU457A – October 2012 – Revised September 2013
ADS5444/63/74-SP Evaluation Module Manual
1
Overview
This user's guide gives a general overview of the ADS5444/63/74 evaluation module (EVM) and provides
a general description of the features and functions to be considered while using this module.
1.1
Purpose
The EVM provides a platform for evaluating the analog-to-digital converter (ADC) under various signal,
reference, and supply conditions. This document should be used in combination with the EVM schematic
diagram supplied.
1.2
EVM Basic Functions
Two analog inputs to the ADC are provided via external SMA connectors. One input path uses a pair of
THS9001 amplifiers, while the other input is ac-coupled. In both cases, the user supplies a single-ended
input, which is converted into a differential signal.
The EVM provides an external SMA connector for input of the ADC clock. The single-ended input is
converted into a differential signal at the input of the device. Digital output from the EVM is via a highspeed, high-density Samtec output header.
Power connections to the EVM are via banana jack sockets. Separate sockets are provided for the ADC
analog and digital supplies and for the differential amplifier supply.
1.3
Power Requirements
The EVM can be powered directly with only three supplies: a 3.3-V supply for both ADC analog and digital
driver supply, and 5 V for the ADC analog supply.
CAUTION
Voltage Limits: Exceeding the maximum input voltages can damage EVM
components. Undervoltage may cause improper operation of some or all of the
EVM components.
1.4
ADS5463 EVM Operational Procedure
The ADS5463 EVM provides a flexible means of evaluating the ADS5463 in a number of modes of
operation. A basic setup procedure that can be used as a board confidence check is as follows:
1. Verify all jumper settings against the schematic jumper list in Table 1.
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Overview
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Table 1. Three-Pin Jumper List
JUMPER
FUNCTION
LOCATION: PINS 1–2
LOCATION: PINS 2–3
DEFAULT
JP3
Provides AIN+ source to
ADS5463
Source provided from
differential amplifier
Source provided from T2
2–3
JP4
Provides AIN– source to
ADS5463
Source provided from
differential amplifier
Source provided from T2
2–3
JP20
ADC
ADS5444
ADS5463/74
2–3
J21
ADS5474 Power Down
ADS5474 Normal Operation
ADS5474 Power Down
1-2
2. Connect supplies to the EVM as follows:
• 5 V (4.75 V–5.25 V) ADC analog supply to J12 and return to J9
• 3.3 V (3 V–3.6 V) ADC analog supply to J14 and return to J9
• 3.3 V (3 V–3.6V) ADC digital buffer supply to J7 and return to J8
3. Switch power supplies on.
4. Using a function generator with 50-W output, generate a 0-V offset, 1.5-Vpp sine-wave clock into J17.
The frequency of the clock must be within the specification for the device speed grade.
5. Use a frequency generator with a 50-W output to provide a 15.5-MHz, 0-V offset, –1-dBFS-amplitude
sine-wave signal into J11. This provides a transformer-coupled differential input signal to the ADC.
6. The digital pattern on output connector J5 should now represent a sine wave.
2
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2
Circuit Description
2.1
Circuit Function
The following sections describe the function of individual circuits. Refer to the relevant data sheet for
device operating characteristics.
2.1.1
Power
Power is supplied to the EVM via banana jack sockets. The EVM offers the capability to supply 5 V, 3.3 V
analog, and digital 3.3 V independently. The heat slug is tied to AGND with multiple vias to provide for
thermal dissipation. Table 2 offers a snapshot of the power-supply options. All supplies are required for
default operation, except J18 and J19.
Table 2. EVM Power Supply Options
2.1.2
EVM BANANA JACK
DESCRIPTION
J7
ADS5463 3.3-V digital supply
J8
AGND
J9
AGND
J12
ADS5463 5-V analog supply
J14
ADS5463 3.3-V analog supply
J18
THS9001 5-V supply
J19
AGND
Clock Input
A single-ended square or sinusoidal clock input should be applied to J17. The clock frequency should not
exceed 500 MHz. The clock input is converted to differential signal by a Coilcraft WBC4-1W, which has an
impedance ratio of 4. It is important to note that voltage applied to J17 is stepped up by a factor of two.
2.1.3
Analog Inputs
The EVM can be configured to use either a balun-coupled input from a single-ended source. The inputs
are provided via SMA connectors J11 for a balun coupled input the EVM must be configured as follows:
• For a 1:1 transformer-coupled input to the ADC, a single-ended source is connected to J11. JP3 has
pins 1 and 2 shorted, and JP4 has pins 2 and 3 shorted. This is the default configuration for the EVM.
The MACOM ETC1-1-13 forms an inherent band-pass filter with a pass band from 4 MHz to 1 GHz,
with no more then 1dB insertion loss. A dual balun configuration has been provided which can improve
harmonic distortion performance at higher input frequencies (100 MHz+). It should be noted that
excellent results have also been obtained using a single Mini-Circuits JTX4-10T transformer.
Transformers can be used in place of the baluns, in which case C58 and C77 can be replaced with
0-W resistors, as the ADC features a self-biased input. When choosing a balun or transformer, it is
important to take careful consideration of its amplitude and phase performance. Circuit placeholders
L7, C88, and C68 are provided if impedance matching is needed at a specific frequency. By default,
these are not populated. The termination resistors have been tuned to represent a broadband 50-W
impedance over the first two Nyquist zones.
2.1.4
Digital Outputs
The LVDS digital outputs can be accessed through the J5 output connector. A parallel 100-W termination
resistor must be placed at the receiver to properly terminate each LVDS data pair. The supplied logic
analyzer breakout board includes the 100-W terminations at the logic analyzer probe point. If using the
logic analyzer breakout board, Table 3 use for configuration details. When using a logic analyzer, the ADC
DRY clock used to latch in the data must be configured in the DDR mode.
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Circuit Description
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Table 3. Output Connector J5
2.2
EVM NET DESCRIPTION
BREAKOUT BOARD SCHEMATIC NET
NAME
LOGIC ANALYZER DEFAULT
ASSIGNMENTS USING BREAKOUT
BOARD
No Connect
D0
D[0] - Ignore
OVR
D1
D[1] - Ignore
MSB
D2
D[2] - MSB
MSB-1
D3
D[3]
MSB-2
D4
D[4]
MSB-3
D5
D[5]
MSB-4
D6
D[6]
MSB-5
D7
D[7]
MSB-6
D8
D[8]
MSB-7
D9
D[9]
MSB-8
D10
D[10]
MSB-9
D11
D[11]
MSB-10
D12
D[12]
MSB-11 (LSB - ADS5463)
D13
D[13]
MSB-12 (LSB - ADS5444)
D14
D[14]
MSB-13 (LSB - ADS5474)
D15
D[15]
Test Points
The EVM provides access to the ADC VREF voltage through TP1.
2.3
ADC Options
The EVM layout has been designed to showcase the family migration ability. Customers can easily design
one layout to accommodate both the ADS5463 and the ADS5444.
• To use the ADS5444 device on this EVM, one must set jumper J20 to short pins 1–2, which connects
5 V to the digital output buffer of the device. To use the ADS5463/74 connect jumper J20 to short pins
2–3.
• The ADS5474 has several modes the ADS5444/63 ADCs do not have. Pin 31 becomes a VCM and
pin 35 becomes a power down when asserted high. In the case of the ADS5444/63, these pins can be
left unconnected or grounded.
4
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3
Physical Description
This chapter describes the physical characteristics and PCB layout of the EVM.
3.1
PCB Layout
The EVM is constructed on a 6-layer, 0.062-inch thick PCB using FR-4 material. The individual layers are
shown in Figure 1 through Figure 7. The layout features a common ground plane; however, similar
performance can be had with careful layout using a split ground plane.
Figure 1. Top Silkscreen
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Physical Description
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Figure 2. Component Side
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Figure 3. Ground Plane 1
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Physical Description
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Figure 4. Power Plane 1
8
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Figure 5. Power Plane 2
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Figure 6. Ground Plane 2
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Figure 7. Bottom Side
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Schematics
4
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Schematics
See the following pages for the ADS5444/63/74 schematics.
12
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Schematics
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+VCC
J10
Ain
4
1/16W 1%
3
C89
THS9000
AMP+
GND
1
4
3
2
5
L12
18nH
2
GND
6
1
+VCC
U7
C70
1
2
1000pF 50V
1:2
GND
1
2
3
+VCC
R33
237
1/16W 1%
GND
1000pF 50V
EN D
5
C59
.1uF
10V
2
R14
49.9 ohm
1/16W
1%
470nH
2
L10
6
5
4
R7 237
T4
WBC2-1W
1
IF(IN)
VS
GND L(COL)
BIAS IF(OUT)
C60
.1uF
10V
IF(IN)
VS
GND L(COL)
BIAS IF(OUT)
C90
AMP1000pF 50V
L11
6
5
4
C75
39pF
50V
2
S MA
1
2
3
1000pF 50V
VCM
1
+VCC
U6
C71
1
+VCC
R15
49.9 ohm
1/16W
1%
470nH
THS9000
GND
VCM
C65
.1uF
10V
C64
.1uF
10V
GND
C76
AMP+
1
2
3
1uF
J11
AIN
S MA
L7
1 1
R31 ZERO
2
0 ohm
4
3
2
5
EN D
Do Not Install
C88
6.8pF
25V
1/8W 5%
R32 ZERO
GND
1:1
T3
4
5
6
ETC1-1-13
3
2
1
1
2
3
T5
ETC1-1-13
1/8W 5%
6
5
4
1:1
GND
AIN+
JP3
Default: Short 2-3
R18
39
1/10W
1%
R17
39
1/10W
1%
R19 10
1/16W 1%
Do Not Install
R21
NOT USED 200
1/16W
1%
C58
.1uF
16V
GND
C77
1
2
3
1uF
C74
.1uF
16V
AMP-
R20 10
1/16W 1%
AIN-
JP4
Default: Short 2-3
GND
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Schematics
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ADS54XX PIN ASSIGNMENT
PIN #
5V_AVDD
C63
1
2
.1uF 10V
.1uF 10V
C81
C66
1
C83
1
NOT USED
NOT USED
47
NOT USED
NOT USED
MSB-3_M
MSB-3_P
MSB-2_M
MSB-2_P
MSB-1_M
MSB-1_P
MSB_M
MSB_P
DRYM
DRYP
3.3V_DVDD
2
.1uF 10V
C84
C78
1
C57
1
2
1
.1uF 10V
C62
1
2
2
.1uF 10V
GND
.1uF 10V
GND
GND
TP1
VREF
1/8W 5%
GND
BLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
2
1
CM
C3
.1uF
10V
C55
1
2
.1uF 10V
GND
CLK+
CLK-
J17
S MA
4
3
2
5
EN D
1
R23 ZERO R24 ZERO
1/8W 5%
WBC4-1W
4
3
5
2
1/8W 5%
R6
49.9
1/10W
1%
C54
.1uF
10V
Do Not Install
R26
NOT USED 121
1/10W
1%
AIN+
AIN-
DVDD
DGND
AVDD
NC1
NC2
VREF
GND
AVDD
GND
CLKP
CLKM
GND
AVDD
AVDD
GND
AINP
AINM
GND
AVDD
GND
DX_P (MSB-8)
DX_M (MSB-8)
DX_P (MSB-9)
DX_M (MSB-9)
DX_P (MSB-10)
DX_M (MSB-10)
DX_P (MSB-11)
DX_M (MSB-11)
DGND
DVDD
DX_P (MSB-12)
DX_M (MSB-12)
DX_P (RESERVED)
DX_M (RESERVED)
NC8
NC7
NC6
NC5
OVRP
OVRM
U5
ADS54XXHFG/EM
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
5V_AVDD
1
T1
MSB-12_P
MSB-12_M
MSB-13_P
MSB-13_M
OVRP
OVRM
3.3V_AVDD
GND
GND
3
2
1
C56
6
MSB-8_P
MSB-8_M
MSB-9_P
MSB-9_M
MSB-10_P
MSB-10_M
MSB-11_P
MSB-11_M
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Do Not Install
R25
NOT USED 121
1/10W
1%
3.3V_DVDD
POWERPAD
1
2
.1uF 10V
TP2
R8
10K
1/16W
1%
1
GND
1
GND
C91
.1uF
10V
3.3V_AVDD
3
2
1
J20
2
R30 ZERO
2
GND
C92
.1uF
10V
1
.1uF 10V
3.3V_DVDD
C61
1
C79
2
2
.1uF 10V
.1uF 10V
C86
MSB-4_P
MSB-4_M
MSB-5_P
MSB-5_M
MSB-6_P
MSB-6_M
MSB-7_P
MSB-7_M
2
2
.1uF 10V
VCM
48
2
.1uF 10V
1
NOT USED
NOT USED
C72
2
1
D0_P (LSB)
D0_M(LSB)
.1uF 10V
.1uF 10V
1
50
49
1
2
D0_M(LSB
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
1
D1_M
2
2
D0_P (LSB)
53
DRYP
DRYM
DX_P (MSB)
DX_M (MSB)
DX_P (MSB-1)
DX_M (MSB-1)
DX_P (MSB-2)
DX_M (MSB-2)
DX_P (MSB-3)
DX_M (MSB-3)
DX_P (MSB-4)
DX_M (MSB-4)
DX_P (MSB-5)
DX_M (MSB-5)
DVDD
DGND
DX_P (MSB-6)
DX_M (MSB-6)
DX_P (MSB-7)
DX_M (MSB-7)
C80
1
ADS5463
D1_P
AVDD
GND
AVDD
GND
AVDD
GND
AVDD
GND
RESERVED1
GND
AVDD
GND
RESERVED2
GND
AVDD_X
GND
AVDD_X
GND
AVDD_X
GND
5V_AVDD
ADS5444
54
C93
.1uF
10V
5V_AVDD
J20 CONFIGURATION
ADS5444: CONNECT TO 5V
ADS5463/74: CONNECT TO 3.3V
GND
J21
J21 DEFAULT: CONNECT TO GND
14
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CONN_QTH_30X2-D-A
3.3V_DVDD
L3
1
OVRP
OVRM
2
68 @ 100MHz
1
RED
+
C82
1uF
10V
2
J8
GND
C24
33UF
10V
2
3.3VD_IN
1
J7
DVDD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
MSB_P
MSB_M
MSB-1_P
MSB-1_M
MSB-2_P
MSB-2_M
BLK
MSB-3_P
MSB-3_M
GND
MSB-4_P
MSB-4_M
3.3V_AVDD
1
2
68 @ 100MHz
DRYP
DRYM
1
RED
C38
+ 10V
33UF
1uF
10V
MSB-6_P
MSB-6_M
C85
1uF
10V
1
+
5VA_IN
2
2
C37
33UF
10V
GND
1
MSB-7_P
MSB-7_M
BLK
J12
AVDD
C87
2
J9
GND
2
3.3VA_IN
MSB-5_P
MSB-5_M
L9
1
J14
DVDD
MSB-8_P
MSB-8_M
5V_AVDD
MSB-9_P
MSB-9_M
L5
1
2
68 @ 100MHz
MSB-10_P
MSB-10_M
RED
MSB-11_P
MSB-11_M
+VCC
+VCC_IN
MSB-12_P
MSB-12_M
L4
1
2
68 @ 100MHz
RED
+
C29
33UF
10V
2
J19
GND
MSB-13_P
MSB-13_M
1
J18
+VCC
J5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
G2
G4
G6
G8
G1
G3
G5
G7
BLK
GND
GND
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Schematics
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CONN_QSH_30X2-D-A
D0_M
D0_P
D2_P
D2_M
D4_P
D4_M
D6_P
D6_M
FCLK_P
FCLK_M
D10_P
D10_M
D12_P
D12_M
1
D3_M
D3_P
R12
100
2
D4_M
D4_P
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
D6_M
D6_P
D5_M
D5_P
D7_M
D7_P
D7_M
D7_P
DCLK_M
DCLK_P
D11_M
D11_P
D13_M
D13_P
D15_M
D15_P
R13
100
R14
100
R16
100
R15
100
FCLK_M
FCLK_P
D9_M
D9_P
D10_M
D10_P
D11_M
D11_P
D12_M
D12_P
1
1
1
1
3
4
D3_M
D3_P
D9_M
D9_P
1
1
2
D5_M
D5_P
DCLK_M
DCLK_P
1
R8
100
D1_M
D1_P
R17
100
D13_M
D13_P
2
2
2
2
2
2
R7
100
2
R6
100
2
2
R5
100
1
1
1
D14_P
D14_M
R11
100
2
2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
D0_P
D0_M
R10
100
2
R9
100
J2
HEADER 27x2
1
1
1
1
D2_M
D2_P
R4
100
2
R3
100
2
R2
100
2
2
R1
100
1
1
1
D1_M
D1_P
D14_M
D14_P
D15_M
D15_P
16
ADS5444/63/74-SP Evaluation Module Manual
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4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
J1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
G2
G4
G6
G8
G1
G3
G5
G7
SLAU457A – October 2012 – Revised September 2013
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
Bill of Materials
www.ti.com
5
Bill of Materials
ITEM
(1)
(2)
(3)
QUANTITY
DESIGNATOR
1
23
C3, C55, C56, C57, C59, C60,
C61, C62, C63, C64, C65, C66,
C72, C78, C79, C80, C81, C83,
C84, C86, C91, C92, C93
VALUE
DESCRIPTION
PKG/CASE
MANUFACTURER
PART NUMBER
0.1 uF
10%, 10V
0402
Panasonic
ECJ-0EB1A104K
2
4
C24, C29, C37, C38
33 uF
20%, 10V
TANT_B
Epcos Inc
B45196H2336M209
3
1
C54
0.1 uF
10%, 10V
0603
Kemet
C0603C104K8RACTU
4
2
C58, C74
0.1 uF
10%, 16V
0603
Panasonic
ECJ-1VB1C104K
5
4
C70, C71, C89 ,C90
1000 pF
10%, 50V
0402
Panasonic
ECJ-0EB1H102K
6
1
C75
39 pF
5%, 50V
0402
Panasonic
ECJ-0EC1H390J
7
2
C76, C77
1 uF
10%, 10V
0603
Panasonic
ECJ-1VB1A105K
8
3
C82, C85, C87
1 uF
20%, 10V
0402
Panasonic
ECJ-0EB1A105M
9
2
JP3, JP4
0Ω
Jumper 1x3 SMT
0603
See
10
1
J5
Data connector, QTH_30X2-D-A
Samtec
QTH-060-02-F-D-A
11
4
J7, J12, J14, J18
Red banana jack, THVT, 500 dia
Allied Electronics
ST-351A
12
3
J8, J9, J19
Black banana jack, THVT, 500 dia
Allied Electronics
ST-351B
13
3
J10, J11, J17
SMA_END_RND, RECP 250x250
Johnson Components
142-0711-821
14
1
J20
0Ω
SJP3 jumper
0603
See
(2)
15
1
J21
0Ω
SJP3 jumper
0603
See
(3)
16
4
L3, L4, L5, L9
68 @ 100MHz
1206
Panasonic
EXC-ML32A680U
17
1
L7
0Ω
5%, 1/4W
0603
Panasonic
ERJ-3GEY0R00V
18
2
L10, L11
470 nH
5%
0604
Murata
LQW18ANR47J00D
19
1
L12
18 nH
5%
0402
Murata
LQW15AN18NJ00D
20
1
R6
49.9 Ω
1%, 1/10W
0603
Panasonic
ERJ-3EKF49R9V
21
2
R7, R33
237 Ω
1%, 1/16W
0402
Panasonic
ERJ-2RKF2370X
22
1
R8
10 kΩ
1%, 1/16W
0402
Panasonic
ERJ-2RKF1002X
23
2
R14, R15
49.9 Ω
1%, 1/16W
0402
Panasonic
ERJ-2RKF49R9X
24
2
R17, R18
39 Ω
1%, 1/10W
0603
Panasonic
RC0603FR-0739RL
25
2
R19, R20
10 Ω
1%, 1/16W
0603
Panasonic
ERJ-3EKF10R0V
26
2
R23, R24
0Ω
5%, 1/8W
0805
Panasonic
ERJ-6GEY0R00V
27
3
R30, R31, R32
0Ω
5%, 1/8W
0603
Panasonic
ERJ-3GEY0R00V
28
1
TP1
Test point, black, THVT 100 RND
Keystone
5001
29
1
TP2
Test point, white, THVT 100 RND
Keystone
5002
30
1
T1
WBC4-1W
XFMR_WBC4-1W
Coilcraft
WBC4-1WL
31
2
T3, T5
ETC1-1-13
XFMR_WBC4-1W
Macom
ETC1-1-13
32
1
T4
WBC2-1W
XFMR_WBC4-1W
Coilcraft
WBC2-1TL
(1)
Short pins 2 and 3 for both, JP3 and JP4 using a 0-Ω resistor.
Connect middle pin to 5 V for J20 using a 0-Ω resistor for the ADS5444EVM-CVAL and to 3.3 V for the ADS5463/74EVM-CVAL.
Connect middle pin to ground for J21 using a 0-Ω resistor.
SLAU457A – October 2012 – Revised September 2013
Submit Documentation Feedback
ADS5444/63/74-SP Evaluation Module Manual
Copyright © 2012–2013, Texas Instruments Incorporated
17
Bill of Materials
18
www.ti.com
ITEM
QUANTITY
33
1
U5
DESIGNATOR
ADS54xxHFG/EM
VALUE
DESCRIPTION
34
2
U6, U7
THS9000DRDR
RF amp IC
35
1
HREL003
PCB board
PKG/CASE
MANUFACTURER
PART NUMBER
CQFP_84_0.25Mil
Texas Instruments
ADS54xxHFG/EM
SON_DRD6
Texas Instruments
THS9000DRDT
Texas Instruments
ADS5474EVM-CVAL
Keystone Electronics
1827
B&F Fastener Supply
PMS 832 0038 PH
36
4
Legs, spacer, 5/8", #8-32, 0.187"
thru
37
4
Leg fastener screw, #8-32
panhead, 0.187" thru
38
0
C88
6.8 pF
0.25pF, 25V
0603
Panasonic
ECD-G0E6R8C
39
0
R21
200 Ω
1%, 1/16W
0402
Panasonic
ERJ-2RKF2000X
40
0
R25, R26
121 Ω
1%, 1/10W
0603
Panasonic
ERJ-3EKF1210V
ADS5444/63/74-SP Evaluation Module Manual
SLAU457A – October 2012 – Revised September 2013
Submit Documentation Feedback
Copyright © 2012–2013, Texas Instruments Incorporated
SLAU457A – October 2012 – Revised September 2013
Submit Documentation Feedback
ADS5444/63/74-SP Evaluation Module Manual
19
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS
Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions:
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims
arising from the handling or use of the goods.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from
the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO
BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF
MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH
ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
DAMAGES.
Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This
notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety
programs, please visit www.ti.com/esh or contact TI.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and
therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design,
software performance, or infringement of patents or services described herein.
REGULATORY COMPLIANCE INFORMATION
As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal
Communications Commission (FCC) and Industry Canada (IC) rules.
For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT,
DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer
use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency
interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will
be required to take whatever measures may be required to correct this interference.
General Statement for EVMs including a radio
User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and
power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local
laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this
radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and
unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory
authorities, which is responsibility of user including its acceptable authorization.
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the
equipment.
FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment
generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause
harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If
this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and
on, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
For EVMs annotated as IC – INDUSTRY CANADA Compliant
This Class A or B digital apparatus complies with Canadian ICES-003.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the
equipment.
Concerning EVMs including radio transmitters
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this
device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired
operation of the device.
Concerning EVMs including detachable antennas
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain
approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should
be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.
This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum
permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain
greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada.
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
l'utilisateur pour actionner l'équipement.
Concernant les EVMs avec appareils radio
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est
autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout
brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain
maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à
l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente
(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel
d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans
cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
【Important Notice for Users of EVMs for RF Products in Japan】
】
This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan
If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product:
1.
2.
3.
Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and
Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of
Japan,
Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this
product, or
Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with
respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note
that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan.
Texas Instruments Japan Limited
(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan
http://www.tij.co.jp
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
http://www.tij.co.jp
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
EVALUATION BOARD/KIT/MODULE (EVM)
WARNINGS, RESTRICTIONS AND DISCLAIMERS
For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished
electrical equipment and not intended for consumer use. It is intended solely for use for preliminary feasibility evaluation in
laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks
associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end
product.
Your Sole Responsibility and Risk. You acknowledge, represent and agree that:
1.
2.
3.
4.
You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug
Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees,
affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes.
You have full and exclusive responsibility to assure the safety and compliance of your products with all such laws and other applicable
regulatory requirements, and also to assure the safety of any activities to be conducted by you and/or your employees, affiliates,
contractors or designees, using the EVM. Further, you are responsible to assure that any interfaces (electronic and/or mechanical)
between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to
minimize the risk of electrical shock hazard.
Since the EVM is not a completed product, it may not meet all applicable regulatory and safety compliance standards (such as UL,
CSA, VDE, CE, RoHS and WEEE) which may normally be associated with similar items. You assume full responsibility to determine
and/or assure compliance with any such standards and related certifications as may be applicable. You will employ reasonable
safeguards to ensure that your use of the EVM will not result in any property damage, injury or death, even if the EVM should fail to
perform as described or expected.
You will take care of proper disposal and recycling of the EVM’s electronic components and packing materials.
Certain Instructions. It is important to operate this EVM within TI’s recommended specifications and environmental considerations per the
user guidelines. Exceeding the specified EVM ratings (including but not limited to input and output voltage, current, power, and
environmental ranges) may cause property damage, personal injury or death. If there are questions concerning these ratings please contact
a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the
specified output range may result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or
interface electronics. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the
load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures
greater than 60°C as long as the input and output are maintained at a normal ambient operating temperature. These components include
but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors which can be identified using the
EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during normal operation, please
be aware that these devices may be very warm to the touch. As with all electronic evaluation tools, only qualified personnel knowledgeable
in electronic measurement and diagnostics normally found in development environments should use these EVMs.
Agreement to Defend, Indemnify and Hold Harmless. You agree to defend, indemnify and hold TI, its licensors and their representatives
harmless from and against any and all claims, damages, losses, expenses, costs and liabilities (collectively, "Claims") arising out of or in
connection with any use of the EVM that is not in accordance with the terms of the agreement. This obligation shall apply whether Claims
arise under law of tort or contract or any other legal theory, and even if the EVM fails to perform as described or expected.
Safety-Critical or Life-Critical Applications. If you intend to evaluate the components for possible use in safety critical applications (such
as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, such as devices
which are classified as FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate
Assurance and Indemnity Agreement.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
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Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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