User's Guide
SBAU198A – April 2012 – Revised February 2016
ADS8028EVM-PDK
Figure 1. ADS8028EVM-PDK
This user's guide describes the characteristics, operation, and use of the ADS8028EVM-PDK. This
evaluation module and performance development kit (EVM-PDK) is an evaluation system for the
ADS8028, a 12-bit, 1-MSPS, 8-channel, successive approximation register (SAR) analog-to-digital
converter (ADC). The EVM-PDK allows evaluation of all aspects of the ADS8028 device.
This document includes an EVM QuickStart section, hardware and software details, bill of materials, and
schematic.
The following related documents are available through the Texas Instruments web site at
http://www.ti.com.
Table 1. EVM-Compatible Device Data Sheets
Device
Literature Number
ADS8028
SBAS549
OPA836
SLOS712
REF5025
SBOS410
ADCPro is a trademark of Texas Instruments.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola.
All other trademarks are the property of their respective owners.
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1
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1
2
3
4
5
Contents
EVM Overview ............................................................................................................... 3
EVM Setup.................................................................................................................... 4
ADS8028EVM Hardware Details .......................................................................................... 6
Using the ADS8028EVM-PDK with ADCPro ........................................................................... 11
Schematics and Bill of Materials ......................................................................................... 13
1
ADS8028EVM-PDK
List of Figures
2
3
4
5
6
7
8
9
10
......................................................................................................... 1
Jumper Locations and Default Settings ................................................................................... 4
Headers and Pin Numbers ................................................................................................. 6
Analog Input Header Schematic ........................................................................................... 7
Digital Interface Header Schematic ....................................................................................... 8
Power Header Schematic .................................................................................................. 9
EVM Voltage Reference Schematic ..................................................................................... 10
ADCPro: ADS8028EVM Panel ........................................................................................... 11
ADCPro: Channel Selection Tab ......................................................................................... 12
ADCPro: Controls Tab ..................................................................................................... 12
List of Tables
2
1
EVM-Compatible Device Data Sheets .................................................................................... 1
2
Related Documents.......................................................................................................... 3
3
Default Jumper Configurations ............................................................................................. 4
4
Critical Connections ......................................................................................................... 6
5
ADS8028EVM Bill of Materials
ADS8028EVM-PDK
..........................................................................................
14
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EVM Overview
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1
EVM Overview
The ADS8028EVM-PDK is designed to evaluate the ADS8028. The ADS8028 is a 12-bit, 8-channel,
multiplexed, SAR ADC, with a maximum throughput rate of 1 MSPS. The ADS8028 also offers an internal
2.5-V voltage reference and internal temperature sensor with 0.25°C resolution. The ADS8028EVM allows
access to every pin of the converter and makes it easy to connect the ADS8028 SPI™-compatible serial
interface to any host microprocessor or TI DSP based system with 1.8-V, 3.3-V, or 5-V logic capability.
The ADS8028EVM-PDK combines the ADS8028EVM daughtercard with the digital sensor processor
(DSP)-based MMB0 motherboard and ADCPro™ evaluation software for complete evaluation of the
ADS8028.
1.1
Features
ADS8028EVM Features
• Easy-to-use ADCPro evaluation software for Microsoft® Windows® operating systems
• Built-in analysis tools for ADCPro, including scope, FFT, and histogram displays
• Simple device operation with full control of single 16-bit control register
• Data collection to text files
• 1.8-V, 3.3-V, or 5-V logic compatible with 16-bit, 20-MHz SPI Interface
• Contains all support circuitry needed for the ADS8028:
– Voltage reference options: ADS8028 (2.5 V) internal reference, on-board REF5025 (2.5 V)
reference, or external reference
– Two on-board OPA836 (205-MHz unity-gain bandwidth / 1-mA quiescent current) ADC input drivers
– Power supplied by MMB0 motherboard
• Compatible with the TI modular EVM system
ADS8028EVM-PDK Features
The ADS8028EVM-PDK includes the ADS8028EVM board with the DSP-based MMB0 motherboard, that
can be used with ADCPro to quickly evaluate the device.
This manual covers the operation of the ADS8028EVM-PDK. Throughout this document, the abbreviation
EVM and the term evaluation module are synonymous with the ADS8028EVM.
Related Documentation from Texas Instruments
The related documents listed in Table 2 are available for download through the Texas Instruments web
site at www.ti.com.
Table 2. Related Documents
Device
Literature Number
ADS8028
SBAS549
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3
EVM Setup
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EVM Setup
This section is a quick guide to begin evaluating the ADS8028EVM with ADCPro.
2.1
Default Jumper Configuration
Figure 2 shows the location of jumpers on the EVM and their respective factory default settings.
Figure 2. Jumper Locations and Default Settings
Table 3 lists the jumpers on the ADS8028EVM and their factory default settings.
Table 3. Default Jumper Configurations
Jumper
Default Position
J-1
Open
Description
1.8-V logic not selected
J-3
Short
3.3-V logic selected (BVDD = 3.3 V)
J-5
Open
5-V logic not selected
J-CS
Pins 1-2 (Down)
MMB0 FSX pin connected to CS
J-REF
Pins 2-3 (Right)
Allows for external voltage reference input or internal voltage reference output
CAUTION
Only one of the digital interface jumpers (J-1, J-3, or J-5) should be shorted at a
time to prevent large reverse currents that could potentially damage voltage
regulators on the MMB0 motherboard.
4
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EVM Setup
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2.2
ADS8028EVM-PDK Kit Operation
To prepare to evaluate the ADS8028 with the ADS8028EVM-PDK, complete the following steps:
1. Verify the ADS8028EVM jumper settings from the factory as shown in Figure 2 and also listed in
Table 3.
2. Install ADCPro and the ADS8028EVM plug-in software. Complete hardware connections and driver
installation as per the ADCPro HW/SW Installation Manual. Use the following jumper settings on the
MMB0 to configure power with the external supply.
• MMB0 J12 → Short (power supplied to the MMB0 through MMB0 J2 jack)
• MMB0 J13A → Open (+VA supply is not used on the ADS8028EVM)
• MMB0 J13B → Short (power supplied to the ADS8028EVM through the MMB0 J5 header)
• No additional power connections are required
3. Plug the ADS8028EVM onto the MMB0 motherboard. The female portion of J-ANALOG, J-DIGITAL,
and J-POWER on the bottom of the EVM align with male connectors J7, J4, and J5 (respectively) on
the MMB0.
4. Connect the included USB cable to J1 on the MMB0 and to an unused USB port on the computer with
ADCPro installed.
5. Connect an external supply (using the included CA-2186 cable) to the MMB0.
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ADS8028EVM Hardware Details
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ADS8028EVM Hardware Details
Figure 3 shows the location of headers J-ANALOG, J-DIGITAL, and J-POWER and their assigned pin
numbers. The notation J-NAME. is used in this user's guide for identifying header pins. For example,
J-ANALOG.1 refers to pin 1 on the J-ANALOG header.
J-ANALOG.1
J-DIGITAL.1
2
Pin 1
2
3
4
3
4
5
6
5
6
7
8
7
8
9
10
9
10
11
12
11
12
13
14
13
14
15
16
15
16
17
18
17
18
19
20
19
20
J-POWER.1
2
4
6
8
10
Pin 1
Pin 1
3
5
7
9
Figure 3. Headers and Pin Numbers
Table 4 provides a quick summary of the connections required for operation of the ADS8028. The purpose
of the MMB0 motherboard is to provide power and SPI communication to the ADS8028EVM. Analog
inputs of interest must be applied to the ADS8028EVM by the user. For a complete list of connections and
pins, refer to the ADS8028EVM schematic in Section 5.2.
Table 4. Critical Connections
Function
Header and Pin
Pin Name
J-DIGITAL.7
FSX
SCLK
J-DIGITAL.3
CLKX
DIN
J-DIGITAL.11
DX
Data In
DOUT
J-DIGITAL.13
DR
Data Out
TM_BUSY
J-DIGITAL.15
INT
Busy output; high during temperature conversion
1.8V
J-POWER.7
+1.8VD
Digital interface supply (BVDD) (1)
3.3V
J-POWER.9
+3.3VD
Digital interface supply (BVDD) (1)
5.0V
J-POWER.10
+5VD
Digital interface supply (BVDD) (1)
Analog operation supply (AVDD)
CS
SPI
Power
Analog inputs
(1)
(2)
(3)
6
Description
Chip select; active low logic input
SCLK
5.0V (AVDD)
J-POWER.3
+5VA
GND
J-POWER.5 and
J-POWER.6
DGND and
AGND
Channels 0 and 1
J-ANALOG.1-4
—
Analog Inputs (Buffered) (3)
Channels 2 to 7
J-ANALOG.5-16
—
Analog Inputs (3)
Digital and Analog supply grounds (2)
Only one digital supply connection (BVDD) is required when evaluating the ADS8028EVM as a stand-alone board. Check that
the corresponding jumper (J-1, J-3, or J-5) is correctly selected to power the ADS8028 digital interface.
AGND and DGND are shorted on the ADS8028EVM.
All ADS8028 analog inputs are single-ended and connect between the even and odd pins on the J-ANALOG header. All odd
pins on J-ANALOG are connected to AGND.
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3.1
Analog Inputs
The ADS8028 provides eight single-ended input channels plus an internal temperature sensor. The eight
analog input channels to the ADS8028 (AIN0 to AIN7) are connected to J-ANALOG on the ADS8028EVM.
Channels 0 and 1 are buffered converter inputs. The OPA836 is configured as a unity-gain buffer on these
channels. Channels 2 to 7 connect directly to the converter with an option to add an RC filter before the
converter input. Figure 4 shows the EVM schematic portion of the analog inputs. All discrete resistors and
capacitors shown in Figure 4 are size 0603 and can be modified to adjust circuit gain and filtering. Note
that not all components shown in Figure 4 are installed and have values "NI" (not installed).
Optionally, the user can add an SMA connector at J-SMA and use an SMA input for channels 0 and 1 if
an SMA connection is more convenient. RS0 and RS1 resistors select the SMA input channel. If the SMA
input has a 50-Ω source impedance, R10 and other input resistors can be modified for impedance
matching, otherwise they can provide signal attenuation and input current limiting.
Figure 4. Analog Input Header Schematic
NOTE: All odd pins on J-ANALOG connect to GND. Therefore, all analog input connections can be
easily made across even and odd pin numbers (The channel 0 input connects to JANALOG.1-2, channel 1 input connects to J-ANALOG.3-4, etc.).
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Digital Control
The SPI digital control signals are applied directly to the J-DIGITAL header on the ADS8028EVM. When
using the ADS8028EVM-PDK (the combination of the ADS8028EVM, MMB0 motherboard, and ADCPro
software), these signals are supplied by the MMB0 motherboard through J4. If the ADS8028EVM is
instead evaluated as a stand-alone board, these signals must be supplied by another microcontroller or
processor according to the timing characteristics in the ADS8028 data sheet.
Figure 5 shows the schematic connections to the J-DIGITAL header. The CS signal can be routed to JDIGITAL.1 or J-DIGITAL.7 (default) through the J-CS jumper. Ensure that the J-CS jumper is positioned to
route CS to J-DIGITAL.7 (short pins J-CS.1-2) for proper SPI communication when using the
ADS8028EVM-PDK. Additionally, the S1 push-button switch allows the user to manually reset and powerdown the ADS8028 and OPA836 op amps on the ADS8028EVM while the button is held. When the button
is released, the ADS8028 powers up with default conditions.
Figure 5. Digital Interface Header Schematic
NOTE: By default, the J-CS jumper on the ADS8028EVM is shorted between pins J-CS.1-2. This
setting is required for proper SPI communication between the MMB0 motherboard and the
ADS8028.
8
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3.3
Power Supply
The ADS8028EVM requires two power-supply rails: one 5-V analog supply (AVDD) and a configurable
digital interface (BVDD). Three selectable voltages are available for the digital interface to make the EVM
compatible with different logic levels. Jumpers J-1, J-3, and J-5 on the ADS8028EVM select 1.8-V, 3.3-V,
or 5-V BVDD digital interface voltages, respectively. Refer to Table 3 for the ADS8028EVM jumper
functions and default settings. The default jumper settings of J-1 (open), J-3 (short), and J-5 (open) are
recommended when using the ADS8028EVM with the MMB0 3.3-V logic.
Power rails are supplied to the ADS8028EVM through the J-POWER header. If the ADS8028EVM is being
evaluated as a stand-alone board, the user must supply power to the J-POWER header by direct
connections to a power supply. Otherwise, the MMB0 motherboard supplies the ADS8028EVM with power
through J-5 when the ADS8028EVM daughtercard is mounted on the MMB0. Check the MMB0 jumper
settings listed in the ADS8028EVM-PDK Kit Operation section if the ADS8028EVM is not receiving power
when connected to the MMB0 motherboard. Figure 6 shows a schematic of J-POWER header
connections on the ADS8028EVM.
Figure 6. Power Header Schematic
CAUTION
Do not apply voltages that the exceed the absolute maximum ratings of the
installed components. The absolute maximum supply voltage of the OPA836
limits the maximum analog supply voltage of the ADS8028EVM to 5.5 V. The
digital supply voltage should not exceed the analog supply voltage.
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Voltage Reference
The ADS8028EVM allows the user flexibility to select different voltage reference sources for the ADS8028.
Options include the:
• ADS8028 internal 2.5-V voltage reference,
• Onboard REF5025 2.5-V reference, or
• External reference source
When the ADS8028 powers up, the internal 2.5-V reference is selected as the reference source by
default. To use an external reference source, the internal voltage reference must be disabled by
performing a serial interface write to the ADS8028 control register to update bit 2. When using an external
source, shorting pins J-REF.1-2 uses the REF5025 external 2.5-V reference. If a reference voltage other
than 2.5 V is needed, the REF5025 can be replaced with any other reference in the REF50xx family.
Shorting pins J-REF.2-3 connects J-ANALOG.20 to the ADS8028 reference input. This short allows the
user to output the internal ADS8028 voltage reference to another circuit or allows a external reference
voltage to be applied to the ADS8028 reference input when the internal reference is disabled. The
allowable voltage range for an external voltage reference is 1 V to AVDD (5 V when the ADS8028EVM is
used with the MMB0).
Figure 7. EVM Voltage Reference Schematic
CAUTION
The user should avoid connecting any external voltage reference to the
ADS8028 before a serial write to the ADS8028 control register disables the
internal reference source. Providing an external source prior to this
communication draws additional current from the external source. The
ADS8028 internal protection circuitry limits this current to 20 mA.
10
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4
Using the ADS8028EVM-PDK with ADCPro
This section covers the use of the ADS8028EVM-PDK plug-in for ADCPro. For general ADCPro software
use and instructions, refer to the ADCPro User's Guide.
The ADS8028EVM-PDK plug-in for ADCPro provides complete control over all ADS8028 settings. It
consists of a tabbed interface (see Figure 8), with different functions available on each tab. The tabs are:
• Channel Selection
• Controls
• About
The ADS8028EVM settings can be adjusted when not acquiring data. During acquisition, all controls are
disabled and settings may not be changed. When a setting is changed on the ADS8028EVM plug-in, it
takes effect immediately. The effect of some settings, such as the Channel Selection, are not detected
until the user starts acquiring data from the ADS8028. The option to acquire data is disabled until both an
EVM plug-in and Test plug-in have been loaded from the respective drop-down file menus.
ADS8028EVM settings correspond to settings described in the ADS8028 data sheet.
4.1
Top-Level Controls
The ADCPro top-level controls for the ADS8028EVM-PDK plug-in include the sample rate and standby
controls. The Sample Rate indicator, in the upper right corner of the plug-in interface, is always visible and
can be modified by the user by typing in a different value. The Standby control, in the lower left corner,
places the ADS8028 in standby mode when pressed. The user must exit standby mode to make the data
acquisition option available again. The top-level controls are highlighted in Figure 8.
Figure 8. ADCPro: ADS8028EVM Panel
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Channel Selection Tab
The ADS8028 can acquire data from one to eight channels, sequentially. The Channel Select tab provides
the control to select which channels are sampled. A channel is selected to be sampled if a check mark is
seen in the box corresponding to the channel number. Channels are listed sequentially, starting with
channel 0 (AIN0) at the top of the list and channel 7 (AIN7) at the bottom. Figure 9 shows where to select
channels in the Channel Select tab.
Figure 9. ADCPro: Channel Selection Tab
NOTE: If multiple channels are selected for acquisition, then each channel is sampled at a slower
rate, given by the sampling rate divided by the number of channels selected for acquisition.
4.3
Controls Tab
The Controls tab allows for reference source selection and operation of the ADS8028 internal temperature
sensor. Figure 10 highlights the controls the user can modify on the Controls tab.
Figure 10. ADCPro: Controls Tab
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The Reference Source control selects between the ADS8028 internal voltage reference (INT) and an
external voltage reference source (EXT). Selecting EXT disables the internal voltage reference and allows
the user to specify the applied reference voltage in the Reference Voltage indicator to display the correct
voltage output values.
The Temperature Averaging control configures the ADS8028 to average eight temperature
measurements.
The Read Temp button returns the output of the internal ADS8028 temperature sensor reading. The
output code is displayed in the Internal Temperature Data indicator and the corresponding temperature
value in degrees Celsius is displayed in the Internal Temperature indicator.
4.4
About Tab
The About tab provides information on the EVM hardware and software versions.
The plug-in version is the software version of the ADCPro plug-in. The firmware version is the firmware
version loaded and running on the processor.
5
Schematics and Bill of Materials
A complete schematic for the ADS8028EVM is included in this user's guide. Refer to Table 5 for a bill of
materials. Gerber files are available on request. Please e-mail support@ti.com or E2E Community Forums
and ask for details on how to receive the files.
5.1
Bill of Materials
NOTE: All components should be compliant with the European Union Restriction on Use of
Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or
RoHS. Verify that purchased components are RoHS-compliant. (For more information about
TI's position on RoHS compliance, see the Design Support section at http://www.ti.com.)
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Schematics and Bill of Materials
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Table 5. ADS8028EVM Bill of Materials
14
Item No.
Qty
Value
1
1
—
2
2
430 pF
3
5
1 µF
4
3
10 µF
5
0
—
6
2
7
Ref Des
Description
Manufacturer
Part Number
Printed Circuit Board, 3.2 In x 1.7 In x 0.062 In
Any
6544351
CIN0, CIN1
Capacitor, C0G Ceramic, 50V, 5%, 0603
Murata
GRM1885C1H431JA01D
C1-C3, C12, C13
Capacitor, X7R Ceramic, 25V, 10%, 0603
Murata
GRM188R71E105KA12D
C4, C5, C14
Capacitor, X7R Ceramic, 25V, 10%, 1206
Taiyo Yuden
TMK316B7106KL-TD
C6, C8, C11, CIN2-CIN7
Not Installed
—
—
0.1 µF
C7, C10
Capacitor, X7R Ceramic, 25V, 10%, 0603
Murata
GRM188R71E104KA01D
1
47 pF
C9
Capacitor, C0G Ceramic, 50V, 5%, 0603
Murata
GRM1885C1H470JA01D
8
0
—
C15
Not Installed
—
—
9
3
—
J-1, J-3, J-5
CONN HEADER 2POS .100" SGL GOLD
Samtec
TSW-102-07-L-S
10
2
—
J-ANALOG(A), J-DIGITAL(A)
CONN HEADER 20POS .100" SMD TIN
Samtec
TSM-110-01-T-DV-P
11
2
—
J-ANALOG(B), J-DIGITAL(B)
CONN RECPT 20POS .100" SMT GOLD
Samtec
SSW-110-22-F-D-VS-K
12
1
—
J-POWER(A)
CONN HEADER 10POS .100" DBL SMD
Samtec
TSM-105-01-T-DV-P
13
1
—
J-POWER(B)
CONN RECPT 10POS .100" SMT GOLD
Samtec
SSW-105-22-F-D-VS-K
14
2
—
J-CS, J-REF
CONN HEADER 3POS .100" SGL GOLD
Samtec
TSW-103-07-L-S
15
0
—
J-SMA
Not Installed
—
—
16
2
24.9 Ω
RIN0, RIN1
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-0724R9L
17
2
2.7 kΩ
RE3, RE4
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-072K7L
18
5
47 Ω
R1-R5
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-0747RL
19
1
10 kΩ
R6
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-0710KL
20
2
100 Ω
R7, R8
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-07100RL
21
14
0Ω
R9, R12, R17, R19-R21,
RIN2-RIN7, RS0, RE1
Resistor, Chip, 1/10W, < 0.05Ω, 0603
Yageo
RC0603JR-070RL
22
0
—
R10, R11, R16, RE2, RS1
Not Installed
—
—
23
1
1Ω
R18
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-071RL
24
2
2 kΩ
R13, R15
Resistor, Chip, 1/10W, 1%, 0603
Panasonic
ERJ-3EKF2001V
25
1
1 kΩ
R14
Resistor, Chip, 1/10W, 1%, 0603
Yageo
RC0603FR-071KL
26
1
—
S1
Tactile Switch, 6x6 mm, Surface Mount
TE Connectivity
FSM4JSMATR
27
1
—
U1
IC, ADC, SAR, 12-Bit, 1 MSPS, 8-Channel, RTJ-20
Texas Instruments
ADS8028IRTJT
28
2
—
U2, U3
IC, OPAMP, VFB, RRO, 205MHZ, SOT23-6
Texas Instruments
OPA836IDBVT
29
1
—
U4
IC, Precision Voltage Reference, 2.5V, SO-8
Texas Instruments
REF5025AID
30
1
—
U5
IC, EEPROM, 256KBIT, 400KHZ, TSSOP-8
Microchip
Technology
24AA256-I/ST
31
11
—
—
Shunt, 100-mil, Black
3M
969102-0000-DA
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4
3
2
1
EXT_REF
Bipolar Input
-2V -> +2V
TRIM 5
C13
1u
1u
A
VOUT 6
3 TEMP
NC 7
2 VIN
4 GND
DNC 8
U4
REF5025AID
1 DNC
C12
AVDD
Ground unused channels with
jumper to avoiding floating inputs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J-ANALOG
Analog Connector
Signal Pin #
AGND
1
A0+
2
AGND
3
A1+
4
AGND
5
A2+
6
AGND
7
A3+
8
AGND
9
A4+
10
AGND
11
A5+
12
AGND
13
A6+
14
VCOM
15
A7+
16
AGND
17
REF18
AGND
19
REF+
20
J-SMA
SMA Input
Single-Ended Input
0.1V* -> +2.5V
0
10u
C14
RIN7 0
NI
RS0
RS1
R18 1
C6
NI
NI
NI
R11
NI
3
NI
NI
CIN3
RIN2 0
CIN4
RIN3 0
R16 NI
J-REF
REF5025
1
INT/EXT
2
VS-
-
+
VS+
NI
NI
CIN2
C11
C15
NI
R17 0
1
OUT
PD
AVDD
C8
1
OUT
PD
R12 0
R19 0
OPA836IDBV
4
U3
C10
0.1u
VS-
-
+
VS+
5
AVDD
6
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
/PD_/RST
/PD_/RST
ADS8028EVM-PDK
B
NI
Selecting "INT/EXT":
- Outputs internal reference or
- Inputs an external reference
Optional Filter
EXT_REF
3
Reference Selector
NI
CIN5
RIN4 0
Reference
CIN6
RIN5 0
47p
C9
C7
0.1u
OPA836IDBV
4
U2
0.25V -> +2.25V
AVDD
CIN7
RIN6 0
R14 1k
R9 0
R10 NI
R13 2k
R15 2k
VREF
RIN1 24.9
RIN024.9
430p
CIN0
AIN0
C
430p
CIN1
AIN1
Analog Inputs
C4
10u
C5
10u
BVDD
Connect analog &
digital grounds
AVDD
AIN1
AIN0
4 AIN6
AIN6
BVDD Selector
Power
U1
ADS8028RTJ
C2 1u
1
6
AGND
8
+5VD
D
10
+3.3VD 9
VD1
+1.8VD 7
4
5
-5VA
DGND
2
3
-VA
+5VA
+VA
Power Connector
Signal Pin #
VREF
Short ADC's
AGND & BGND
5 AIN7
3 AIN5
AIN5
AIN7
2 AIN4
1 AIN3
AIN4
AIN3
Thermal PAD
(NOT A PIN)
GND 21
2
6
5
D
AIN2
AIN2 20
6 AGND
2
AIN0
AIN0 18
8 NC
C
2
/PD_/RST
PD-RST 17
9 DGND
B
3
2
DVDD 16
10 AVDD
A
J-POWER
2
J-1
1
J-5
1
+5V Logic
J-3
1
+1.8V Logic
Copyright © 2012–2016, Texas Instruments Incorporated
+3.3V Logic
SBAU198A – April 2012 – Revised February 2016
Submit Documentation Feedback
1
2
3
4
5
6
7
8
9
10
AIN1
AIN1 19
7 REF
VREF
Engineer
C1
1u
R5 47
R4 47
R3 47
R2 47
R1 47
Edge Damping
(optional)
DOUT
SCLK
/CS
TM_BUSY
DIN
Christopher Hall
E
Filename
Date
C
Size
Title
Remove R20and connect ammeter
to measure analog power consumption
AVDD
CS 11
TM_BUSY 12
DIN 13
DOUT 14
SCLK 15
C3
1u
Remove R10 and connect ammeter
to measure digital power consumption
BVDD
E
S1
SW_FSM4JSMA
R8 100
BVDD
GPIO0
DOUT
DIN
SCLK
SCL 6
SDA 5
3 A2
WP 7
4 VSS
VCC 8
2 A1
U5
24AA256-I/ST
SDA
TM_BUSY
SCL
1 A0
RE3
2.7k
ADS8028_A.sch
SCL
SDA
Sheet
F
1
1
Hall
Rev
A
1/10/2012
of
Drawn byChristopher
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J-DIGITAL
RE4
2.7k
ADS8028 EVM Schematic
June 27, 2011
Number
FSX
1
EEPROM
2
Texas Instruments
RE2
NI
BVDD
/CS
Digital Connector
Signal Pin #
CNTL
1
GPIO0
2
CLKX
3
DGND
4
CLKR
5
GPIO1
6
FSX
7
GPIO2
8
FSR
9
DGND
10
DX
11
GPIO3
12
DR
13
GPIO4
14
*INT
15
SCL
16
TOUT
17
DGND
18
GPIO5
19
SDA
20
Digital Interface
/CS Selector
(MMB0 uses "FSX" for "/CS")
CNTL
/PD_/RST
F
* Limited by op amp output swing
NOTES:
3
R210
R20 0
R6 10k
R7 100
J-CS
4
3
2
1
5.2
RE1 0
www.ti.com
Schematics and Bill of Materials
Schematic
15
Revision History
www.ti.com
Revision History
Changes from Original (April 2012) to A Revision .......................................................................................................... Page
•
Replaced reference of adapter to external supply in two places in the ADS8028EVM-PDK Kit Operation section.
........
5
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
16
Revision History
SBAU198A – April 2012 – Revised February 2016
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Copyright © 2012–2016, Texas Instruments Incorporated
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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Products
Applications
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