User's Guide
SBAU218A – April 2014 – Revised October 2014
ADS8350EVM-PDK
ADS8350EVM-PDK
This user's guide describes the characteristics, operation and use of the ADS8350EVM performance
demonstration kit (PDK). This kit is an evaluation platform for the ADS8350, dual-channel, 16-bit,
simultaneous sampling, successive approximation register (SAR) analog-to-digital converter (ADC) that
supports pseudo-differential analog inputs. This EVM eases the evaluation of the ADS8350 device with
hardware and software for computer connectivity through a universal serial bus (USB). This user's guide
includes complete circuit descriptions, a schematic diagram, and a bill of materials.
Throughout this document, the terms demonstration kit, evaluation board, evaluation module are
synonymous with the ADS8350EVM-PDK.
The following related documents are available through the Texas Instruments web site at
http://www.ti.com.
Related Documentation
Device
Literature Number
ADS8350
SBAS580
REF5025
SBOS410
OPA2350
SBOS099
OPA376
SBOS432
OPA2836
SLOS712
TPS3836E18
SLVS292
TPS7A4700
SBVS204
REG71055
SBAS221
Windows XP, Windows 7, Windows 8, Excel are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola Inc.
I2C is a trademark of NXP Semiconductors.
All other trademarks are the property of their respective owners.
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1
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7
Contents
Overview ...................................................................................................................... 3
EVM Analog Interface ....................................................................................................... 3
Digital Interface .............................................................................................................. 7
Power Supplies .............................................................................................................. 8
ADS8350EVM-PDK Initial Setup .......................................................................................... 9
ADS8350EVM-PDK Kit Operation ....................................................................................... 16
Bill of Materials, PCB Layout, and Schematics......................................................................... 25
List of Figures
30
.................................................................... 4
Bipolar Input Signal Configuration ......................................................................................... 5
Unipolar Input Signal Configuration ....................................................................................... 5
REFIN_A and REFIN_B Reference Connections ...................................................................... 6
ADS8350EVM Default Jumper Settings .................................................................................. 9
Bottom View of Simple Capture Card Board with microSD Memory Card Installed .............................. 11
Bottom View of ADS8350EVM Rev B with microSD Card Installed ................................................. 11
Connecting ADS8350EVM Board to Simple Capture Card Controller Board ...................................... 12
LED Indicators on the Simple Capture Card Board.................................................................... 12
Welcome Screen and Destination Directory Screens ................................................................. 13
License Agreement and Start Installation Screens .................................................................... 13
Progress Bar and Installation Complete Screens ...................................................................... 14
Windows 7 Driver Installation Warning .................................................................................. 14
Simple Capture Card Device Driver Installation ........................................................................ 15
Simple Capture Card Device Driver Completion ....................................................................... 15
GUI Display Prompt ........................................................................................................ 16
Open the ADS8350EVM Settings Page ................................................................................ 17
ADS8350EVM Settings Page ............................................................................................ 17
Bipolar or Unipolar Signal Jumper Settings Description on the GUI ................................................ 18
Open the Data Monitor page on the GUI .............................................................................. 18
Data Monitor Page ......................................................................................................... 19
Saving Data to a Text File ................................................................................................ 20
FFT Performance Analysis Page ......................................................................................... 21
Histogram Analysis Page.................................................................................................. 23
Open the GUI Settings page ............................................................................................. 24
Set Capture Mode to SDCC Interface While Using the EVM Hardware ........................................... 24
ADS8350EVM PCB: Top Layer .......................................................................................... 27
ADS8350EVM PCB: Ground Layer ...................................................................................... 27
ADS8350EVM PCB: Power Layer ....................................................................................... 28
ADS8350EVM PCB: Bottom Layer ...................................................................................... 28
1
JP1 and JP2: Analog Interface Connections ............................................................................. 4
2
SMA Analog Interface Connections ....................................................................................... 4
3
Connector J6 Pinout ......................................................................................................... 7
4
Power-Supply Jumpers
5
Default Jumper Configuration .............................................................................................. 9
6
ADS8350EVM Bill of Materials
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ADS8350EVM Analog Interface Input Connections
List of Tables
2
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ADS8350EVM-PDK
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25
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Overview
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Overview
The ADS8350EVM-PDK is a platform for evaluation of the ADS8350 analog-to-digital converter (ADC).
The evaluation kit combines the ADS8350EVM board with a simple capture card controller board. The
simple capture card controller board consists of a TI Sitara embedded microcontroller (AM3352) and a
field programmable gate array (FPGA). The simple capture card controller board provides an interface
from the EVM to the computer through a universal serial bus (USB) port. The included software
communicates with the simple capture card controller board platform, and the simple capture card board
provides the power and digital signals used to communicate with the ADS8350EVM board. These
demonstration kits include the ADS8350EVM board, the simple capture card controller board, a microSD
memory card, and an A-to-micro-B USB cable.
1.1
ADS8350EVM Features
•
•
•
•
•
•
1.2
ADS8350EVM-PDK Features
•
•
•
•
•
2
Contains support circuitry as a design example to match ADC performance
3.3-V slave serial peripheral interface (SPI™)
Onboard 5-V analog supply
Onboard REF5025 (2.5-V) reference
Voltage reference buffering with OPA2350
Onboard OPA2836 (205-MHz BW, 1-mA quiescent current) ADC operational amplifier input drivers
USB port for computer interfacing
Easy-to-use evaluation software for Windows XP®, Windows 7®, Windows 8® operating systems
Data collection to text files
Built-in analysis tools including scope, FFT, and histogram displays
Complete control of board settings
EVM Analog Interface
The ADS8350 is a dual-channel, simultaneous-sampling ADC that supports pseudo-differential analog
inputs. Each channel of the ADS8350 uses a OPA2836 dual operational amplifier to drive the inputs of the
ADC; see Figure 1. The positive input terminals of each ADC are driven by the OPA836 operational
amplifier configured in the inverting configuration. The negative input terminals of each ADC are driven by
the OPA836 in the buffer configuration and biased at the 2.5-V, onboard reference voltage (+Vref). The
ADS8350EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow the EVM
to have input signals connected through coaxial cables. In addition, header connectors JP1 and JP2
provide a convenient way to connect input signals.
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EVM Analog Interface
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OPA836
Inverting Configuration
VCM
AIN_A
ADS8350
AVDD
+
SMA J1
AINP-A (Pin 15)
Header JP1.2
AINM-A (Pin 16)
JP7
OPA836 Buffer
Vref_A
OPA836
Inverting Configuration
VCM
SMA J2
AIN_B
AVDD
+
AINP-B (Pin 6)
Header JP2.2
AINM-B (Pin 5)
OPA836 Buffer
Vref_B
JP8
Figure 1. ADS8350EVM Analog Interface Input Connections
Table 1 summarizes the JP1 and JP2 analog interface connectors.
Table 1. JP1 and JP2: Analog Interface Connections
Terminal Number
Signal
Description
JP1.2
AIN_A
Channel A inverted input. The signal is routed through an
OPA836 in the inverting configuration.
JP2.2
AIN_B
Channel B inverted input. The signal is routed through an
OPA836 in the inverting configuration.
Table 2 lists the SMA analog inputs.
Table 2. SMA Analog Interface Connections
Terminal Number
4
Signal
Description
J1
AIN_A
Channel A inverted input. The signal is routed through an
OPA836 in the inverting configuration.
J2
AIN_B
Channel B inverted input. The signal is routed through an
OPA836 in the inverting configuration.
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2.1
Bipolar Input Signal Configuration
When jumpers JP9 and JP10 are closed, the inverting amplifier positive input is biased with +1.25 V. This
bias voltage is created by dividing the ADS8350EVM 2.5-V onboard reference by two. The bias voltage at
the input results in a 2.5-V offset at the amplifier output. In this configuration, apply a bipolar input signal
with 0-V common-mode voltage.
To keep the OPA836 distortion as low as possible, the input signal swing is limited from –2.3 V to +2.3 V,
as shown in Figure 2.
4.8 V
2.5 V
Bipolar Input Signal
1 k
+2.3 V
10
0.2 V
1 k
0V
AINP
5V
AIN_x
Å
±2.3 V
8200 pF
OPA836
JP9 / JP10 (CLOSED)
+1.25 V
+
10
+2.5 V
AINN
Figure 2. Bipolar Input Signal Configuration
2.2
Unipolar Input Signal Configuration
When jumpers JP9 and JP10 are open, the inverting amplifier positive input is biased with +2.5 V. This
bias voltage is created using the ADS8350EVM 2.5-V onboard reference. In this configuration, apply a
unipolar input signal with 2.5-V common-mode voltage. To keep the OPA836 distortion as low as possible,
the input signal swing is limited from +0.2 V to +4.8 V, as shown in Figure 3.
4.8 V
2.5 V
Unipolar Input Signal
1 k
4.8 V
10
0.2 V
1 k
2.5 V
AINP
5V
AIN_x
Å
0.2 V
8200 pF
OPA836
JP9 / JP10 (Open)
+2.5 V
+
10
+2.5 V
AINN
Figure 3. Unipolar Input Signal Configuration
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EVM Analog Interface
2.3
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ADS8350EVM Onboard Reference
The ADS8350 dual, simultaneous ADC operates with reference voltages Vref_A and Vref_B present on pins
REFIN_A and REFIN_B, respectively. The ADS8350EVM provides an onboard 2.5-V reference source,
REF5025 (U5), buffered with a dual OPA2350 amplifier and routed through jumpers JP5 and JP6. By
default, the EVM is set up with jumpers JP5 and JP6 installed, as shown in Figure 4.
5V
JP5 / JP6
2.5 V from
REF5025
OPA2350
A/B
1 k
REFIN-A / REFIN-B
+
0.22
0.22
1 µF
10 µF
10 µF
Figure 4. REFIN_A and REFIN_B Reference Connections
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3
Digital Interface
Socket strip connector J6 provides the digital I/O connections between the ADS8350EVM board and the
simple capture card board.
Table 3 summarizes the pinout for connector J6.
Table 3. Connector J6 Pinout
3.1
Terminal Number
Signal
J6.2, J6.10, J6.15, J6.16,
J6.18
GND
J6.4
EVM PRESENT
2
J6.11, J6.12
I C™ bus
J6.13
DVDD
J6.34
CS
Description
Ground connections
EVM present, active low
I2C bus; used only used to program the U7
EEPROM on the EVM board
3.3-V digital supply from simple capture card
controller board
Chip select, active low
J6.36
SCLK
J6.40
SDO_A
Serial interface clock
Serial data output for channel A
J6.42
SDO_B
Serial data output for channel B
Serial Peripheral Interface (SPI)
The ADS8350 digital output is available in SPI-compatible format, which makes interfacing with
microprocessors, digital signal processors (DSPs), and FPGAs easy. The ADS8350EVM offers 47-Ω
resistors between the SPI signals and connector J6 to aid with signal integrity. Typically, in high-speed
SPI communication, fast signal edges can cause overshoot; these 47-Ω resistors slow down the signal
edges in order to minimize signal overshoot.
3.2
I2C Bus for Onboard EEPROM
The ADS8350EVM has an I2C bus to communicate with the onboard EEPROM that records the board
name and assembly date. It is not used in any form by the ADS8350 converter.
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Power Supplies
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Power Supplies
The analog portion of the ADS8350EVM-PDK requires a 5-V supply. The ADS8350EVM-PDK is
configured at the factory using the onboard regulated analog 5-V supply (+VA); and an onboard 3.3-V
digital supply. Alternatively, set the AVDD analog supply voltage by connecting an external power source
through two-terminal connector J5. Table 4 lists the configuration details for P3.
Table 4. Power-Supply Jumpers
Terminal Number
Position
Shunt 2-3 (default)
JP12
JP11
Shunt 1-2
Open (default)
Closed
Function
Onboard 5-V AVDD analog supply selected
External 5-V AVDD connected through two-terminal
block J5
Open sets onboard AVDD supply to 5 V
Closed sets onboard AVDD supply to 5.2 V
CAUTION
The external AVDD supply applied to external two-terminal connector J5 must
not exceed 5.5 V or device damage may occur. The external AVDD supply
must be in the range of 5.0 V to 5.5 V for proper ADS8350EVM operation.
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ADS8350EVM-PDK Initial Setup
This section presents the steps required to set up the ADS8350EVM-PDK kit before operation.
5.1
Default Jumper Settings
A silkscreen plot detailing the default jumper settings is shown in Figure 5. Table 5 explains the
configuration for these jumpers.
Figure 5. ADS8350EVM Default Jumper Settings
Table 5. Default Jumper Configuration
Terminal Number
Default Position
JP1
Open
JP1.2 header connector to inverted channel A input
Switch Description
JP2
Open
JP1.2 header connector to inverted channel B input
JP3
N/A
JP3 not installed on PCB board
JP4
N/A
JP4 not installed on PCB board
JP5
Closed
Closed to connect onboard 2.5-V reference to REFIN_A
JP6
Closed
Closed to connect onboard 2.5-V reference to REFIN_B
JP7
Short 2-3
Short 2-3 connects AINM_A(-) to 2.5-V
JP8
Short 2-3
Short 2-3 connects AINM_B(-) to 2.5-V
JP9
Closed
Open for channel A unipolar input signals at SMA connector; closed for
channel A bipolar input signals at SMA connector.
JP10
Closed
Open for channel B unipolar input signals at SMA connector; closed for
channel B bipolar input signals at SMA connector.
JP11
Open
Open sets onboard AVDD to 5 V; closed sets onboard AVDD to 5.2 V.
JP12
Short 2-3
Short 2-3 selects onboard regulated AVDD supply; short 1-2 selects
external AVDD through J5.
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5.2
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Software Installation
This section presents the steps required to the install the software. Section 6 explains how to operate the
software to acquire data.
NOTE: The ADS8350EVM-PDK with ADS8350 PWB Board revision A includes (1) microSD card.
Ensure the microSD memory card included in the kit is installed in the microSD socket on the
back of the simple capture card board before connecting the EVM to the PC. Otherwise, as a
result of improper boot up, Windows cannot recognize the ADS8350EVM-PDK as a
connected device.
The ADS8350EVM-PDK with ADS8350 PWB Board revision B includes (2) microSD cards.
Ensure both microSD memory cards that contain the software are installed in the microSD
sockets on the back of the simple capture card board and on the back of ADS8350EVM
board respectively. Otherwise, as a result of improper boot up, Windows cannot recognize
the ADS8350EVM-PDK as a connected device.
Complete the following steps to install the software:
Step 1. Verify the microSD memory card(s) are installed:
• ADS8350EVM PWB revision A: This PDK kit version includes (1) microSD Card. Verify
the microSD memory card is installed on the simple capture card controller board
• ADS8350EVM PWB revision B: This PDK kit version includes (2) microSD Cards. Ensure
both microSD memory cards are installed in the microSD sockets on the back of the
simple capture card board and ADS8350EVM board respectively
Step 2. Verify jumpers are in the factory-default position and connect the hardware.
Step 3. Install the ADS8350EVM-PDK software.
Step 4. Complete the simple capture card device driver installation.
Each task is described in the following subsections.
5.2.1
Verify the microSD Memory Card is Installed on the Simple Capture Card Controller Board
The ADS8350EVM-PDK includes the microSD card(s) that contain the EVM software and simple capture
card controller board firmware required for the EVM operation.
NOTE: Ensure the microSD memory card that contains the software is installed in the microSD
socket (P6) on the back of the simple capture card board.
Figure 6 illustrates the bottom view of the simple capture card controller board with the
microSD card installed.
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Figure 6. Bottom View of Simple Capture Card Board with microSD Memory Card Installed
NOTE:
ADS8350EVM-PDK with ADS8350EVM PWB Board revision B (only):
This ADS8350EVM PWB version includes two (2) microSD cards. Ensure both microSD
memory cards are installed in the microSD sockets on the back of the simple capture card
board and on the back of the ADS8350EVM, as shown in Figure 6 and Figure 7 respectively.
Figure 7. Bottom View of ADS8350EVM Rev B with microSD Card Installed
The microSD cards are formatted from the factory with the necessary firmware files for the simple capture
card controller board to boot properly. In addition to the simple capture card firmware files (app and MLO
files), the microSD cards contain the ADS8350EVM-PDK software installation files inside the ADS8350
EVM V#.#.# folder. refers to the installation software version number, and increments with
software installer releases.
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Verify Jumpers are in the Factory-Default Position and Connect the Hardware
The ADS8350EVM-PDK includes both the ADS8350EVM and the simple capture card controller board;
however, the devices are shipped unconnected. Follow these steps to verify that ADS8350EVM-PDK kit is
configured and connected properly.
Step 1. Verify the microSD card is installed on the back of the simple capture card board; see
Figure 6.
Step 2. Verify the ADS8350EVM jumpers are configured; see Figure 5.
Step 3. Connect the ADS8350EVM board to the simple capture card controller board as Figure 8
shows.
Figure 8. Connecting ADS8350EVM Board to Simple Capture Card Controller Board
Step 4.
Step 5.
Connect the simple capture card controller board to the PC through the micro USB cable.
Verify that the LED D5 Power Good indicator is illuminated. Wait approximately ten seconds
and verify that diode D2 blinks, indicating that USB communication with the host PC is
functioning properly. Figure 9 shows the location of the LED indicators in the simple capture
card controller board.
Figure 9. LED Indicators on the Simple Capture Card Board
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5.2.3
Install the ADS8350EVM-PDK Software
The ADS8350 EVM V#.#.# software must be installed on the PC. This software supports the
ADS8350EVM-PDK. The user must have administrator privileges to install the EVM software. The
following steps list the directions to install the software.
1. Open Windows explorer and find the microSD memory card in the browser as a storage device.
2. Navigate to the ...\ADS8350 EVM Vx.x.x\Volume\ folder.
3. Run the installer by right-clicking the setup.exe and selecting Run as Administrator. This action installs
the EVM GUI software and the required simple capture card device driver components.
4. After the installer begins, a welcome screen displays. Click Next to continue.
5. A prompt appears with the destination directory; select the default directory under: ...\Program
Files(x86)\Texas Instruments\ADS8350evm\, as shown in Figure 10.
Figure 10. Welcome Screen and Destination Directory Screens
6. One or more software license agreements appear. Select I Accept the License Agreement and click
Next.
7. The Start Installation screen appears, as shown in Figure 11. Click Next.
Figure 11. License Agreement and Start Installation Screens
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8. A progress bar appears; this step takes a few minutes.
9. The progress bar is followed by an installation complete notice, as shown in Figure 12.
Figure 12. Progress Bar and Installation Complete Screens
5.2.4
Complete the Simple Capture Card Device Driver Installation
During installation of the simple capture card device driver, a prompt may appear with the Windows
security message shown in Figure 13. Select Install this driver software anyway to install the driver
required for proper operation of the software. The drivers contained within the installers are safe for
installation to your system.
Figure 13. Windows 7 Driver Installation Warning
NOTE: Driver installation prompts do not appear if the simple capture card device driver is installed
on your system previously.
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The following steps describe how to install the simple capture card device driver.
Step 1. Immediately after the ADS8350 EVM software installation is complete, prompts appear to
install the simple capture card device driver, as shown in Figure 14 and Figure 15
Step 2. A computer restart may be required to finish the software installation. If prompted, restart the
PC to complete the installation.
Figure 14. Simple Capture Card Device Driver Installation
Figure 15. Simple Capture Card Device Driver Completion
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ADS8350EVM-PDK Kit Operation
This section describes how to use ADS8350EVM-PDK and the ADS8350EVM software to configure the
EVM and acquire data.
6.1
About the Simple Capture Card Controller Board
The simple capture card controller board provides the USB interface between the PC and the
ADS8350EVM. The controller board is designed around the AM335x processor, a USB 2.0 high-speed
capability, 32-bit ARM core. The simple capture card controller board incorporates an onboard FPGA
subsystem and 256MB of onboard DDR SRAM memory.
The simple capture card controller board is not sold as a development board, and it is not available
separately. TI cannot offer support for the simple capture card controller` board except as part of this EVM
kit.
6.2
Loading the ADS8350EVM-PDK Software
The ADS8350 EVM software provides control over the settings of the ADS8350. Adjust the ADS8350EVM
settings when the EVM is not acquiring data. During acquisition, all controls are disabled and settings
cannot be changed.
Settings on the ADS8350EVM correspond to settings described in the ADS8350 product data sheet
(available for download at http://www.ti.com); see the product data sheet for details.
To load the ADS8350 EVM software, follow these steps:
Step 1. Make sure the EVM kit is configured and powered up as explained in Section 5.
Step 2. Start the ADS8350 EVM software. Go to Start → All Programs →Texas Instruments →
ADS8350 EVM and run the software by right-clicking ADS8350 EVM and selecting Run as
Administrator.
Step 3. Verify that the software detects the ADS8350EVM. The GUI identifies the EVM hardware that
is connected to the controller board and displays Loading the ADS8350evm Settings. After
the settings are loaded, ADS8350EVM GUI displays at the top of the GUI screen, as shown
in Figure 16.
Figure 16. GUI Display Prompt
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6.3
ADS8350EVM Settings
Configure the ADS8350EVM for evaluation. The ADS8350EVM Settings page explains in detail the analog
input connections available on the evaluation board. In order to configure the EVM analog input
connections, follow these steps:
1. Load the ADS8350EVM Settings page in the GUI. Hover the cursor over the red arrow at the leftcenter side of the GUI screen; a menu with different GUI pages appears. Click on ADS8350 EVM
Settings, as shown in Figure 17.
Figure 17. Open the ADS8350EVM Settings Page
2. The ADS8350 dual, simultaneous ADC requires reference voltages Vref_A and Vref_B present on pins
REFIN-A and REFIN_B, respectively. The ADS8350EVM provides an onboard 2.5-V reference source,
REF5025 (U5), buffered with a dual OPA2350 amplifier and routed through jumpers JP5 and JP6.
Therefore, jumpers JP5 and JP6 must be installed. Figure 18 shows the reference connections as
described on the ADS8350EVM Settings page of the GUI.
Figure 18. ADS8350EVM Settings Page
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3. Scroll down in the ADS8350EVM Settings page and find the ADS8350 Analog Inputs connections
descriptions on the GUI. The ADS8350EVM can be driven with a signal generator producing a bipolar
source signal centered on GND or a unipolar signal centered at +Vref / 2. Jumpers JP9 and JP10 are
installed when supporting a bipolar signal centered at GND. Jumpers JP9 and JP10 must be removed
when supporting a unipolar signal source signal centered at 2.5-V. Figure 19 shows jumpers JP9 and
JP10 on the ADS8350EVM Settings page of the GUI.
Figure 19. Bipolar or Unipolar Signal Jumper Settings Description on the GUI
6.4
Capturing Data with the ADS8350EVM-PDK
Access the Data Monitor page in the GUI to monitor data acquired by the ADS8350. This GUI page
displays the acquired data versus time. To access the Data Monitor page, hover the cursor over the red
arrow at the left center side of the GUI screen; a menu with different GUI pages appear. Click on the Data
Monitor option in the menu, as shown in Figure 20.
Figure 20. Open the Data Monitor page on the GUI
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Figure 21 shows the Data Monitor page of the EVM GUI. Configure the device sampling rate and capture
settings by using the Capture Settings portion of the Data Monitor page. The change in configuration
settings are executed immediately after pressing the Configure Device button. The following list describes
the different options available on the Data Monitor page.
No. of Samples— This option is used to select the number of samples captured in a block.
The number of samples captured in a block are contiguous. The drop-down menu is used to select
a data block in the range of 1024 samples to 1,048,576 samples per channel. This control provides
a drop-down list for values restricted to 2n, where n is an integer.
SCLK— This control sets the clock frequency used by the SPI interface to capture data.
By configuring the SCLK frequency, the data rate of the ADS8350 is configured. The
ADS8351EVM-PDK software supports SCLK frequencies of 24 MHz, 20 MHz, and 16.2 MHz.
These SCLK frequencies correspond to data rates of 750 kSPS, 625 kSPS, and 506.2 kSPS
respectively.
Device Status— This panel shows the current clock frequency and data rate of the ADS8350.
Figure 21. Data Monitor Page
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ADS8350EVM-PDK Kit Operation
6.4.1
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Data Collection to Text Files
The Data Monitor page of the GUI allows data to be saved in a tab-delimited text file format that can be
imported into Excel®, or other spreadsheet software tools. The text file contains the raw ADC data of both
channel A and channel B in decimal data format. Information such as the device name, date and time, the
sampling frequency, and number of samples of the data record are also stored. In order to save any data
captured by the EVM, click on the Save Data button and specify the file path and file name of the data file,
as shown in Figure 22.
Figure 22. Saving Data to a Text File
20
ADS8350EVM-PDK
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6.5
FFT Analysis
The Performance Analysis page in the GUI performs the fast fourier transform (FFT) of the captured data,
and displays the resulting frequency domain plots of channel A and channel B of the ADS8350. This page
also calculates key ADC dynamic performance parameters, such as signal-to-noise ratio (SNR), total
harmonic distortion (THD), signal-to-noise and distortion ratio (SINAD), and spurious-free dynamic range
(SFDR). Figure 23 shows the FFT performance analysis display. The FFT calculated parameters are
shown on the right side of the display.
Figure 23. FFT Performance Analysis Page
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ADS8350EVM-PDK Kit Operation
6.5.1
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FFT Analysis Settings and Controls
Sample Rate (kHz)— This field indicates the sampling frequency of the ADC data (kHz).
Samples (No.)— The FFT requires a time domain record with a number of samples that is a power of 2.
The Samples (#) drop-down menu provides a list of values that satisfy this requirement.
Fi Calculated— This field displays the frequency of the largest amplitude input signal computed from the
FFT data, typically the fundamental frequency.
Window— The window function is a mathematical function that reduces the signal to zero at the end
points of the data block.
In applications where coherent sampling cannot be achieved, a window-weighting function can be
applied to the data to minimize spectral leakage. The following opions are available:
• None (no window weighting function applied; use for coherent data)
• Hanning
• Hamming
• Blackman-Harris
• Exact Blackman
• Blackman
• Flat Top
• 4-Term Blackman-Harris
• 7-Term Blackman-Harris
• Low Sidelobe
For a more thorough discussion of windowing, refer to IEEE1241-2000.
Harmonics— This field sets the number of harmonics that are included in the FFT performance
calculations.
Leakage Bins— These fields provide for the removal of the unwanted frequency bins that may be the
result of noncoherent data sampling.
Set the Fundamental Leakage Bins and Harmonic Leakage Bins fields to the number of adjacent
bins on either side of the fundamental or harmonic frequencies to include the main frequency
power. The DC Leakage Bins field allows the number of frequency bins that are a result of the dc
portion of the measurement to be excluded from the calculations.
22
ADS8350EVM-PDK
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ADS8350EVM-PDK Kit Operation
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6.6
Histogram Analysis
Histogram testing is commonly used when characterizing ADCs. A histogram is merely a count of the
number of times a code has occurred in a particular data set. The Histogram Analysis page of the GUI
creates a histogram of the data of the acquired data set and displays it. Figure 24 shows the Histogram
Analysis page of the GUI.
Figure 24. Histogram Analysis Page
The DC Analysis table shown in Figure 24 displays several parameters of the captured data set:
• The StDev column displays the standard deviation of the data set. This value is equivalent to the RMS
noise of the signal when analyzing a dc data set.
• The Codes(pp) column shows the peak-to-peak spread of the codes in the data set; for a dc data set,
this range would be the peak-to-peak noise.
• The Mean column displays the average value of the data set.
• The ENOB(StDev) column displays the effective number of bits of the converter, as calculated from the
standard deviation or RMS noise.
• The Noise Free Bits column displays the effective bits of the converter when calculated using the peakto-peak noise.
6.7
Troubleshooting
If the ADS8350EVM software stops responding while the ADS8350EVM-PDK is connected, unplug the
USB cable from the EVM, unload the ADS8350EVM-PDK software, reconnect the ADS8350EVM-PDK to
the PC, and reload the ADS8350EVM software.
When initially setting up the ADS8350 GUI, the software detects the EVM hardware, and loads the
appropriate hardware settings. If the EVM hardware is not detected, the GUI defaults to the Capture
Mode: Software Debug mode of operation using a preloaded captured data file for demonstration
purposes.
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ADS8350EVM-PDK Kit Operation
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While using the EVM-PDK hardware for data acquisition, keep the GUI in the Capture Mode: SDCC
interface mode of operation. The GUI indicates the selected mode of operation on the top-right corner of
the GUI display. In order to select the simple capture card interface mode of operation, navigate to the
GUI Settings page and select the SDCC Interface option on the Capture Mode drop-down menu, as
shown in Figure 25 and Figure 26.
Figure 25. Open the GUI Settings page
Figure 26. Set Capture Mode to SDCC Interface While Using the EVM Hardware
24
ADS8350EVM-PDK
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Bill of Materials, PCB Layout, and Schematics
www.ti.com
7
Bill of Materials, PCB Layout, and Schematics
Table 6 lists the bill of materials. Section 7.2 provides the PCB layout for the ADS8350EVM. The
schematics for the ADS8350EVM are appended to the end of this user's guide.
7.1
Bill of Materials
NOTE: All components must be compliant with the European Union Restriction on Use of
Hazardous Substances (RoHS) Directive. Some part numbers may be either leaded or
RoHS. Verify that purchased components are RoHS-compliant.
Table 6. ADS8350EVM Bill of Materials
Item No.
Qty
Ref Des
1
11
C1, C20, C21, C39,
C41, C42, C43,
C44, C45, C46, C54
Vendor
Part Number
CAP, CERM, 10uF, 16V, +/-10%, X5R,
0805
Murata
GRM21BR61C106KE15L
2
11
C2, C5, C9, C10,
C12, C13, C14,
C15, C28, C30, C40
CAP, CERM, 1uF, 6.3V, +/-10%, X7R,
0603
Murata
GRM188R70J105KA01D
3
0
C3, C4, C7, C8,
C18, C19, C22, C23
Not Install
Not Install
Not Install
4
4
C6, C26, C27, C51
CAP, CERM, 10uF, 6.3V, +/-20%, X5R,
0603
TDK
C1608X5R0J106M
8
C11, C16, C17,
C29, C31, C48,
C52, C53
CAP, CERM, 0.1uF, 16V, +/-5%, X7R,
0603
AVX
0603YC104JAT2A6
C24, C25
CAP CER 8200PF 50V 5% NP0 0805
TDK
C2012C0G1H822J060AA
Murata
GRM188R61C225KE15D
TDK
GRM188R61C224KA88D
5
6
2
Description
7
2
C47, C50
CAP, CERM, 2.2uF, 16V, +/-10%, X5R,
0603
8
1
C49
CAP, CERM, 0.22uF, 16V, +/-10%, X5R,
0603
9
1
D1
DIODE ZENER 5.9V 250MW SOT23
NXP
Semiconductors
PLVA659A.215
10
2
J1, J2
Connector, TH, SMA
TE Connectivity
142-0701-201
On Shore
Technology Inc
ED555/2DS
11
1
J5
2 Terminal Block 3.5MM 2POS PCB
12
1
J6
SAMTEC, dual-row, right-angle, female,
latching
SAMTEC
ERF8-025-01-L-D-RA-L-TR
13
1
J7
Note: Connector Not Installed on PWB
RevA.
MOLEX connector for microSD card
Molex Inc
Note: Connector Not Installed on
PWB Rev. A
MOLEX 502570-0893
14
0
JP3, JP4
Header, TH, 100mil, 2x1, Gold plated,
230 mil above insulator
SAMTEC
TSW-102-07-G-S
15
7
JP1, JP2, JP5, JP6,
JP9, JP10, JP11
Header, TH, 100mil, 2x1, Gold plated,
230 mil above insulato
SAMTEC
TSW-102-07-G-S
16
3
JP7, JP8, JP12
Header, TH, 100mil, 3x1, Gold plated,
230 mil above insulator
SAMTEC
TSW-103-07-G-S
17
1
R3
RES, 0.22 ohm, 1%, 0.1W, 0603
Panasonic
Electronic
Components
ERJ-3RQFR22V
18
7
R4, R14, R16, R36,
R37, R89, R90
RES, 0 ohm, 5%, 0.1W, 0603
Vishay Dale
CRCW06030000Z0EA
19
2
R6, R7
RES, 100 ohm, 1%, 0.1W, 0603
Vishay Dale
CRCW0603100RFKEA
20
8
R9, R15, R31, R39,
R40, R41, R42, R43
RES, 47.0 ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-0747RL
21
8
R10, R12, R17,
R18, R20, R25,
R46, R47
Susumu
RG1608P-102-B-T5
22
2
R11, R13
RES, 1.00k ohm, 1%, 0.1W, 0603
Vishay Dale
CRCW06031K00FKEA
23
4
R21, R22, R23, R24
RES, 20.0k ohm, 1%, 0.1W, 0603
Vishay Dale
CRCW060320K0FKEA
24
2
R26, R27
RES, 1.00 ohm, 1%, 0.1W, 0603
Vishay Dale
CRCW06031R00FKEA
RES, 1.00k ohm, 0.1%, 0.1W, 0603
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25
Bill of Materials, PCB Layout, and Schematics
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Table 6. ADS8350EVM Bill of Materials (continued)
Item No.
26
Qty
Ref Des
Description
Vendor
Part Number
ERJ-3RSFR10V
25
2
R28, R29
RES, 0.1 ohm, 1%, 0.1W, 0603
Panasonic
Electronic
Components
26
4
R32, R33, R34, R35
RES, 10.0 ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-0710RL
27
2
R38, R86
RES, 100k ohm, 5%, 0.1W, 0603
Vishay-Dale
CRCW0603100KJNEA
28
6
R70, R71, R72,
R73, R74, R75
RES, 10k ohm, 5%, 0.063W, 0402
Vishay Dale
CRCW040210K0JNED
29
1
R76
RES, 10.0k ohm, 1%, 0.1W, 0603
Vishay Dale
CRCW060310K0FKEA
30
2
R80, R84
RES, 0 ohm, 5%, 0.125W, 0805
Vishay Dale
CRCW08050000Z0EA
31
0
R1, R2, R5, R8,
R19, R30
Not Install
Not Install
32
0
R83, R87, R88, R91
Not Install
Not Install
33
1
U1
Dual, 750kSPS, 16 BIT Simultaneous
Sampling ADC
34
1
U2
High-Speed, Single-Supply, Rail-to-Rail
OPA
Texas Instruments
OPA2350EA
35
2
U3, U4
Very Low-Power, Rail-to-Rail Out,
Negative Rail In, VFB Op Amp 205MHz
Texas Instruments
OPA2836IDGS
36
1
U5
Low Noise, Low Drift, Precision Voltage
Reference
Texas Instruments
REF5025IDGK
37
1
U7
Atmel I2C Compatible (2-Wire) Serial
EEPROM
38
1
U8
36-vA, 1-A, 4.17uVRMS RF LDO Voltage
Regulator
Texas Instruments
39
1
U9
60mA, 5.5V, Buck/Boost Charge Pump
Texas Instruments
REG71055DDC
40
1
U14
NanoPower Supervisory Circuit
Texas Instruments
TPS3836E18DBVT
41
2
U15, U16
Low Noise, Low Quiescent Current,
Precision OPA
Texas Instruments
OPA376AIDBVT
42
7
N/A
SAMTEC
SNT-100-BK-G
43
5
TP0, TP7, TP8,
TP9, TP10
TEST POINT PC MINI .040"D BLACK
Keystone
Elerctronics
5001
44
0
TP1, TP2, TP3,
TP4, TP5, TP6
Not Install
Keystone
Elerctronics
Not Install
45
2
N/A
3M
SJ61A8
Texas Instruments
ADS8350IRTE
Atmel
Conn Shunt, Pitch 0.100"; Height 0.240" ,
Gold Plated
BUMPON CYLINDRICAL .375X.135 BLK
ADS8350EVM-PDK
AT24C02C-XHM
TPS7A4700RGW
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7.2
PCB Layout
Figure 27 through Figure 30 show the PCB layouts for the ADS8350EVM.
NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid out;
they are not intended to be used for manufacturing ADS8350EVM PCBs.
Figure 27. ADS8350EVM PCB: Top Layer
Figure 28. ADS8350EVM PCB: Ground Layer
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Bill of Materials, PCB Layout, and Schematics
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Figure 29. ADS8350EVM PCB: Power Layer
Figure 30. ADS8350EVM PCB: Bottom Layer
7.3
Schematics
The schematics for the ADS8350EVM are appended to the end of this user's guide.
28
ADS8350EVM-PDK
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Revision History
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Revision History
Changes from Original (April 2014) to A Revision .......................................................................................................... Page
•
•
•
•
•
Changed SDCC controller to Simple Capture Card controller where applicable throughout document ....................... 1
Deleted J6.38 (SDI) row from Table 3 .................................................................................................. 7
Changed Section 5.2: changed ADS8350EVM rev B requirement to two microSD cards, added Figure 7 ................. 10
Added Figure 7 .......................................................................................................................... 11
Changed Table 6: J7 is installed for ADS8350EVM rev B, added TP7, TP8, TP9, TP10 for ADS8350EVM rev B ....... 25
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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Revision History
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29
1
2
3
4
5
6
COR20
R20
PIR2001
142-0701-201
COR1
R1
NI
PIJP102 PIJP10
COC29
C29
PIC2902
GND
PIC1602
PIC1601
Do Not Install
GND
PIU150
5
REF-AINA
PIR2 02
PIR2 01
PIC2801
PIC2802
COR22
R22
20k
3
PIU1503
+
COC28
C28
1µF
4
PIU1504
2
PIU302
-
COU15
U15
COR10
R10
1
PIU1501
-
PIU1502
PIR1001
PIR4602 PIC1201
COR46
R46
1.00k
2
1
PIJ302 PIJP301
PIC1202
PIR4601
COC12
C12
A
PIU304
JP9, JP10, JP5, JP6 Normally Installed
COU3A
U3A
OPA2836
DVDD
GND
2
1
PITP701
/PD
5
PIU305
1uF
PIJP902 PIJP901
GND
COJP3
JP3
PIU301
1
PIU301
3
PIU303
+
PIR1002
1.00k
OPA376DBV
2
GND
V+
COJP1
JP1
GND
GND
0.1uF COC16
C16
PIC2901
0.1µF
10
PIR101
AVDD
4
NI
V+
COC3
C3
PIC1901
NI
1.00k
Do Not Install
GND
COC19
C19
PIC1902
PIR1702
AVDD
V-
A
PIR102
2
1
2
3
4
5
PIJ102 PIJ103 PIJ104 PIJ105
PIR1701
PIC301
PIC302
PIR2002
1.00k
COR17
R17
1
PIJ101
V-
COJ1
J1
COR32
R32
PIR3201
GND
PITP901
COTP9
TP9
AVDD
PIR3202
10.0
COTP7
TP7
COJP9
JP9
GND
AVDD
/PD
COU3B
U3B
8
PIU308
COR11
R11
COR9
R9
PIR901
PIR1101
COC7
C7 PIC701
NI
PIC702
7
PIR1102
1.00k
PIR902
PIU307
PIC1301
PIC1302
0
6
PIU306
-
COR33
R33
COR26
R26
9
PIU309
PIR2601
PIR3301
PIR3302
10.0
PIR2602
1.00
+
PIC2 01
PIC2 02
OPA2836
COC13
C13
1uF
COR37
R37
0
COC22
C22
NI
AVDD
PIR3701
PIC2701
PIC2702
PIJ703 PIJP702 PIJP701
PITP801
COTP8
TP8
PITP10 1
COC27
C27
10µF
COTP10
TP10
GND
3
2
1
GND
PIR3702
PIC2401
COC24
C24
PIC2402 3900pF
Do Not Install
GND
COC11 AVDD
0.1uF C11
REF5025IDGK
GND
PIC501
1µF
0.22
PIC601
PIC602
0
PIR401
PIR502
COC6
C6
10µF
PIC901
PIC902
3
PIU203
+
PIU204
COC9
C9
COR21
R21
PIR2101
NLREF0AINA
REF-AINA
PIR2102
PIRC280 1
COC20
C20
PIC20 2 10µF
20.0k
1uF
COJP5
JP5
17
13
14
15
16
1
PIU101
REFIO-A
12
SDO-B PIU1012
2
PIU102
REFGND-A
11
SDO-A PIU1011
PIR1902
GND
SCLK
COR19
R19
GND
COR5
R5
PIR1501
PIR501
PIR1901
PIR1502
GND
0
COR23
R23
PIR2301
GND
COC8
C8
100
4
PIR2901
COR16
R16
7
PIU207
PIR1601
OPA2350EA
COC10
C10
PIR1602
0
47.0
PIR3902
PITP501
COR40
R40
PIR4001
PIR4002
47.0
PITP301
COR41
R41
PIR4101
PIR4102
COR42
R42
PIR4201
PIR4202
COR43
R43
PIR4302
47
PIR4301
POSDO0B
SDO_B
COTP3
TP3
POSDO0A
SDO_A
COTP2
TP2
PITP201
SCLK
COTP1 POSCLK
TP1
47.0
PITP101
47.0
COTP5
TP5
PITP401
COTP4
TP4
PO\C\S
CS
POSDI
SDI
PIU105 PIU106 PIU107 PIU108
5
COU2B
U2B
-
5
COR39
R39
PIR3901
10
PIU1010
9
CS PIU109
REFGND-B
PIU104 REFIO-B
COR29
R29
0.1
PIC801
PIR702 PIU205 +
PIC10 1
PIC10 2
3
PIU103
COC21
C21
10µF
Note:
Pin 8 to GND for ADSxx50; SDI for ADSxx53
PIJP602 PIJ601
2
1
6
PIU206
COR7
R7
PIR701
PIR2902
NLREF0AINB
REF-AINB
PIR2302
20.0k
NI
PIC802
PIC2101
PIC2102
NI
COR15
R15
NI
GND
PIJP502 PIJ501
OPA2350EA
PAD
PIR602
100
GND
PIR601
COR4
R4
B
PIU10 4 PIU10 3 PIU10 7
AVDD
PIR402
COR3
R3
PIR301
COC5
C5
PIC502
COR6
R6
PIR302
GND
PIU10 6 PIU10 5
COR28
R28
0.1
SDI/GND
TRIM/NR PIU505
PIR2802
DVDD
GND
PIR1402
0
8
6
VOUT PIU506
TEMP
PIR1401
1
PIU201
7
4
PIU504
COR14
R14
COU2A
U2A
AINP-A
PIU208
-
ANIP-B
3
PIU503
GNDPIU202
2
7
NC PIU507
ANIM-B
1µF
COU1
U1
ADS8350
GND
8
DNC PIU508
V-
COC2
C2
PIC202
GND
COJP7
JP7
6
VIN
4
PIC201
2
1
DNC
2
PIU502
8
1
PIU501
GND
V+
AVDD
B
PIC1101
AINM-A
PIC1102
COU5
U5
1uF
JP6
COJP6
GND
C
142-0701-201
COR8
R8
PIR801
PIR2501
NI
COJ2
J2
1
PIR1801
PIR202
GND
AVDD
R2
COR2
NI
NI
PIJP20 PIJP201
GND
GND
REF-AINB
NI
C30
COC30
R36
COR36
0
5
-
PIU1602
OPA376DBV
PIU407
PIR4702
9
+
PIJP10 2 PIJP10 1
PIC1401
C14
COC14
PIC1402 1µF
GND
GND
GND
R34
COR34
JP10
COJP10
JP4
COJP4
GND
COC26
C26
10µF
R47
COR47
1.00k
PIR4701
1µF
PIR3601
PIC2601
PIC2602
PIU409
7
PIR1202
1.00k
OPA2836
PIU406
8
PIU408
-
R12
COR12
PIR1201
2
1
PIJP402 PIJ401
1
GND
PIR3401
GND
AVDD
PIR3402
10.0
0.1µF COC17
C17
Do Not Install
PIC1702
PIC2501
C25
COC25
PIC2502 3900pF
PIC1701
2
PIU402 -
R13
COR13
3
PIR1302
1.00k
PIC1501
PIC1502
PIU401
1
+
C15
COC15
1µF
COR35
R35
PIU405
PIU401
PIU403
PIU40
OPA2836
PIR3501
R27
COR27
PIR2701
1.00
4
PIR1301
V-
D
/PD
5
PIR3502
D
10.0
PIR2702
PIC2301
PIC2302
C23
COC23
NI
PIJ803 PIJP802 PIJP801
3
2
1
10
V+
U4A
COU4A
GND
GND
GND
GND
JP8
COJP8
GND
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
COTP0
TP0
2
1
PIR2401
PIC30 1
PIC30 2
COU16
U16
2
COR24
R24
20k
PIU1605
PIU1601
V-
PIR2402
3
4
PIU1604
6
PITP0 1
PIR3602
AVDD
U4B
COU4B
PIU1603 +
C
PIR3801
PIC1801
/PD
0.1µF
COJP2
JP2
GND
PIC1802
C31
COC31
PIR201
Do Not Install
GND
PIR1802
1.00k
DVDD
PIC3102 PIC3101
V+
C4
COC4
PIC402
2
1
2
3
4
5
PIC401
COR38
R38
100k
PIR2502
1.00k
COC18
C18
COR18
R18
PIJ201
PIJ20 PIJ203 PIJ204 PIJ205
PIR3802
COR25
R25
PIR802
2
3
4
Number:
Rev: B
SVN Rev: Not in version control
Drawn By: Luis Chioye
Engineer: L Chioye
5
Designed for: Public Release
Mod. Date: 10/13/2014
Project Title: ADS8350EVM
Sheet Title:
Assembly Variant: Variant name not interpreted Sheet: 1 of 1
File: Main_ADS8350EVM_RevB.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
?Texas Instruments
2014
1
2
3
+5_SDCC
4
5
6
+3.3V SDCC Digital Supply
Unreg_5V
VOUT
1
PIU901
COR84
R84
PIR8402
PIC4501
PIC4502
COC45
C45
10µF
PIC4601
PIC4602
PIC4701
PIC4702
COC46
C46
10µF
3
PIU903
COC47
C47
2.2µF
ENABLE
2
GND PIU902
PIC50 1
PIC50 2
PIR8401
PIC3901
0
PIC3902
COC50
C50
2.2µF
COU9
U9
REG71055DDC
16
PIU8016
IN
15
PIU8015
IN
COR83
+5V_SDCC PIR8302R83 PIR8301
NI
COC39
C39
GND
COC40
C40
1µF
GND
17
18
0P1V
7
GND PIU807
2
PIU1402
GND
3
PIU1403
MR
PIC4201
PIC420
COC41
C41
10µF
COC42
C42
10µF
PIC4301
PIC4302
COC43
C43
10µF
PIC4 01
PIC4 02
PIR8602
100k
COR86
R86
COC44
C44
10µF
GND
6P4V2
6P4V1
GND
21
PAD PIU8021
NLUnreg05V
Unreg_5V
NLEVMSDCLK
EVMSDCLK
NLEVMSDDATA1
EVMSDDATA1
NLEVMSDDATA3
EVMSDDATA3
4
5
VDD PIU1405
5
PIU80 PIU806 PIU805 PIU804
6
CT
8
1
PIU1401
3P2V
COU14
U14
9
PIU809
0P8V
1P6V
+5.5V Charge Pump
PIC4101
PIC4102
0P2V
10
PIU8010 0P4V
PIC4801 PIC4802
0.1µF
ID_SDA
DVDD
20
OUT PIU8020
3
SENSE PIU803
11
COC48
C48
TPS7A4700RGW
1
OUT PIU801
GND
NI
GND
14
PIU8014
NR
12
PIU8012
PIR8702
COU8
U8
13
PIU8013
EN
PIU8011
GND
GND
PIR8601
10µF
PIC40 1
PIC40 2
19
2
PIU802 PIU8019 PIU8018 PIU8017
NC
VIN
COR87
R87
PIR8701
NC
5
PIU905
51
GND PIJ6051
PIU906
NC
4
0.22µF
NC
PIR9102
A
PIU904
NI
PIC4901
6
COR91
R91
PIR80 2
COJ6
J6
COC49
C49
PIC4902
PIR9101
COR80
R80
0
CP+
PIR80 1
CP-
NLDVDD
DVDD
4
RESET PIU1404
PIR90 2
TPS3836DBV
5.2V
COR90
R90
GND
0
B
COR88
R88
Enable_Pow
PIR8801
PIR90 1
PIR8802
1
PIJP1101
2
PIJP1102
PIR8902
GND
2
2 PIJ602
4
4 PIJ604
6
6 PIJ606
8
PIJ608
8
10
10 PIJ6010
12
12 PIJ6012
14
14 PIJ6014
16
16 PIJ6016
18
18 PIJ6018
20
20 PIJ6020
22
PIJ6022
22
24
24 PIJ6024
26
26 PIJ6026
28
28 PIJ6028
30
30 PIJ6030
32
32 PIJ6032
34
34 PIJ6034
36
PIJ6036
36
38
38 PIJ6038
40
40 PIJ6040
42
42 PIJ6042
44
44 PIJ6044
46
46 PIJ6046
48
48 PIJ6048
50
PIJ6050
50
GND
EVM_Present~
A
GND
NLID0SCL
ID_SCL
NL05V0SDCC
+5V_SDCC
COTP6
TP6
PI+5_SDCC
TP601
NLEnable0Pow
Enable_Pow
PO\C\S
CS
POSCLK
SCLK
POSDI
SDI
POSDO0A
SDO_A
POSDO0B
NLEVMSDCMDSDO_B
EVMSDCMD
NLEVMSDDATA0
EVMSDDATA0
NLEVMSDDATA2
EVMSDDATA2
ERF8-025-01-L-D-RA-L-TR
COR89
R89
0
B
PIR8901
COJP11
JP11
NI
1
1
3
PIJ603
3
5
PIJ605
5
7
PIJ607
7
9
PIJ609 9
11
PIJ6011
11
13
PIJ6013
13
15
PIJ6015
15
17
PIJ6017
17
19
PIJ6019 19
21
PIJ6021
21
23
PIJ6023 23
25
PIJ6025
25
27
PIJ6027
27
29
PIJ6029
29
31
PIJ6031
31
33
PIJ6033 33
35
PIJ6035
35
37
PIJ6037 37
39
PIJ6039
39
41
PIJ6041
41
43
PIJ6043
43
45
PIJ6045
45
47
PIJ6047 47
49
PIJ6049
49
PIJ601
Regulated AVDD
GND
AVDD
3
PIJP1203
2
PIJP1202
GND
PIC101
PIC102
Do Not Install
1
PIJP1201
COC1
C1
10µF
COJP12
JP12
External AVDD
GND
ED555/2DS
COJ5
J5
1
PIJ501
2
PIJ502
3
PID103
COD1
D1
PLVA659A.215
NC 5.6V
COC54
C54
10µF
1
PID10
PID102
2
PIC5401
PIC5402
C
C
DVDD
GND
COR76
R76
10k R75
10k R74
10k R73
PIR710
10k R72
PIR70 1
10k R71
10k R70
COR70PIR70 2 COR71PIR7102 COR72PIR7202 COR73PIR7302 COR74PIR7402 COR75PIR7502
PIC510
PIC5102
COC51
C51
10µF
PIC5201
PIC5202
PIR7601
PIR7602
10.0k
COC52
C52
0.1µF
DVDD
COR30
R30
PIR3001
PIR7201 PIR7301 PIR7401 PIR7501
NI
J7
COJ7
GND
1
PIJ701
2
PIJ702
3
PIJ703
4
PIJ704
5
PIJ705
6
PIJ706
7
PIJ707
8
PIJ708
EVMSDDATA2
EVMSDDATA3
EVMSDCMD
EVMSDCLK
EVMSDDATA0
EVMSDDATA1
9
GND PIJ709
10
GND1 PIJ7010
11
CD PIJ7011
12
GND2 PIJ7012
13
GND3 PIJ7013
14
GND4 PIJ7014
DAT2
CD/DAT3
CMD
VDD
CLOCK
VSS
DAT0
DAT1
PIR3002
C53
COC53
0.1µF
COU7
U7
R31
COR31
PIR3101
GND
PIC5301
PIC5302
1
PIR3102
PIU701
47.0
2
PIU702
3
PIU703
4
PIU704
microSD
A0
A1
VCC
8
PIU708
GND
7
WP PIU707
ID_SCL
6
A2
SCL PIU706
VSS
5
SDA PIU705
NLID0SDA
ID_SDA
AT24C02C-XHM
MOLEX 502570-0893
GND
GND
GND
D
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
1
2
3
4
GND
Number:
Rev: B
SVN Rev: Not in version control
Drawn By:
Engineer: L Chioye
5
GND
D
Designed for: Public Release
Mod. Date: 9/11/2014
Project Title: ADS8350EVM
Sheet Title:
Assembly Variant: Variant name not interpreted Sheet: 1 of 1
File: Connector_ADS8350EVM_RevB.SchDoc
Size: B
Contact: http://www.ti.com/support
6
http://www.ti.com
© Texas Instruments 2014
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by
TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
SPACER
4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated
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IMPORTANT NOTICE
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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