User's Guide
SLOU241A – September 2008 – Revised March 2015
AFE5804EVM
The AFE5804EVM is an evaluation tool designed for the ultrasound analog front-end (AFE) device
AFE5804. In order to deserialize the outputs of the AFE5804, use of the ADSDeSer-50EVM during
evaluation is also recommended.
Contents
Introduction ................................................................................................................... 2
1.1
Features .............................................................................................................. 2
1.2
Power Supplies ..................................................................................................... 2
1.3
Indicators............................................................................................................. 2
2
Board Configuration ......................................................................................................... 4
2.1
I/O and Power Connectors ........................................................................................ 4
2.2
Jumpers and Setup ................................................................................................. 5
2.3
Test Points ........................................................................................................... 7
3
Board Operation ............................................................................................................. 8
3.1
Software Installation and Operation .............................................................................. 8
3.2
Hardware Setup ................................................................................................... 10
3.3
Clock Selection .................................................................................................... 11
3.4
Data Analysis ...................................................................................................... 11
4
Schematics and Layout .................................................................................................... 12
4.1
Schematics ......................................................................................................... 12
4.2
PCB Layout ........................................................................................................ 12
4.3
Bill of Materials .................................................................................................... 20
5
Typical Performance ....................................................................................................... 23
Appendix A
TSW1400 for Evaluating AFE5804/5 .......................................................................... 24
Appendix B
High Speed Data Converter Pro (HSDCPro) GUI Installation ............................................... 28
1
List of Figures
1
AFE5804EVM LED Locations .............................................................................................. 3
2
AFE5804EVM I/O Connectors and Locations
3
Locations of Jumpers, JTAG, and Switches on the AFE5804EVM ................................................... 5
4
Default Setup for Jumpers .................................................................................................. 6
5
AFE5804EVM USB SPI Interface for TGC Mode
6
AFE5804EVM USB SPI Interface for CW Mode......................................................................... 9
7
AFE5804EVM USB SPI Interface for ADC Setup...................................................................... 10
8
Typical AFE5804 Bench Setup ........................................................................................... 11
9
Clock Selection Jumper Configurations ................................................................................. 11
10
Top Layer, Signal........................................................................................................... 12
11
Inner Layer 1, Ground ..................................................................................................... 13
12
Inner Layer 2, Signal ....................................................................................................... 14
13
Inner Layer 3, Power....................................................................................................... 15
14
Inner Layer 4, Ground ..................................................................................................... 16
15
Bottom Layer, Signal ....................................................................................................... 17
16
Top Silk Screen Layer ..................................................................................................... 18
...........................................................................
.......................................................................
4
8
SPI is a trademark of Motorola, Inc..
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Introduction
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17
Bottom Silk Screen Layer ................................................................................................. 19
18
Typical Performances of AFE5804....................................................................................... 23
19
User Interface: Step-by-Step setup ...................................................................................... 24
20
User Interface: Frequency Load Value to Signal Generator .......................................................... 25
21
TSW1400 Interface
26
22
Analysis of Noncoherent Sampled Data
27
23
24
25
26
27
28
29
30
31
........................................................................................................
................................................................................
HSDCPro Install (Begin)...................................................................................................
HSDCPro Install (Install Directory) .......................................................................................
HSDCPro Install (TI License Agreement) ...............................................................................
HSDCPro Install (NI License Agreement) ...............................................................................
HSDCPro Install (Start Installation) ......................................................................................
HSDCPro Install (Installation Progress) .................................................................................
HSDCPro Install (Installation Complete) ................................................................................
HSDCPro Install (h) ........................................................................................................
HSDCPro Install ............................................................................................................
28
29
30
31
32
33
34
35
35
List of Tables
1
1
AFE5804EVM Default Settings When Powered On ................................................................... 10
2
Channel-to-Channel Matching Between the AFE5804EVM and ADSDeSER-50EVM ............................ 11
3
Bill of Materials
.............................................................................................................
20
Introduction
The AFE5804 includes an 8-channel, voltage-controlled amplifier (VCA) and an 8-channel, 50-MSPS
analog-to-digital converter (ADC). The outputs of the ADC are 8-channel LVDS outputs, which can be
deserialized by the ADSDeSer-50EVM. The AFE5804 evaluation module (EVM) provides an easy way to
examine the performance and functionalities of AFE5804.
1.1
Features
•
•
•
•
•
•
•
•
1.2
Characterizes the AFE5804
Supports CW functionalities test
Provides 8-channel, low-voltage differential signal (LVDS) outputs from the ADC
Compatible with the standard TI LVDS deserializer ADSDeSer-50EVM
Communicates with a personal computer (PC) through a USB interface
RS-232 interface also can be configured in case users wish to control the AFE5804 with a
microcontroller. MSP430 programming is required.
Includes multiple power management solutions for the AFE5804 and other devices.
Onboard Vcntl generator (0 V - 1.2 V).
Power Supplies
The AFE5804EVM requires only ±5-V power supplies for operation.
1.3
Indicators
The AFE5804EVM has four LEDs onboard as shown in Figure 1. The states of these LEDs demonstrate
the normal operation of the AFE5804EVM.
• LED1, LED2: +3.3-VA and +3.3-VD power supply indicators. They show the normal operation of 3.3-V
power regulators.
• LED 3: MCU operation indicator. Flashing state can indicate the normal operation of the MSP430 when
the MSP430 is appropriately programmed.
• LED 4: 1.8-V power indicators
2
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LED 1, 2
LED 3
LED 4
Figure 1. AFE5804EVM LED Locations
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Board Configuration
This section describes in detail the locations and functionalities of inputs, outputs, jumpers, and test points
of the AFE5804EVM.
2.1
I/O and Power Connectors
Pin A1 of the AFE5804 is marked by a white dot on its package as well as a white dot on the board. The
positions and functions of the AFE5804EVM connectors are discussed in this section.
Vctrl In
R12
+/- 5V PWR
CW Out
Low Jitter
CLK In
Ext
CLK In
USB
LVDS
Outputs
Figure 2. AFE5804EVM I/O Connectors and Locations
•
•
•
•
•
•
•
•
•
•
•
4
Analog Inputs Ch1-Ch8 (J1-J3, J5-J7, J9, J10): Single-ended analog signal inputs with 50-Ω
termination and AC-coupling
CW Output (J4): CW output after I/V translator
Vcntl Input (J8 optional): VCA gain control voltage of AFE5804, 0 V to 1.2 V, when this SMA connector
is used, shunt P3 must be removed. .
Low-Jitter CLK Source Input (J11): This input accepts clocks with low-jitter noise, such as HP8644
output. 20- to 50-MHz, 50% duty-cycle clock with 1- to 2-Vrms amplitude can be used. When J11 is
used, ensure that shunts P18, P23, and P22 are removed.
External CLK Input (J13): ADC Clock input, such as FPGA outputs. However, the AFE5804 does not
achieve satisfactory performances due to the high-jitter noise of the clock.
±5-V PWR connector (P2): Power supply input
Regulated power supply outputs (P1, P4, and P24): 3.3-VA, 3.3-VD, 2.5-VA, 1.8-VD outputs.
Connectors need to be installed.
RS-232 Input (P17): PC serial port interface for setting AFE5804
USB input (P25): USB interface to control the AFE5804 (default)
LVDS Outputs Ch1-Ch8 (P26): Differential LVDS data outputs
R12 is used to adjust the onboard Vcntl from 0 V to 1.2 V. P3 must be shorted when onboard Vcntl is
used.
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2.2
Jumpers and Setup
In the following detailed description, the board has been set to default mode (see Figure 3).
P3
P5
S1
P8
SW2
P18
P16
P15
P14
P13
P11
P9
P12
P7
SW1
P6
P10
P20
P19
P22
P23
Figure 3. Locations of Jumpers, JTAG, and Switches on the AFE5804EVM
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Figure 4. Default Setup for Jumpers
•
•
•
•
•
6
P5: Power-down pin for the VCA section of the AFE5804. Grounded (default mode) or High (+3.3 VD)
for power-down mode.
P6, P10: AFE5804 ADC clock input selection: Transformer-based differential clock, single-ended
LVCMOS clock, or future clock option (needs U4 for support). The default mode uses the transformerbased differential clock.
P7: MSP430 microcontroller JTAG interface
P8: MAX3221 (RS-232) power-off jumper. When the jumper is removed, MAX3221 is completely
powered off. In the default mode, the jumper is uninstalled because the USB interface is used.
P9: SPI™ interface for U4.
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•
•
•
•
•
•
•
•
•
•
•
•
•
2.3
P11: TI internal use. Default is floating.
P12: Power-down pin for ADS. Active High (+3.3 VD). Floating for default mode.
P13: External ADS reference voltage inputs. Floating in the internal reference mode.
P14: EN_SM: In the default mode, P14 connects to +3.3 VD, and the state machine is enabled. The
AFE5804 is operated using only one SPI port (ADS SPI port).
P15: RST pin; connects to H4 in the default mode through 0-Ω resistors.
P16: Debug port for monitoring VCA and ADS SPI signals.
P19: TI internal use. Connects to 3.3 VD.
P20: INT/EXT reference mode selection. +3.3 VD for the internal reference mode (default); GND for
the external reference mode.
P22: Uses onboard 40-MHz clock or external clock through J13. The default mode uses the onboard
clock
P23: Power-on onboard 40-MHz clock generator. Default is on.
P18: Because U4 is uninstalled, this jumper must be set as Figure 4 shows
S1: MSP430 reset button
SW1, SW2: CW outputs summation switch. Individual CW output current can be summed through the
I/V translator U1 when its corresponding switch is set to ON.
Test Points
Multiple test points are provided on the EVM. Detail descriptions follow. Under normal operation mode, it
is unnecessary to measure voltages at most of these test points.
• TP1: GND
• TP2: GND
• TP3: VCM
• TP4: Vcntl test point
• TP5: GND
• TP6: GND
• TP7: Test point, TI internal only
• TP8: +5 V
• TP9: CM
• TP10:GND
• TP11: -5 V
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Board Operation
This section describes how to operate the AFE5804EVM for evaluation purposes. Both software and
hardware installation and operation are discussed.
3.1
Software Installation and Operation
The AFE5804EVM has USB SPI software and AFE58XXEVM driver that are located on the TI website on
the AFE5804 product folder under Tools & software. Run the AFE58XXEVM Driver install.exe and the
setup.exe to install the driver and software, respectively. The personal computer (PC) recognizes the EVM
after software installation.
To launch the software after successful installation, click:
Start Menu → All Programs → Texas Instruments → AFE5804EVM USB SPI → AFE5804EVM USB SPI
Three different modes are shown in Figure 5, Figure 6, and Figure 7.
The software updates the AFE5804 registers as soon as users change any current setup (i.e., the
program sends out new register values due to any value change). It is recommended that users change at
least one register value before measurement. Therefore, the register values in a device can be
synchronized to the displayed values on the software interface.
In most cases, users only need to change the VCA setup. The ADC setup can remain the same as the
integrated circuit (IC) is powered up.
Figure 5. AFE5804EVM USB SPI Interface for TGC Mode
8
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Figure 6. AFE5804EVM USB SPI Interface for CW Mode
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Figure 7. AFE5804EVM USB SPI Interface for ADC Setup
3.2
Hardware Setup
When the AFE5804EVM is powered on in the default mode, the AFE5804 is set as described in Table 1.
Table 1. AFE5804EVM Default Settings When Powered On
VCA
ADS
TGC mode 1
Single End Clock
PGA = 20 dB
Digital Gain = 0
Filter = 17 MHz
Other parameters are as stated in data sheet
Initial measurements can be made under these default settings. See the AFE5804 data sheet (SBOS442)
for additional settings.
As previously mentioned, the deserializer ADSDeSER-50EVM is required. See details in the ADSDeSER50EVM user's guide (SBAU091). An example bench setup is shown in Figure 7. Band-pass filters are
required for signal source in order to ensure the correct SNR measurements of the AFE5804.
10
AFE5804EVM
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PC+GPIB
+LabVIEWTM
Log. Analyzer
16500C
Fun. Gen.
Signal+ BPF
Fun. Gen.
CLK
AFE5804EVM
+ADSDeSER
(LabVIEW is a trademark of National Instruments Corporation.)
Figure 8. Typical AFE5804 Bench Setup
The channel order of the AFE5804 outputs is not the same as that of the ADS527x outputs.
Consequently, the channel number on the ADSDeSER-50EVM or AFE5804EVM can be misleading.
Table 1 provides channel-to-channel sequence matching between the ADSDeSER-50EVM and the
AFE5804EVM.
Table 2. Channel-to-Channel Matching Between the AFE5804EVM and ADSDeSER-50EVM
AFE5804
FCLK
CH4
CH3
CH2
CH1
CH5
CH6
CH7
CH8
LCLK
ADSDESER
FCLK
CH1
CH2
CH3
CH4
CH5
CH6
CH7
CH8
LCLK
For example, when an analog signal is present on CH1 of the AFE5804EVM, the corresponding 12-bit
digital output can be seen on CH4 of the ADSDeSER-50EVM.
3.3
Clock Selection
The AFE5804 can be clocked through a transformer-based differential clock, single-ended clock, or future
clock input options provided by U4 as Figure 9 shows.
(b) Single-Ended Clock
(a) Transformer Default
(c) Future CLK Input Option Based on U4
Figure 9. Clock Selection Jumper Configurations
The clock source of the EVM can be the onboard 40-MHz clock, HP8644 low-jitter clock source, or
external clock source. The best performance of this EVM is achieved when the low-jitter clock source
HP8644 is used. P22, P23, and P18 must be removed in order to disable the onboard clock.
When HP8644 or similar clock sources are unavailable, the onboard 40-MHz clock is the desirable source.
The jumpers P22, P23, and P18 must be configured as shown in Figure 4 (i.e., the default setup for
AFE5804EVM). In this mode, the transformer-based differential clock is used.
3.4
Data Analysis
Based on the data file acquired by a logic analyzer, the performance of AFE5804 can be evaluated.
Appendix A provides one solution (TI TSW1400 software) to analyze the data file captured. Coherent
sampling is recommended but is not mandatory. Due to the frequency accuracy requirement of coherence
sampling, two HP8644s are required for generating an ADC clock and analog signal. For most users, this
may be infeasible. Data analysis based on windowing is a more suitable approach.
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Schematics and Layout
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Schematics and Layout
This section provides the schematics, the AFE5804EVM board layout, and the bill of materials.
4.1
Schematics
The schematics appear at the end of the document.
4.2
PCB Layout
The AFE5804EVM uses a six-layer printed-circuit board. The following figures show each layer.
Figure 10. Top Layer, Signal
12
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Figure 11. Inner Layer 1, Ground
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Figure 12. Inner Layer 2, Signal
14
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Figure 13. Inner Layer 3, Power
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Figure 14. Inner Layer 4, Ground
16
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Figure 15. Bottom Layer, Signal
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17
Schematics and Layout
TP1
J3
GND
C2
R3
R6
EP1 R5
C3
+5V G -5V
C
C
Y1
LED4
FB6
LED3
FB7
C42
R47
+
R45
DOUT R46
A
R33
R29
R30
R31
R32
VCA_SDATA
VCA_SCLK
C43
+
C39
+1.8V G
AFE5804 CH4 CH3 CH2 CH1 CH5 CH6 CH7 CH8
ADSDESER CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8
P21
U6
FB9
1 2
+
C48
5 4 3 2 1
P24
+3.3VD
P19 P20
VCA_CSZ
R36 R37
R35 R34
REFB GND REFT
ADS_CSZ
C40
INT/EXT
ADS_SDATA
ADS_SCLK
C46
A
P23
R48
C
H4
R49 C45 FB8
P22
FB5
CLK IN
TP9
U3
C41
C38
C37
R42
EP5
R41 C36
GND
U5
TP10 C44
EXT/INT
GND
R43
FB3
FB2
R44
FB4 GND
U4
EP4
P12
TP7
TP
EP6
P13
RST
P15
EN_SM
P14
C26
C31
J13
ADS_PD
C
C29
C28
EP3
C27
J12
+3.3VD
R27
P18
C30
P16
ADS_RET
+
CW4
P11
P10
C32
C33
R39
C34
R22 C35
LED5
R40
TP6
CW0
CW5
C25
J10
P17
U2
C24 R38
P9
C22 C23
R28
P8
SW2
R21
S1 C16
DUT1
CW9
GND
TP2
CH5
P7
+3.3VD
DIFF1
Single
R25 DIFF2
C18
SW1
P2
TP8
+5V
GND
C19
C20
C21
R23
R65
CH6 J7
PWR
J11
P6
D2
D3
GND
R24
H1
VCA_PD
+3.3
T2
C17
P5
TP5
TP3 VCM
R20
2.5V G
TP4
C
C12
R17
A
1 2
C13
LED1
LED2
TP11
-5V
C5
R16
L1
C15
C14
R18
U1
R19
P3
J8
J9
R8
FB1
P1
C11
R13
C9
R14
P4
R15
C10
R12
J6
C7 R10 C8
D1
Vctrl
CH1
C124
CH7
R11
J4
J1
T1
R4 C4
A
R2
S/N:
AFE5804EVM RevB
CH2
TI 06/2008
R7
+3.3VA G G 3.3VD
C1
J5
C6
R1
EP2
CH8
R9
CH4
J2
1 2 3 4
CH3
A
H2
CW OUT
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C47
P25
C49
H3
Figure 16. Top Silk Screen Layer
18
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Figure 17. Bottom Silk Screen Layer
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4.3
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Bill of Materials
Table 3. Bill of Materials
Item
MFG
MFG Part Number
RefDes
Value or Function
1
TI
MSP430F1232IPW
U3
MIXED SIGNAL MICROCONTROLLER
2
KEMET
C0402C103K3RAC
C9
CAPACITOR,SMT,0402,CER,0.01μF,25V,10%,X7R
3
KEMET
C0402C104K8PAC
C1, C2, C3, C4, C5, C6, C7, C8,
C10, C11, C12, C13, C14, C15,
C16, C17, C18, C19, C20, C21,
C22, C23, C24, C25, C26, C27,
C28, C29, C30, C32, C33, C34,
C35, C40, C41, C42, C45, C46,
C47, C51, C52, C53, C55, C56,
C58, C60, C63, C64, C67, C69,
C70, C71, C72, C73, C74, C75,
C76, C77, C78, C79, C80, C81,
C82, C83, C84, C85, C86, C87,
C88, C89, C90, C91, C93, C94,
C96, C100, C101, C102, C103,
C104, C105, C106, C107, C108,
C109, C110, C111, C112, C113,
C114, C115, C116, C117, C118,
C119, C120, C121, C122, C123,
C124
CAPACITOR,SMT,0402,CER,0.1μF,10V,10%,X5R
4
PANASONIC
ECJ-0EC1H100D
C66, C95, C97
CAPACITOR,SMT,0402,CER,10pF,50V,±0.5pF,NPO
5
MURATE
GRM155R60J225ME15D
C37, C92
CAPACITOR,SMT,0402,CERAMIC,2.2μF,6.3V,20%,X5R
6
PANASONIC
ECJ-1VB0J475K
C36
CAPACITOR,SMT,0603,CER,4.7μF,6.3V,10%,X5R
7
TAIYO YUDEN
JMK107BJ106MA-T
C31, C38
CAPACITOR,SMT,0603,CER,10μF,6.3V,20%,X5R
8
MURATA
GRM31CR60J476ME19B
C44
CAPACITOR,SMT,CER,1206,47μF,6.3V,20%,X5R
9
AVX
TACR475M020R
C98, C99
CAP,SMT,TAN,0805,4.7μF,20V,20%,R-CASE
10
AVX
TPSC226K016R0375
C39, C43, C48, C49, C50, C54,
C57, C59, C61, C62, C65, C68
10%, 16V, 22μF
11
SAMTEC
SMA-J-P-X-ST-EM1
J1, J2, J3, J5, J6, J7, J9, J10,
J13
SMA JACK EDGE
MOUNT,062PCB,BRASS/GOLD,STRAIGHT,50 Ω
12
SAMTEC
SMA-J-P-H-ST-TH1
J4, J8, J11, J12
SMA COAX STRAIGHT PCB JACK,SMT,175TL,50
Ω,GOLD
13
TYCO
ELECTRONICS
745781-4
P17
DSUB, 9 PIN, R/A FEM
14
ADVANCED
CONNECTER
MNE20-5K5P10
P25
MINI-AB USB OTG RECEPTACLE R/A SMT TYPE
15
USCC
HC-18/U-4.1943M
Y1
4.194300 MHz
16
EPSON
TOYOCOM
HF-372A(UNINSTALLED)
F1
CRYSTAL FILTER UNINSTALLED
17
TI
N/A
U4
(UNINSTALLED)
18
Not Installed
PAD0201(UN)
EP4, EP6
( Uninstalled Part ) EMPTY PAD,SMT,0201
19
Not Installed
PAD0402(UN)
EP1, EP2
( Uninstalled Part ) EMPTY PAD,SMT,0402
20
MURATA
BLM15BD102SN1D
FB2, FB3, FB4, FB8, FB22,
FB23, FB24, FB25, FB26, FB27,
FB28, FB29, FB30
FERRITE BEAD,SMT,0402,1 kΩ,200mA
21
MURATA
BLM18EG601SN1D
FB31
FERRITE BEAD,SMT,0603,600 Ω at 100MHz,25%,500mA
22
STEWARD
HI0805R800R-00
FB6, FB7, FB9, FB10, FB13,
FB14, FB15, FB16, FB17, FB18,
FB19, FB20, FB21
FERRITE,SMT,0805,80 Ω at 100MHz
23
STEWARD
LI1206H151R-00
FB5
FERRITE,SMT,1206,150 Ω at 100MHz,0.8A
24
MOLEX
39357-0003
P2
HEADER, THRU, POWER, 3P,3.5MM, EUROSTYLE
25
SAMTEC
QTH-040-01-L-D-DP-A
P26
HEADER,SMT,80P,0.5mm,FEM,DIFF
PAIR,RECEPTACLE,168H
26
SAMTEC
SSQ-104-02-F-D
P9
HEADER,THU,8P,2x4,100LS,FEM,VERT,194TL
27
SAMTEC
TSW-103-08-G-D
P6, P10
HEADER,THU,6P,2x3,MALE,DUAL ROW,100LS,200TL
28
SAMTEC
TSW-107-07-G-D
P7
HEADER,THU,14P,2x7,MALE,DUAL ROW,100LS,100TL
29
SAMTEC
TSW-108-07-G-D
P16
HEADER,THU,16P,2x8,MALE,DUAL
ROW,100LS,100TL(UNINSTALLED)
30
TYCO
ELECTRONICS
103321-2
P3, P8, P12, P21, P23
HEADER W/SHUNT,2P,100LS
20
AFE5804EVM
SLOU241A – September 2008 – Revised March 2015
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Schematics and Layout
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Table 3. Bill of Materials (continued)
Item
MFG
MFG Part Number
RefDes
Value or Function
31
MOLEX
22-23-2021-P
P4, P24
MALE,2PIN,.100CC W/ FRICTION LOCK
32
MILL-MAX
350-10-103-00-006
P13, P18, P22
HEADER,THU,MAL,0.1LS,3P,1x3,284H,110TL
33
MOLEX
22-23-2041
P1
4P, VERT, FRICTION LOCK
34
TYCO
ELECTRONICS
4-103239-0x3
P5, P11, P14, P15, P19, P20
HEADER,THU,MAL,0.1LS,3P,1x3
35
TI
AFE5804
DUT1
AFE5804 8-CH ULTRASOUND ANALOG FRONT END
36
MAXIM
MAX3221CAE
U2
RS-232 TRANSCEIVERS
37
MOTOROLA
MMBD7000LT1
D1, D2
DUAL SWITCHING DIODE
38
PHILIPS
BAP50-04
D3
PIN DIODE SOT 23 SINGLE JUNCTION
39
TI
TPS79633DCQR
U7(UNINSTALLED), U8
ULTRALOW-NOISE HI PSRR FAST RF 1-A LDO LINEAR
REGULATOR,3.3V
40
TI/BURR-BROWN
OPA820IDBV
U1
UNITY-GAIN STABLE LOW NOISE VOLTAGE
FEEDBACK OPAMP
41
TI
TPS79318DBV
U6
1.8V,ULTRALOW-NOISE HI PSRR FAST RF 200mA LDO
LINEAR REGULATOR
42
TI
TPS79325DBV
U9
2.5V,ULTRALOW-NOISE HI PSRR FAST RF 200mA LDO
LINEAR REGULATOR
43
FUTURE
TECHNOLOGY
DEVICE INT.
FT245RL
U10
USB FIFO IC INCORPORATE FTDICHIP-ID SECURITY
DONGLE
44
PANASONIC
ELJFA221J
L1
220μH, 5%
45
TAIYO-YUDEN
LK 1608 330M
FB1, FB11, FB12
INDUCTOR,SMT0603,33.0μH,20%
46
PANASONIC
LNJ308G8PRA
LED1, LED2, LED3, LED5
LED,SMT,0603,PURE GREEN,2.03V
47
PANASONIC
LNJ808R8ERA
LED4
LED,SMT,0603,ORANGE,1.8V
48
ECS
ECS-3953M-400-BN
U5
OSC,SMT,3.3V,50ppm,–40~85C,5nS,40.000 MHz
49
PANASONIC
ERJ-2GE0R00X
R26, R27, R40, R42, R44, R48,
R53, R55, R56, R63, R65
RESISTOR/JUMPER,SMT,0402,0 Ω,5%,1/16W
50
PANASONIC
ERJ-2GEJ0000(UN)
R6, R7, R29, R30, R31, R32,
R34, R35, R36, R37, R39, R43,
R46, R49, R54, R59, R60, R62,
R64
UNINSTALLED PART
51
PANASONIC
ERJ-2GEJ131
R66, R69
RESISTOR, SMT, 0402, 130 Ω, ±1%, 1/16W
52
PANASONIC
ERJ-2GEJ49R9(UN)
R4, R9, R22
UNINSTALLED PART
53
PANASONIC
ERJ-2RKF5602X
R57
RESISTOR, SMT, 0402, 56K Ω, 1%, 1/16W
54
PANASONIC
ERJ-2GEJ820
R67, R68
RESISTOR, SMT, 0402, ±5%,82
55
PANASONIC
ERJ-2RKF1000X
R24, R25
RESISTOR,SMT,0402,100 Ω,1%,1/16W
56
PANASONIC
ERJ-2RKF1001X
R13, R14, R18, R47
RESISTOR,SMT,0402,1.00K,1%,1/16W
57
PANASONIC
ERJ-2RKF1002X
R33, R58
RESISTOR,SMT,0402,10.0K,1%,1/16W
58
PANASONIC
ERJ-2RKF2000X
R52
RES,SMT,0402,200 Ω,1%,1/16W
59
PANASONIC
ERJ-2RKF3320X
R16, R20, R38, R45
RES,SMT,0402,332 Ω,1%,1/16W
60
PANASONIC
ERJ-2RKF4020X
R8
RES,SMT,0402,402 Ω,1%,1/16W
61
PANASONIC
ERJ-2RKF4992X
R28
RESISTOR,SMT,0402,49.9K,1%,1/16W
62
PANASONIC
ERJ-2RKF49R9X
R1, R2, R3, R5, R10, R11, R15,
R17, R21, R23, R61
RESISTOR,SMT,0402,49.9 Ω,1%,1/16W
63
PANASONIC
ERJ-2RKF7500X
R50, R51
RES,SMT,0402,750 Ω,1%,1/16W
64
VISHAY
CRCW06031742F
R19
RES,SMT,0603,17.4K Ω, 1%
65
PANASONIC
ERJ-6RQF5R1V
R41
SMT,RES,0805,1/8W, 1%, 5.1 Ω
66
PANASONIC
ERJ-1GE0R00C
EP3, EP5
RESISTOR,SMT,0201,THICK FILM,0 Ω,5%,0 Ω
JUMPER,1/20W
67
C&K
TD06H0SK1
SW1, SW2
DIP SWITCH,SMT,6POS,SPST,MINIATURE
68
PANASONIC
EVQPE104K
S1
SQUARE LIGHT TOUCH SWITCH,SMT,SPST
69
KEYSTONE
ELECTRONICS
5005
TP8
TESTPOINT,THU,COMPACT,0.125LS,130TL, RED
70
KEYSTONE
ELECTRONICS
5006
TP1, TP2, TP5, TP6, TP10
TESTPOINT,THU,COMPACT,0.125LS,130TL, BLACK
71
KEYSTONE
ELECTRONICS
5006(UN)
TP3, TP4, TP7, TP9
UNINSTALLED PART ( TEST POINT )
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AFE5804EVM
21
Schematics and Layout
www.ti.com
Table 3. Bill of Materials (continued)
Item
MFG
MFG Part Number
RefDes
Value or Function
72
KEYSTONE
ELECTRONICS
5007
TP11
TESTPOINT,THU,COMPACT,0.125LS,130TL, WHITE
73
MINI-CIRCUITS
ADTI-6T
T1(UNINSTALLED), T2
RF TRANSFORMER WIDEBAND, 0.03-125 MHz
74
BOURNS
3296W-1-103
R12
TRIMPOT,THU,10K,10%,0.5W,100ppm,25T
75
AMP
531220-2
P3, P8, P12, P21, P23
SHUNTS
76
KEYSTONE
ELECTRONICS
1892
H1,H2,H3,H4; (H3 and H4 are
UNINSTALLED)
STANDOFF HEX 4-40 THR 0.375”L ALUM
77
BUILDING
FASTENERS
PMS 440 0025 SL
H1,H2,H3,H4; (H3 and H4 are
UNINSTALLED)
SCREW MACHINE SLOTTED 4-40x1/4
22
AFE5804EVM
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Typical Performance
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5
Typical Performance
This section provides some typical performance characteristics of the AFE5804EVM to assist users in
verifying their setup.
After analysis of the data file acquired by a logic analyzer, the SNR of the AFE5804 should be better than
59 dB when the PGA is set to 30 dB, the filter is set to 12.5 MHz, the mode is set to TGC1, and Vctnl is
set as 1 V. A typical performance plot of the AFE5804 is shown in Figure 18.
(a) PGA = 30 dB, Vcntl = 1 V, Vin = 11 mVpp
(b) PGA = 30 dB, Vcntl = 0.34 V, Vin = 290 mVpp
Figure 18. Typical Performances of AFE5804
As Figure 18 shows, the SNR degrades as the gain increases; the HD degrades as the input signal
increases.
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AFE5804EVM
23
Appendix A
SLOU241A – September 2008 – Revised March 2015
TSW1400 for Evaluating AFE5804/5
This appendix describes the use of TSW1400 software to analyze data files acquired by logic analyzers.
As previously mentioned, coherent sampling is recommended when HP8644s are used. The calculation of
coherent sampling rate and signal frequency can be found in the TSW1100 user's manual (SLWU087B).
Users can set the calculated frequencies for signal generators; acquire ADC data through a logic analyzer;
and save the data as a text file. Following the steps in the order as indicated in the following figure to set
the test condition.
Figure 19. User Interface: Step-by-Step setup
24
TSW1400 for Evaluating AFE5804/5
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Appendix A
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Figure 20. User Interface: Frequency Load Value to Signal Generator
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TSW1400 for Evaluating AFE5804/5
25
Appendix A
www.ti.com
Figure 21. TSW1400 Interface
26
TSW1400 for Evaluating AFE5804/5
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Appendix A
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Figure 22. Analysis of Noncoherent Sampled Data
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27
Appendix B
SLOU241A – September 2008 – Revised March 2015
High Speed Data Converter Pro (HSDCPro) GUI
Installation
•
•
Download the HSDCPro GUI Installer using this link: HSDCPro GUI
Unzip the saved folder and run the installer executable to obtain the pop-up shown in Figure 23.
Click the Install button.
Figure 23. HSDCPro Install (Begin)
•
28
Leave the destination directories as the default location, for the TSW1400GUI installation and press
the NEXT button as shown in Figure 24.
High Speed Data Converter Pro (HSDCPro) GUI Installation
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Appendix B
www.ti.com
Figure 24. HSDCPro Install (Install Directory)
•
Read the License Agreement from Texas Instruments and select I accept the License Agreement and
press the Next button as shown in Figure 25.
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High Speed Data Converter Pro (HSDCPro) GUI Installation
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29
Appendix B
www.ti.com
Figure 25. HSDCPro Install (TI License Agreement)
•
30
Read the License Agreement from National Instruments and select I accept the License Agreement
and press the Next button as shown in Figure 26.
High Speed Data Converter Pro (HSDCPro) GUI Installation
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Appendix B
www.ti.com
Figure 26. HSDCPro Install (NI License Agreement)
•
Press the Next button as shown in Figure 27.
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High Speed Data Converter Pro (HSDCPro) GUI Installation
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31
Appendix B
www.ti.com
Figure 27. HSDCPro Install (Start Installation)
•
32
The window shown in Figure 28 should appear indicating that the installation is in progress.
High Speed Data Converter Pro (HSDCPro) GUI Installation
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Appendix B
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Figure 28. HSDCPro Install (Installation Progress)
•
The window shown in Figure 29 appears indicating Installation Complete. Press the Next button.
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33
Appendix B
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Figure 29. HSDCPro Install (Installation Complete)
•
34
The window shown in Figure 30 appears briefly to complete the process.
High Speed Data Converter Pro (HSDCPro) GUI Installation
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Appendix B
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Figure 30. HSDCPro Install (h)
•
As shown in Figure 31 a restart might be requested depending on whether or not the PC already had
the National Instruments MCR Installer. If requested, hit the Restart button to complete the installation.
Figure 31. HSDCPro Install
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35
Revision History
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Revision History
Changes from Original (September 2008) to A Revision ............................................................................................... Page
•
•
•
Changed Default Setup for Jumpers image............................................................................................ 6
Changed Appendix A to TSW1400 software. ........................................................................................ 24
Added Appendix B: High Speed Data Converter Pro (HSDCPro) GUI Installation. ............................................ 28
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
36
Revision History
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STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by
TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
SPACER
4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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