AFE5816EVM

User's Guide SLOU429A – December 2015 – Revised February 2016 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) This user’s guide gives a general overview of the AFE5816 evaluation module (EVM) and provides a general description of the features and functions to be considered while using this module. This manual is applicable to the AFE5816 analog front-end, and to the Rev. C version of the EVM hardware. The AFE5816 EVM provides a platform for evaluating the AFE under various signal, clock, reference, and ADC output formats. In addition, the EVM supports the testing of the LVDS interface. Note that if using the LVDS interface, the TSW1400EVM capture card is required. This user’s guide refers to software HMC-DAQ GUI v.2.8 or higher, and HSDCPro Software v.4.1 or higher and requires Microsoft® Windows® 7 to function. For any further questions regarding the EVM, GUI or device, please contact: AFE5816-support@list.ti.com Contents EVM Hardware Overview ................................................................................................... 4 GUI Software Installation ................................................................................................... 5 Quick Views of Evaluation Setups for LVDS Interface.................................................................. 6 3.1 Equipment Setup Overview ....................................................................................... 6 4 Testing the EVM Data Capture With LVDS ............................................................................. 8 4.1 EVM Hardware Setup .............................................................................................. 8 4.2 Capturing an Analog Input Signal With the LVDS Interface ................................................. 10 5 Testing the EVM in CW Mode ............................................................................................ 16 Appendix A Software Installation .............................................................................................. 18 Appendix B Hardware Configuration .......................................................................................... 31 Appendix C Triggering Options................................................................................................. 35 Appendix D Common Hardware Modifications ............................................................................... 37 Appendix E Hardware Reference .............................................................................................. 38 Appendix F FAQ and Troubleshooting ........................................................................................ 59 1 2 3 List of Figures 1 AFE5816 EVM Hardware Overview ....................................................................................... 4 2 Provided Power Cable for J1 Connector 3 LVDS Evaluation Setup Overview ......................................................................................... 6 4 TSW1400EVM and AFE5816 EVM Hardware Setup for LVDS Capture 5 Connect to TSW EVM (TSW1400 Shown).............................................................................. 10 6 Connect to TSW EVM ..................................................................................................... 10 7 Choose Firmware (AFE5818 Shown).................................................................................... 10 8 Update Firmware?.......................................................................................................... 11 9 Firmware Download Progress Bar ....................................................................................... 11 10 TSW LEDs Turn On After FW Download ............................................................................... 11 11 Launching Device GUI EXE 12 HMC-DAQ GUI Launches ................................................................................................. 12 13 Clock Configuration on AFE EVM for LVDS 14 15 ................................................................................. ............................................ .............................................................................................. ........................................................................... AFE_RST Hardware Reset Button ....................................................................................... Software Reset Button ..................................................................................................... SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 5 8 12 13 13 13 1 www.ti.com 16 Initialize Device ............................................................................................................. 14 17 GUI Quick Start Setup: Output Data Configuration .................................................................... 14 18 LED D5 Turns On When ADC is Ready 19 Choose VCA Gain .......................................................................................................... 15 20 Capture Button.............................................................................................................. 15 21 Analog Input Capture ...................................................................................................... 15 22 Initialize Device ............................................................................................................. 16 23 CW Mode Preset ........................................................................................................... 16 24 .................................................................................................................. HSDCPro Install (Begin)................................................................................................... HSDCPro Install (TI License Agreement) .............................................................................. HSDCPro Install (TI License Agreement) ............................................................................... HSDCPro Install (Install Directory) ....................................................................................... HSDCPro Install (Installation Ready) .................................................................................... HSDCPro Install (Cypress Driver Install) ................................................................................ HSDCPro Install (Continue Cypress Driver Installation) .............................................................. HSDCPro Install (Continue Driver Installation) ......................................................................... HSDCPro Install (Finish Installation)..................................................................................... HMC-DAQ GUI Install (Begin Installation) .............................................................................. HMC-DAQ GUI Install (TI License Agreement) ........................................................................ HMC-DAQ GUI Install(NI License Agreement) ......................................................................... HMC-DAQ GUI Install (Install Directory) ................................................................................ HMC-DAQ GUI Install (Installation Ready) ............................................................................ HMC-DAQ GUI Install (Installation Progress) .......................................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ...................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ...................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ..................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ..................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ..................................................... HMC-DAQ GUI Install (LabView Run-time Engine Installation) ...................................................... HMC-DAQ GUI Install: (LabView RTE Cancel, if Installed Already)................................................. HMC-DAQ GUI Install (Finished) ........................................................................................ Default Jumper Positions ................................................................................................. EVM ADC Clock Source Configuration .................................................................................. EVM ADC Clock Source Configuration Examples ..................................................................... HSDCPro Trigger Configuration for SW ................................................................................. HSDCPro Trigger Configuration for SW trigger ........................................................................ HSDCPro Trigger Configuration for HW ................................................................................ HSDCPro Trigger Configuration for HW External Trigger ............................................................ AFE5816 EVM Circuits Map .............................................................................................. AFE5816 EVM Block Diagram ........................................................................................... AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ AFE5816 Rev C EVM Schematic ........................................................................................ 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 2 ................................................................................ CW Output AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) 14 17 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 29 29 30 31 33 34 35 35 36 36 38 39 40 41 42 43 44 45 46 47 SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated www.ti.com 65 AFE5816 Rev C EVM Schematic ........................................................................................ 48 66 AFE5816 Rev C EVM Schematic ........................................................................................ 49 67 AFE5816 Rev C EVM Schematic ........................................................................................ 50 68 AFE5816 Rev C EVM Schematic ........................................................................................ 51 69 AFE5816 Rev C EVM Schematic ........................................................................................ 52 70 Enable .NET Framework .................................................................................................. 59 71 Read DDR Error for No Capture ......................................................................................... 60 List of Tables 1 Default Header Configuration Table Rev.C ............................................................................. 32 2 EVM Rev.C Testpoints 3 .................................................................................................... AFE5816 EVM Bill of Materials .......................................................................................... SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 32 53 3 EVM Hardware Overview 1 www.ti.com EVM Hardware Overview Figure 1. AFE5816 EVM Hardware Overview The EVM received should resemble Figure 1. For more hardware details and the default jumper map, see Appendix B. 4 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated GUI Software Installation www.ti.com The AFE5816 EVM kit contains the following items: 1. AFE5816 EVM 2. 1 mini-USB cable 3. Power cable with barrel connector Figure 2. Provided Power Cable for J1 Connector 2 GUI Software Installation The AFE5816 EVM and the TSW capture card EVM have individual software and both require software installations. Ensure that no USB connections are made to the EVMs until after the installations are complete. This user’s guide refers to software HMC-DAQ GUI v.2.8 or higher, and HSDCPro Software v.4.1 or higher. See the HSDCPro Installation section for information on the installation of the TSW EVM Software GUI (HSDCPro). For information on the installation of the AFE5816 EVM Software GUI (HMC-DAQ GUI), see the HMC-DAQ GUI Installation section. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 5 Quick Views of Evaluation Setups for LVDS Interface 3 www.ti.com Quick Views of Evaluation Setups for LVDS Interface The AFE5816 EVM is tested using the TSW1400EVM for LVDS data interface. 3.1 Equipment Setup Overview As shown in Figure 3, mating the AFE5816 EVM with a TSW EVM allows for testing using the data interface. Figure 3. LVDS Evaluation Setup Overview TSW Capture Card EVM: The TSW1400 EVM is required for capturing data from the AFE5816EVM and its analysis using the graphical user interface (GUI), called High Speed Data Converter Pro (HSDCPro). For more information on the TSW1400EVM, see: TSW1400EVM. Power Supply: A barrel connector power cable is provided with the EVM and is connected at J1, but does not support the –5 V needed for the CW mode circuit. This requires an additional cable, not provided. This 5-V power supply must be able to source up to 2 A, and –5-V supply must provide up to 1 A. The –5V supply is used for the negative supply of amplifiers in the CW output external circuitry. The TSW1400 EVM is powered through a power cable similar to Figure 2 that is provided with its own EVM kit. USB Interface to PC: The USB connections from the AFE5816EVM and TSW EVM to the PC are used for communication from the GUIs to the boards. USB 2.0 or 3.0 ports are both acceptable. 6 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Quick Views of Evaluation Setups for LVDS Interface www.ti.com Equipment: Signal generators (with low-phase noise) must be used as source of the input signal (0.01 MHz to 40 MHz) for optimal performance. An on-board crystal oscillator option is provided so that an external clock source is not needed for basic capture. Additionally, for best performance a band-pass filter (BPF) is recommended on the analog input signal to attenuate the harmonics and noise from the signal. For coherent sampling or custom sample rate, an external clock is provided to J35 (GUI configuration is required for the external clock configuration). For more information on clock configuration, see Section B.1.3. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 7 Testing the EVM Data Capture With LVDS 4 www.ti.com Testing the EVM Data Capture With LVDS This section outlines (1) the external connections required to test the AFE5816 EVM using the LVDS interface, (2) how to setup the GUIs for testing, and (3) how to capture an analog input signal. 4.1 EVM Hardware Setup Make the connections shown in Figure 4 or for proper hardware setup. Figure 4. TSW1400EVM and AFE5816 EVM Hardware Setup for LVDS Capture 1. Board Mating: For LVDS data, mate the TSW1400 EVM at connector J3 to the AFE5816 EVM at connector J59 through the high-speed ADC interface connector. 2. Power Supply: Connect a 5-V (2-A) power supply using the provided power cable to J12 (+5V_IN) of the TSW1400 EVM. See the TSW manual for more information, if needed. Next, connect a 5-V (2-A) power supply using the provided power cable to J1 of the AFE5816 EVM. Connect the white-striped side of this cable to the 5-V power supply. Optionally, connect a –5-V (1-A) supply at J3 or TP3 if using the CW circuit. No cable is provided for this. Turn on the TSW1400 at the SW7 switch. 3. USB: After installing the GUIs as shown in Appendix A, connect the USB cable from PC to J5 (USB) located on the top side of the AFE5816 EVM. Connect the USB cable from PC to J5 (USB_IF) of the TSW1400 EVM. USB 2.0 or 3.0 ports are both acceptable for both EVMs. Note: TI recommends that the PC USB port be able to support USB2.0. If unsure, always choose the USB ports at the back of the PC chassis over ones located on the front or sides. 4. Equipment: Connect a sine wave generator to SMA J6, INP1. Set the frequency to 5 MHz and the amplitude to –30 dBm. For best performance, a 5-MHz band-pass filter (BPF) is recommended on the 8 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Testing the EVM Data Capture With LVDS www.ti.com analog input signal to attenuate the harmonics and noise from the signal. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 9 Testing the EVM Data Capture With LVDS 4.2 www.ti.com Capturing an Analog Input Signal With the LVDS Interface This section describes the software setup for capturing an analog input using the AFE5816 EVM. If there is any issue with a data capture, refer to the troubleshooting section. Data capture is confirmed by using only the Quick Setup page of the HMC-DAQ GUI. Assuming the hardware is connected correctly as in Section 4.1, follow these steps to acquire data: HSDCPro Actions: 1. Connect both EVMs to the PC using two USB cables as instructed in Section 4.1. 2. Open HSDCPro GUI using Run as Administrator. Do not open the HMC-DAQ GUI before this step because it opens automatically. If it is already open, close it. 3. If the TSW Hardware is already connected to the USB, then a pop-up window should appear to connect the HSDCPro GUI to the EVM Hardware. Figure 5. Connect to TSW EVM (TSW1400 Shown) 4. A pop-up window prompts the user to choose a firmware to download to the TSW EVM FPGA. Figure 6. Connect to TSW EVM 5. Select firmware as ' AFE5816'. Be sure to choose the correct device to match the hardware or the HMC-DAQ GUI shows an error when launching. Figure 7. Choose Firmware (AFE5818 Shown) 10 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Testing the EVM Data Capture With LVDS www.ti.com 6. When prompted to update firmware, click the Yes button. Figure 8. Update Firmware? 7. The firmware begins downloading to the FGPA on the TSW EVM. Figure 9. Firmware Download Progress Bar 8. When the firmware has finished downloading, several Green LEDs are lit on the TSW EVM. For the TSW1400, D5 (USER_LED3) may be on, and D6 is off. Figure 10. TSW LEDs Turn On After FW Download 9. The AFE5816 EVM GUI (HMC-DAQ) opens automatically at this time. Wait until this is finished to continue. If any errors arise at this time, consult a TI engineer. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 11 Testing the EVM Data Capture With LVDS www.ti.com Figure 11. Launching Device GUI EXE Figure 12. HMC-DAQ GUI Launches 10. In HSDCPro, change the Test Selection to Single Tone' 11. In HSDCPro, change the window type to Blackman HMC-DAQ GUI Actions: 1. Verify the clock configuration by matching J36, J34, J31, and J37 to Figure 13. 12 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Testing the EVM Data Capture With LVDS www.ti.com Figure 13. Clock Configuration on AFE EVM for LVDS 2. Press the AFE_RST button on the AFE EVM, located above the AFE device (SW1). Hold for 1 second. Alternatively, press the DUT RESET button on the HMC-DAQ GUI. Figure 14. AFE_RST Hardware Reset Button Figure 15. Software Reset Button 3. Press the Initialize Device button on the HMC-DAQ GUI. The progress bar indicates the device is configured over SPI. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 13 Testing the EVM Data Capture With LVDS www.ti.com Figure 16. Initialize Device 4. Choose the desired serialized data format in the Output Format control. 5. The default ADC Format is Analog Input. This requires no action. Figure 17. GUI Quick Start Setup: Output Data Configuration 6. At this point, D5 on the TSW1400 EVM should turn on. If this is not the case, please consult the Appendix F section. There is most likely an ADC clock issue. Figure 18. LED D5 Turns On When ADC is Ready 1. Choose VCA GAIN as Mid Gain. 14 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Testing the EVM Data Capture With LVDS www.ti.com Figure 19. Choose VCA Gain 2. Return to HSDCPro, and press the Capture button. A capture similar to that shown in Figure 21 appears. The quality of the output spectrum depends heavily on the coherency and the purity of the input signal and clock. Since it is not possible to sync the input signal with the on-board clock, TI recommends using a window in HSDCPro (found at the top of the spectrum graph). Blackman or Hanning works, do not use Rectangular. Figure 20. Capture Button Figure 21. Analog Input Capture SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 15 Testing the EVM in CW Mode 5 www.ti.com Testing the EVM in CW Mode Demonstrating the CW mixer in the AFE is done by following these steps: 1. In the HMC-DAQ GUI, initialize the device by pressing the Initialize Device button. Figure 22. Initialize Device 2. Choose "CW: 16x 1.953 MHz" Figure 23. CW Mode Preset 3. Connect a sine wave generator to SMA J6, INP1 or any other channel. Set the frequency to 1.963125 MHz and the amplitude to –20 dBm. 4. Connect two cables to an oscilloscope with timebase 40 µs and 500 mV/div. Input resistance should be 50 Ω on each scope channel. 5. Connect those two cables to SMAs, J53 and J57. 6. The oscilloscope displays the frequency I and Q signals at 10 kHz as shown in Figure 24. The amplitude should be around 1.3 Vpp ±200 mVpp, though this amplitude may change. The frequency should be 10 kHz and signals should be 90 degrees out of phase. 7. Trigger the oscilloscope on either channel. 16 AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Testing the EVM in CW Mode www.ti.com Figure 24. CW Output SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback AFE5816 16-Channel Analog Front End Evaluation Module (EVM Rev. C) Copyright © 2015–2016, Texas Instruments Incorporated 17 Appendix A SLOU429A – December 2015 – Revised February 2016 Software Installation Section A.1 provides detailed procedures for installing High Speed Data Converter Pro (HSDCPro), the software GUI used to control a suite of FPGA capture solutions including the TSW1400. Section A.2 provides details for installing Healthtech Multi-Channel Data Acquisition (HMC-DAQ), the software GUI which controls a suite of AFE and ADC solutions, including the AFE5816. A.1 High Speed Data Converter Pro (HSDCPro) GUI Installation Go to the HSDCPro website. Under Technical Documents, find the Software section and download and save the High Speed Data Converter Pro GUI Installer to the local PC hard drive. 1. Unzip the saved file and run the installer executable (Run as Administrator) to obtain the menu shown in Figure 25. 2. Click the Next button. Figure 25. HSDCPro Install (Begin) 18 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated High Speed Data Converter Pro (HSDCPro) GUI Installation www.ti.com 3. Read the License Agreement from Texas Instruments and select I accept the License Agreement, then press the Next button as shown in Figure 26. Figure 26. HSDCPro Install (TI License Agreement) 4. Read the License Agreement from Texas Instruments and select I accept the agreement, then press the Next button as shown in Figure 27. Figure 27. HSDCPro Install (TI License Agreement) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 19 High Speed Data Converter Pro (HSDCPro) GUI Installation www.ti.com 5. Allow the installation to be placed in the default directory by clicking Next, as in Figure 28. Figure 28. HSDCPro Install (Install Directory) 6. Click Next to begin the installation, as in Figure 29. Figure 29. HSDCPro Install (Installation Ready) 20 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated High Speed Data Converter Pro (HSDCPro) GUI Installation www.ti.com 7. The Cypress Driver begins installing as shown in Figure 30. Figure 30. HSDCPro Install (Cypress Driver Install) 8. Click Finish to continue installation, as shown in Figure 31. Figure 31. HSDCPro Install (Continue Cypress Driver Installation) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 21 High Speed Data Converter Pro (HSDCPro) GUI Installation www.ti.com 9. Continue Driver Installation, as in Figure 32. Figure 32. HSDCPro Install (Continue Driver Installation) 10. Finish HSDCPro installation by choosing the installation options and pressing Finish, as in Figure 33. Figure 33. HSDCPro Install (Finish Installation) 22 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated HMC-DAQ GUI Installation www.ti.com A.2 HMC-DAQ GUI Installation Check the ti.com product folder for the relevant device, such as http://www.ti.com/tool/AFE5816EVM. Scroll down the page to the Software section for the software GUI link. 1. Unzip the saved file and run the installer executable as administrator by right clicking on the file and selecting Run as Administrator. Press the Next button once the graphic in Figure 34 appears. Figure 34. HMC-DAQ GUI Install (Begin Installation) 2. Read the Texas Instruments License Agreement and select I accept the agreement followed by the Next button, as in Figure 35. Figure 35. HMC-DAQ GUI Install (TI License Agreement) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 23 HMC-DAQ GUI Installation www.ti.com 3. Read the National Instruments License Agreement and select I accept the agreement followed by the Next button, as in Figure 36. Figure 36. HMC-DAQ GUI Install(NI License Agreement) 4. Allow the software to be installed in the default location by pressing the Next button, as in Figure 37. Figure 37. HMC-DAQ GUI Install (Install Directory) 24 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated HMC-DAQ GUI Installation www.ti.com 5. Pressing the Next button begins installation, as shown in Figure 38. Figure 38. HMC-DAQ GUI Install (Installation Ready) 6. The window shown in Figure 39 appears showing that the installation is in progress. Figure 39. HMC-DAQ GUI Install (Installation Progress) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 25 HMC-DAQ GUI Installation www.ti.com 7. Press the Next button to install the required Labview Run Time Engine, as in Figure 40. Figure 40. HMC-DAQ GUI Install (LabView Run-time Engine Installation) 8. Press the Next button, as in Figure 41. Figure 41. HMC-DAQ GUI Install (LabView Run-time Engine Installation) 26 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated HMC-DAQ GUI Installation www.ti.com 9. Press the Next button, as in Figure 42. Figure 42. HMC-DAQ GUI Install (LabView Run-time Engine Installation) 10. Press the Next button, as in Figure 43. Figure 43. HMC-DAQ GUI Install (LabView Run-time Engine Installation) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 27 HMC-DAQ GUI Installation www.ti.com 11. Press the Next button, as in Figure 44. Figure 44. HMC-DAQ GUI Install (LabView Run-time Engine Installation) 12. The run-time engine installs unless it has already been detected as should be the case if the HSDCPro GUI was already installed. In this case, the following message appears. Press the Cancel button, as in Figure 45. 28 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated HMC-DAQ GUI Installation www.ti.com Figure 45. HMC-DAQ GUI Install (LabView Run-time Engine Installation) 13. Press the Yes button to confirm, as in Figure 46. Figure 46. HMC-DAQ GUI Install: (LabView RTE Cancel, if Installed Already) 14. Press the Finish button, as in Figure 47. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Software Installation 29 HMC-DAQ GUI Installation www.ti.com Figure 47. HMC-DAQ GUI Install (Finished) HMC-DAQ is launched automatically from HSDCPro, once a device has been selected. Therefore, there is no need to launch HMC-DAQ manually and there is no need for a desktop shortcut. 30 Software Installation SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Appendix B SLOU429A – December 2015 – Revised February 2016 Hardware Configuration B.1 EVM Headers, Test Points, and Configuration This section describes the functions of the headers on the EVM. It also provides a list of test points on the EVM that are useful for debug and general-use purposes. B.1.1 EVM Header Configuration The AFE5816 EVM is flexible in its configurability through the use of 2- and 3-pin headers. The default configuration of the EVM is set to facilitate initial testing, requiring minimal bench equipment. Figure 48 shows the default positions of all headers. Figure 48. Default Jumper Positions SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Hardware Configuration 31 EVM Headers, Test Points, and Configuration www.ti.com Table 1 lists the default header configurations and descriptions. Table 1. Default Header Configuration Table Rev.C Jumper B.1.2 Circuit Description Pin Numbers Selection J3 Power Supply ±5V Input Power Connector - - J4 USB/SPI SPI Signals Probe Point – – J23 PDN PDN_Global – – J24 PDN PDN_Fast – – J37 ADC Clock OSC1 Xtal Power supply +3.3VD 1-2 3.3V J36 ADC Clock Clk source selector for SE Xtal or Diff 2-4,1-3 Differential J34 ADC Clock Diff CLK Source selector, Ext Xfmr or LMK 3-5, 4-6 LMK CLK J38 CW CLK 16x CLK Source Selector 1-2 Ext J40 CW CLK 1x CLK Source Selector 1-2 Ext J50 DTGC DTGC Digital Input Signals – – J51 DTGC GND for Dig Input Signals – – J42 DTGC CPLD JTAG Programming Header – – J44 DTGC CPLD GPIO – – J30 LMK LMK Chip Reset – – J29 LMK LMK Supply for 125M Xtal – – J33 LMK PS for 100 MHz VCO 1-2 3.3V J31 LMK Input Clk selector for Clkin1 (xtal/J32 SMA) 1-2 125 MHz Xtal J45 Vcnt VCntl AFE pin selector, GND or Amp 2-3 Amp J46 Vcnt Vcntl Amp voltage source, pot or SMA 2-3 Pot J47 Vcnt SE-to-Diff Amp Bypass 1-2 Bypassed J49 Vcnt Vcntl Amp CM voltage to GND – – J26 LNA TR Enable TR_EN 1-4 – – J52/54 CW Output CW In-phase Output M/P – – J56/58 CW Output CW Quadrature-phase Output M/P – – EVM Testpoints Table 2 lists all test points on the AFE5816 EVM and their purposes. Table 2. EVM Rev.C Testpoints 32 Testpoint Circuit Label Testpoint Description TP2,11–14 GND GND Digital Ground Reference for EVM TP16,17,56 GND AGND Analog Ground Reference for EVM TP18 GND USB_GND USB Ground Reference for EVM TP1 Power Supply +5V_IN +5V_IN TP3 Power Supply -5V_IN -5V supply for Op-Amp circuitry TP4 Power Supply AVDD_1.8 AFE +1.8V analog supply TP5 Power Supply DVDD_1.8 AFE +1.8V digital supply TP6 Power Supply DVDD_1.2 AFE +1.2V digital supply TP7 Power Supply OPAMP- -5V Supply for Vcntl circuit TP8 Power Supply +3.3VA +3.3VA TP9 Power Supply AVDD_H AFE analog supply for 5V or 3.3V TP10 Power Supply None +5V Supply for Op Amp circuitry TP15 Power Supply AVDD_M AFE analog supply for 1.9V or 3.3V TP36 Power Supply +Vs +5V Supply for CW Op Amp circuitry TP37 Power Supply –Vs -5V Supply for CW Op Amp circuitry TP19–34 Analog Inputs INPx Analog Input Channel 1-16 TP39 DEMOD TX_TRG TX_Trig input TP52 DTGC None Ext TGC_Profile2 Input TP50 DTGC None Ext TGC_Profile1 Input Hardware Configuration SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated EVM Headers, Test Points, and Configuration www.ti.com Table 2. EVM Rev.C Testpoints (continued) B.1.3 Testpoint Circuit Label Testpoint Description TP51 DTGC TGC_SLP Ext TGC_Slope TP35 DTGC TGC_UD Ext TGC_Up/Down TP40,41 LMK Clock Circuit CP1,CP2 LMK Output CP1,CP2 TP42 LMK Clock Circuit CLK_GTXP LMK GTX CLK to FPGA P TP43 LMK Clock Circuit FPGA_SYSREF P LMK SYSREF CLK to FPGA P TP44,46 LMK Clock Circuit None LMK ADC Clock to Dut P/N TP45,47 LMK Clock Circuit None LMK SYSREF Clock to Dut P/N TP48 LMK Clock Circuit FPGA_CLK_OUT LMK ADC CLK to FPGA P _P TP49 LMK Clock Circuit None LMK VCXO output ADC Clock Source Configuration The AFE clock input can be driven differentially (sine wave, LVPECL, or LVDS) or single-ended (LVCMOS). The clock input of the device has an internal buffer and clock amplifier which is enabled or disabled automatically, depending on the type of clock provided (auto detect feature). Therefore, the EVM allows for two options of clock input for LVDS mode (S-E and Differential), and two options of clock input for JESD204B mode (Differential). Figure 49. EVM ADC Clock Source Configuration SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Hardware Configuration 33 EVM Headers, Test Points, and Configuration www.ti.com Figure 50. EVM ADC Clock Source Configuration Examples Configuration 1 (LVDS Only): To use the on-board single-ended crystal oscillator as the clock source for the AFE, connect shunt jumpers for configuration 1 (as seen in Figure 50). Use this configuration for LVDS Data output only, not JESD204B. Note: J37 powers the on-board oscillator with 3.3 V, due to the power limitations of the VCC1-3B3-40M0000 low-jitter crystal oscillator. The recommended ADC clock input for new designs is to use low-jitter square signals (LVCMOS levels, 1.8-V amplitude.) Configuration 2 (LVDS Only): To use the differential direct external clock as the clock source for the AFE, connect shunt jumpers for configuration 2. Use this configuration for LVDS Data output only, not JESD204B. Also, connect a single-ended external clock generator to SMA J35. Set the clock source to an appropriate frequency, such as 10 MHz to 80 MHz, and +15-dBm amplitude. Configuration 3 (Default): This mode uses an on-board crystal to stimulate the LMK04826 in Dual-PLL mode. To use the differential outputs from the LMK04826 as the clock source for the AFE, connect shunt jumpers for configuration 3. Ensure that jumper J29 is installed. Configuration 4: This mode uses an external generator at J32 to stimulate the LMK04826 in Clock Distribution mode. To use the differential outputs from the LMK04826 as the clock source for the AFE, connect shunt jumpers for configuration 4. Also, connect an external clock generator to J32. Set the clock source to 400 MHz, and +15-dBm amplitude. Consult a TI engineer to use this mode. 34 Hardware Configuration SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Appendix C SLOU429A – December 2015 – Revised February 2016 Triggering Options Software Trigger One method of triggering the TSW EVM, AFE EVM as well as other bench equipment such as function generators is to generate the trigger from the TSW EVM itself. This requires a feedback loop from the TSW trigger output to the TSW trigger input using a short SMA cable. Secondly, a second trigger output from the TSW board can be routed to the AFE EVM, if needed, or to external bench equipment such as a function generator. See the TSW or HSDCPro manual for more information. Figure 51. HSDCPro Trigger Configuration for SW Figure 52. HSDCPro Trigger Configuration for SW trigger SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Triggering Options 35 Appendix C www.ti.com External Trigger Another method of triggering the TSW EVM and AFE EVM as well as other bench equipment such as function generators is to generate the trigger from a bench trigger source such as the function generator. This requires feeding the trigger source to the TSW trigger input using an SMA cable. Secondly, a second trigger output from the trigger source can be routed to the AFE EVM, if needed. See the TSW or HSDCPro manual for more information. Figure 53. HSDCPro Trigger Configuration for HW Figure 54. HSDCPro Trigger Configuration for HW External Trigger 36 Triggering Options SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Appendix D SLOU429A – December 2015 – Revised February 2016 Common Hardware Modifications Low Frequency Support For low-frequency applications, such as SONAR, that require bandwidth below 200 kHz, the default assembly of the EVM results in attenuation in this range, and the EVM requires hardware modification. Simply change all INP and INM capacitors on the LNA inputs to 1 µF (0402). Also, set the internal HPF in the AFE to the lowest setting. This should support a bandwidth as low 50 kHz, or lower. External SPI Programming The AFE EVM allows for external access to the SPI bus for the AFE only, not the LMK device. This is done by connecting SPI signals at J4 and removing R22 near U9 on the bottom side of the board. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Common Hardware Modifications 37 Appendix E SLOU429A – December 2015 – Revised February 2016 Hardware Reference E.1 AFE5816 EVM Hardware Overview The following images give an overview illustration of the EVM hardware. Figure 55. AFE5816 EVM Circuits Map 38 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Hardware Overview www.ti.com Figure 56. AFE5816 EVM Block Diagram SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Hardware Reference 39 AFE5816 EVM Schematic E.2 www.ti.com AFE5816 EVM Schematic Figure 57 through Figure 69 illustrate the EVM schematics. Input Power Connector TP1 J1 +5V IN IN 1 +5V IN 3 2 GND J2 J3 1 2 3 1 2 3 -5V IN IN TP2 TP3 GND LMK and CW Power Supply AFE Power Supply U10 2 TP4 +1.8VD IN OUT 120 ohm C2 22uF C3 0.1uF 1 C5 0.1uF 22uF C1 EN 5 AVDD_1.8 FB2 4 120 ohm TP5 DVDD_1.8 +3.3VD FB3 LMK 120 ohm GND GND NR/FB TPS79633DCQR U2 FB4 +5V IN 2 120 ohm 1 3 6 C6 C7 22uF IN OUT EN NR LMKBUF_VCC FB5 4 120 ohm 5 GND 0.1uF C4 22uF C8 0.1uF 6 FB1 +5V IN 3 +1.8V TPS79618DCQR GND GND GND U3 +1.2V FB6 +5V IN 2 TP6 IN OUT DVDD_1.2 FB7 4 120 ohm 120 ohm 1 C10 22uF C9 22uF EN C11 0.1uF 5 GND GND NR/FB 3 6 CW -5V TPS79601DCQR R1 TP7 -5V IN GND 0 FB8 -5VSS OPAMP- DNP 120 ohm C12 22uF C14 30k FB9 120 ohm R2 C13 0.1uF 470pF GND AGND U4 AVDD_H +5V IN FB10 +5VA 2 +3.3VA IN TP8 TP9 FB11 4 OUT AVDD_H 120 ohm 120 ohm C16 C18 22uF 0.1uF C15 22uF C17 0.1uF 1 EN 5 NR/FB +5VA FB12 DNP 120 ohm 3 6 GND GND AGND TPS79601DCQR R4 5.1k R5 C19 160pF 3.01k AGND TP10 +5VA +5V IN FB13 OPAMP+ FB14 DNP +5V_SRC 120 ohm 120 ohm C20 0.1uF C21 22uF +1.8VD +3.3VA +5V_SRC OPAMP- AGND TP11 TP12 TP13 TP14 U5 +5V IN FB15 2 TP15 IN OUT 4 120 ohm R6 AVDD_M FB16 C22 0.1uF C24 22uF AVDD_M 1 5 TP16 332 120 ohm D3 Red D2 Super Red R8 C23 22uF EN GND GND NR/FB R9 3 6 R12 196 R11 510 TP17 R7 D1 Orange 0 0 D4 Super Red R10 332 0 GND AGND TPS79601DCQR AGND R13 1.65k R14 3.01k GND C25 AGND 270pF AGND Device AFE58xx16 AFE58xx18 Vout R13 1.9V 1.66k 3.3V 5.1k R14 3.01k 3.01k C25 280pF 158pF Figure 57. AFE5816 Rev C EVM Schematic 40 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com USB Digital Isolator USB Connector and FTDI Port Level Translator J4 +3.3VD 1 2 3 4 5 +3.3_ISO R19 0 U6 +5V_USB 1 SCLK_PRE C26 0.1uF U7 J5 VBUS D- 2 3 ID 4 GND 5 USB_D- +5V_USB 120 ohm +5V_USB 20 USB_D- 16 USB_D+ USB_D+ C30 47pF C32 47pF 15 19 C31 0.1uF VCCIO D0 1 SCLK_PRE VCC D1 5 SDATA_PRE 3 SEN_PRE D2 USBDP D3 11 AFE_RST_PRE D4 2 DIG_SPI_EN_PRE D5 9 USB_LED_PRE 10 SDOUT_POST 6 LMK_CS_PRE RESET# 27 28 OSCI OSCO 17 3V3OUT D6 D7 USB_GND C33 0.1uF C34 0.1uF 26 25 18 21 7 8 USB_GND RXF 23 TXE# 22 TEST RD# AGND GND GND GND NC VCC2 INA OUTA INB OUTB INC OUTC 6 IND OUTD 7 NC EN 2 8 GND1 GND1 SEN_PRE 5 SDATA_PRE USB_GND USBDM TP18 6 7 D+ 4 FB17 1 DIG_SPI_EN_PRE4 +3.3_ISO VCC1 GND2 GND2 0 0 0 0 0 TSW_GPIO_4 TSW_GPIO_5 TSW_GPIO_6 TSW_GPIO_7 TSW_GPIO_10 +3.3_ISO +1.8VD 16 U8 14 SCLK_3.3 13 DIG_SPI_3.3 12 SEN_3.3 11 SDATA_3.3 C27 0.1uF C28 0.1uF 1 VCCA 2 1DIR GND SCLK_3.3 GND DIG_SPI_3.3 4 5 10 USB_SPI_EN 3 15 9 SEN_3.3 SDATA_3.3 6 7 2B1 2B2 2DIR 2OE 2A1 2A2 GND 13 12 SEN SDATA SCLK DIG_SPI_EN 8 9 GND GND GND GND 11 10 14 1B1 1B2 ISO7140CCDBQR USB_GND 15 1OE 1A1 1A2 C29 0.1uF 16 VCCB SN74AVC4T245PWR GND +3.3_ISO U9 13 +5V_USB WR 14 PWREN# 12 NC 24 C36 0.1uF FT245RL USB_GND 1 VCC1 VCC2 16 LMK_CS_PRE 3 INA OUTA 14 AFE_RST_PRE 4 INB OUTB 13 RESET_3.3 USB_LED_PRE 5 OUTC 12 USB_LED SDOUT_POST 6 INC OUTD 7 EN1 2 8 GND1 GND1 ISO7141CCDBQR 11 SDOUT_PRE EN2 10 USB_SPI_EN GND2 GND2 15 9 IND C35 0.1uF LMK_CS RESET_3.3 R21 510 GND AFE_RESET R3 604 GND R22 0 GND USB_GND USB_LED 1 3.3V_USB_RX 8 9 USB_GND 3 SCLK_3.3 R15DNP DIG_SPI_3.3 R16 DNP SEN_3.3 R17DNP SDATA_3.3 R18 DNP SDOUT_PRE R20 DNP U20 +3.3_ISO R23 100 +1.8VD 1 2 D5 Super Red C260 0.1uF SDOUT_PRE 3 5 GND VCCA A DIR VCCB 6 B 4 GND SN74AVCH1T45DBVR SDOUT C261 0.1uF 2 GND GND Figure 58. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 41 AFE5816 EVM Schematic www.ti.com 1 ANALOG INPUTS TP19 TP20 J6 DNP J7 SMA_INP1 DNP INP Caps SMA_INP9 INM Caps ACT Caps (AFE58xx18 only) 2 3 4 5 1 2 3 4 5 1 INP[1..16] INP[1..16] TP21 J8 DNP 1 INM[1..16] J9 DNP SMA_INP10 R24 49.9 SMA_INP1 R25 49.9 SMA_INP2 C37 0.01µF INP1 0.01µF INP2 C38 DNP 0.015uF C40 DNP 0.015uF C43 DNP 0.015uF C46 DNP 0.015uF C48 DNP 0.015uF C51 DNP 0.015uF C54 DNP 0.015uF C56 DNP 0.015uF C59 DNP 0.015uF C62 DNP 0.015uF C64 DNP 0.015uF C67 DNP 0.015uF C70 DNP 0.015uF C72 DNP 0.015uF C75 DNP 0.015uF C78 DNP 0.015uF 2 3 4 5 2 3 4 5 1 R26 TP23 J10 DNP 1 49.9 SMA_INP3 C42 C45 0.01µF INP3 TP24 SMA_INP3 J11 DNP SMA_INP11 R27 49.9 SMA_INP4 R28 49.9 SMA_INP5 C50 0.01µF INP4 0.01µF INP5 2 3 4 5 2 3 4 5 1 R29 TP25 J12 DNP 1 49.9 SMA_INP6 49.9 SMA_INP7 C53 C58 0.01µF INP6 0.01µF INP7 TP26 SMA_INP4 J13 DNP R30 SMA_INP12 C61 2 3 4 5 2 3 4 5 1 TP27 J14 DNP TP28 J15 SMA_INP5 DNP SMA_INP13 R31 49.9 SMA_INP8 C66 0.01µF INP8 R32 49.9 SMA_INP9 C69 0.01µF INP9 R33 49.9 SMA_INP10 C74 0.01µF INP10 2 3 4 5 1 2 3 4 5 1 TP29 TP30 J16 DNP J17 SMA_INP6 ACT[1..16] ACT[1..16] DNP SMA_INP14 R34 49.9 SMA_INP11 R35 49.9 SMA_INP12 C80 R36 49.9 SMA_INP13 49.9 SMA_INP14 C82 R38 49.9 SMA_INP15 R39 49.9 SMA_INP16 C84 C77 C81 0.01µF INP11 0.01µF INP12 0.01µF INP13 0.01µF INP14 0.01µF INP15 0.01µF INP16 INM1 SMA_INP1 1uF C39 DNP ACT1 INM2 SMA_INP2 1uF C41 DNP ACT2 INM3 SMA_INP3 1uF C44 DNP ACT3 INM4 SMA_INP4 1uF C47 DNP ACT4 INM5 SMA_INP5 1uF C49 DNP ACT5 INM6 SMA_INP6 1uF C52 DNP ACT6 INM7 SMA_INP7 1uF C55 DNP ACT7 INM8 SMA_INP8 1uF C57 DNP ACT8 INM9 SMA_INP9 1uF C60 DNP ACT9 INM10 SMA_INP10 1uF C63 DNP ACT10 INM11 SMA_INP11 1uF C65 DNP ACT11 INM12 SMA_INP12 1uF C68 DNP ACT12 INM13 SMA_INP13 1uF C71 DNP ACT13 INM14 SMA_INP14 1uF C73 DNP ACT14 INM15 SMA_INP15 1uF C76 DNP ACT15 INM16 SMA_INP16 1uF C79 DNP ACT16 AGND 2 3 4 5 1 2 3 4 5 1 INM[1..16] TP22 SMA_INP2 R37 TP31 TP32 J19 DNP 1 DNP SMA_INP15 SMA_INP7 C83 2 3 4 5 1 J18 2 3 4 5 AGND TP33 J20 TP34 J21 DNP 1 DNP SMA_INP16 SMA_INP8 2 3 4 5 2 3 4 5 1 AGND AGND CPLD_IO_0 3 T1 3 PRI SEC4 4 2 2 5 5 1 6 1 R40 DNI DNP 0 SMA_INP1 6 ADT4-1WT+ GND J22B J22A SMA_INP1 SMA_INP2 SMA_INP3 SMA_INP4 SMA_INP5 SMA_INP6 SMA_INP7 SMA_INP8 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 A1 A2 A3 A4 AGND AGND SMA_INP9 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 SMA_INP10 SMA_INP11 SMA_INP12 SMA_INP13 SMA_INP14 SMA_INP15 SMA_INP16 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 118 A5 A6 A7 A8 A1 A2 A3 A4 AGND AGND 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 119 120 SMA_INP16 A5 A6 A7 A8 AGND Figure 59. AFE5816 Rev C EVM Schematic 42 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com ADC CLOCK 4 C168 CLKP_1RCA CLKP_1RC 0.1uF J35 C169 1 3 T3 3 PRI SEC4 4 C170 0.1uF 2 5 5 1 6 6 CLKP_1RCA 1 CLKsrc_Diff_P 3 LMK_ADC_CLK_DIV_P 5 C171 2 CLKM_1RCA 4 CLKsrc_Diff_M 6 LMK_ADC_CLK_DIV_N 2 3 4 5 2 J34 R89 100 1 0.1uF 0.1uF R90 100 ADT4-1WT+ GND GND C172 CLKM_1RC CLKM_1RCA 0.1uF LMKBUF_VCC J36 CLKsrc_Diff_P 1 J37 1 +3.3VD FB23 E/C 2 GND 120 ohm VDD 4 OUT 3 CLKsrc_SE 3 5 U12 9 VDD0 Y1 7 12 VDD0 Y0 11 LMK_ADC_CLK_DIV_N R91 Y0 10 LMK_ADC_CLK_DIV_P R93 8 R95 49.9 40 MHz C173 ADC_CLKP CLKsrc_SE_2 Y3 2 CLKsrc_Diff_M 4 ADC_CLKM 6 GND CLKsrc_SE LMK_ADC_CLKP GND LMK_ADC_CLKN 10uF R97 C174 1 VDDPECL 2 IN 0 GND GND EN VBB 4 S0 VSS VSS VSS 5 6 14 S1 EP 17 IN 13 15 49.9 16 3 0 R98 1000pF VDD1 LMK_ADC_CLK_DIV_CMOS 49.9 R94 60.4k R92 49.9 GND GND CDCM1802RGTR GND CW CLOCK 3 C175 CLKM_16X 0.1uF 2 J39 1 C177 SEC4 4 2 5 5 1 6 6 1 1 3 5 C176 J38 AGND 0.1uF CW16X_CLEAN_N R99 100 0.1uF R100 100 2 3 4 5 ADT4-1WT+ AGND 2 4 6 3 T4 3 PRI CW16X_CLEAN_P C178 CLKP_16X 0.1uF AGND C179 CLKM_1X CW1X_CLEAN_N J41 C181 1 SEC4 4 C180 2 2 5 5 1 1 6 6 AGND CW_CLKP1X_LMK J40 0.1uF R102 100 0.1uF 2 3 4 5 R101 100 2 4 6 3 1 3 5 0.1uF T5 3 PRI AGND CW1X_CLEAN_P C182 CLKP_1X 0.1uF AGND Figure 60. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 43 AFE5816 EVM Schematic www.ti.com LMK0482x CP2 CP1 C136 0.68uF C137 0.1uF C138 47pF C139 3900pF FPGA_GTXCLK_P R59 DNP 0 FPGA_GTXCLK_M R60 DNP 0 GND R62 39k R63 620 FPGA_SYSREFP FPGA_SYSREFM R61 DNP 0 R64 DNP 0 LMKBUF_VCC GND GND FPGA_CLK_OUT_P R65 DNP0 FPGA_CLK_OUT_M R66 DNP 0 GND FB18 120 ohm C142 10uF FB19 120 ohm C145 C143 10µF 10uF C140 C141 0.1uF 100pF GND C144 0.1uF GND U11 TP40 GND FB21 120 ohm FB22 120 ohm 18 LMK_CS C146 C147 C148 C149 C150 10uF 0.1uF 0.1uF 0.1uF 0.1uF LMK_CLKIN0_P LMK_CLKIN0_N LMK_CLKIN1_P GND GND C151 0.1uF C152 0.1uF OSCINp OSCINn CLKin_SEL0 CLKin_SEL1 LMK Input Clock Sources VCC1_VCO VCC2_CG1 VCC3_SYSREF VCC4_CG2 VCC5_DIG VCC6_PLL1 VCC7_OSCOUT VCC8_OSCIN VCC9_CP2 VCC10_PLL2 VCC11_CG3 VCC12_CG0 CLKIN0 CLKIN0* 34 35 CLKIN1/FIN/FBCLKIN CLKIN1*/FIN*/FBCLKIN* 43 44 OSCIN OSCIN* STATUS_LD1 31 STATUS_LD2 48 CLKIN_SEL0 CLKIN_SEL1 STATUS_LD1 STATUS_LD2 0 R68 1 SEC4 4 2 2 5 5 1 1 6 6 3 C153 LMK_SYNC SCLK SDATA LMK_CLKIN0_P 0.1uF 11 2 3 4 5 T2 3 PRI R70 1.8k R71 1.8k R69 100 5 6 19 20 11 12 LMK_CLKIN0_N C154 C155 0.1uF 0.1uF ADT4-1WT+ GND RESET/GPO LMK_SYNC C157 RESET SYNC SCK SDIO GND GND GND 7 8 9 NC NC NC LMK_CLKIN2_P LMK_CLKIN2_N 1 2 FPGA_GTXCLK_P FPGA_GTXCLK_M SDCLKOUT1 SDCLKOUT1* 3 4 FPGA_SYSREFP FPGA_SYSREFM TP42 DNP 13 14 DCLKOUT4 DCLKOUT4* 24 25 SDCLKOUT5 SDCLKOUT5* 22 23 DCLKOUT6 DCLKOUT6* 27 28 SDCLKOUT7 SDCLKOUT7* 29 30 FPGA_GTXCLK_P FPGA_GTXCLK_M TP43 DNP TP44 DNP 15 16 SDCLKOUT3 SDCLKOUT3* DCLKOUT10 DCLKOUT10* LDOBYP1 LDOBYP2 C156 0.1uF GND 40 41 SDCLKOUT9 SDCLKOUT9* 0.1µF GND OSCOUT OSCOUT* CP1 DNP TP41 CP2 DNP DCLKOUT0 DCLKOUT0* DCLKOUT8 DCLKOUT8* R67 CLKIN_LMK J27 32 46 DCLKOUT2 DCLKOUT2* CS* 37 38 58 59 CPOUT1 CPOUT2 TP45 DNP DNP TP47 DNP TP46 FPGA_SYSREFP FPGA_SYSREFM LMK_ADC_CLKP LMK_ADC_CLKN SYSREFP_SERDES SYSREFM_SERDES CW16X_CLEAN_P CW16X_CLEAN_N CW1X_CLEAN_P CW1X_CLEAN_N CPLD_CLK_P CPLD_CLK_M TP48 FPGA_CLK_OUT_P FPGA_CLK_OUT_M 51 52 DNP FPGA_CLK_OUT_P FPGA_CLK_OUT_M 49 50 54 55 SDCLKOUT11 SDCLKOUT11* 56 57 DCLKOUT12 DCLKOUT12* 62 63 SDCLKOUT13 SDCLKOUT13* 60 61 PAD 65 R72 J28 1 49.9 5 4 3 2 10 17 21 26 33 36 39 42 45 47 53 64 FB20 120 ohm GND LMK04826BISQ/NOPB GND LMKBUF_VCC J29 DNP J30 1 2 LMKBUF_VCC 1 LMK_DATA_OUT RESET/GPO 2 LMK RESET 3 J31 C158 10uF C159 10µF C160 0.1uF R73 DNP 10k Y1 1 2 GND E/C VDD GND OUT DNP 4 3 3 2 1 LMK_CLKIN1_P R74 R75 DNP CLKsrc_SE_2 LMKBUF_VCC LMK RESET 0 0 S2 125 MHz R76 DNP 10k GND J32 1 R77 2 3 4 5 0 GND R78 49.9 GND GND D6 2 Green 1 D7 2 Green 1 R80 CLKin_SEL0 CLKin_SEL1 750 R81 DNP 10k D8 2 C161 R83 DNP 100 1 D9 C162 0.1uF GND R82 STATUS_LD1 750 0.01uF GND Green OSCINp R85 DNP 10k LMKBUF_VCC R79 750 LMKBUF_VCC 2 Green 1 R84 STATUS_LD2 750 GND J33 DNP 1 2 LMKBUF_VCC C163 C164 10pF 2200pF 100pF C165 C166 Y2 0.1uF CP1 1 Vcont Vcc 4 GND OUT 3 R86 DNP 10k TP49 DNP 2 GND R87 100 C167 OSCINn 0.01uF 100 MHz GND R88 DNP 10k GND Figure 61. AFE5816 Rev C EVM Schematic 44 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com AFE5816 pin configuration LVDS/JESD Analog Inputs INP1 INM1 A17 C17 INP3 INM3 A15 C15 INP5 INM5 Power Supply INP[1..16] INM[1..16] ACT[1..16] INP[1..16] INM[1..16] ACT[1..16] DOUTM[1..16] DOUTP[1..16] DVDD_1.8 A16 C16 INP2 INM2 A14 C14 INP4 INM4 INP6 INM6 A12 C12 INP6 INM6 INP7 INM7 INP8 INM8 A10 C10 INP8 INM8 INP9 INM9 INP10 INM10 A7 C7 INP10 INM10 A6 C6 INP11 INM11 INP12 INM12 A5 C5 INP12 INM12 INP13 INM13 A4 C4 INP13 INM13 INP14 INM14 A3 C3 INP14 INM14 INP15 INM15 A2 C2 INP15 INM15 INP16 INM16 A1 C1 INP16 INM16 INP1 INM1 INP2 INM2 INP3 INM3 INP4 INM4 A13 C13 INP5 INM5 INP7 INM7 A11 C11 INP9 INM9 A8 C8 INP11 INM11 DOUTM[1..16] DOUTP[1..16] DVDD_1.2 P4 P5 P6 P7 P11 P12 P13 P14 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P8 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1.2 L3 M4 M5 M6 M12 M13 M14 N2 N3 N4 N5 N6 N12 N13 N14 N15 N16 P2 P3 P15 P16 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD_1P2 DVDD POWER U1F AVDD_H DOUTP1 DOUTM1 R16 T16 DOUTP1 DOUTM1 DOUTM9 DOUTP9 U8 T8 DOUTP9 DOUTM9 DOUTP2 DOUTM2 R15 T15 DOUTP2 DOUTM2 DOUTM10 DOUTP10 U7 T7 DOUTP10 DOUTM10 DOUTP3 DOUTM3 R14 T14 DOUTP3 DOUTM3 DOUTM11 DOUTP11 R6 R7 DOUTP11 DOUTM11 DOUTP4 DOUTM4 T13 U13 DOUTP4 DOUTM4 DOUTM12 DOUTP12 U6 T6 DOUTP12 DOUTM12 DOUTP5 DOUTM5 T12 U12 DOUTP5 DOUTM5 DOUTM13 DOUTP13 U5 T5 DOUTP13 DOUTM13 DOUTP6 DOUTM6 R12 R11 DOUTP6 DOUTM6 DOUTM14 DOUTP14 T4 R4 DOUTP14 DOUTM14 DOUTP7 DOUTM7 T11 U11 DOUTP7 DOUTM7 DOUTM15 DOUTP15 T3 R3 DOUTP15 DOUTM15 DOUTP8 DOUTM8 T10 U10 DOUTP8 DOUTM8 DOUTM16 DOUTP16 T2 R2 DOUTP16 DOUTM16 AVDD_M D6 D7 D8 D9 D10 D11 D12 ANALOG INPUTS U1A AVDD_3P15 AVDD_3P15 AVDD_3P15 AVDD_3P15 AVDD_3P15 AVDD_3P15 AVDD_3P15 AVDD_1.8 L5 L6 L7 L11 L12 L13 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P8 AVDD_1P8 AVDD_1P8 AVDD_1P8 AVDD_1P8 AVDD_1P8 AVDD_M E6 E7 E11 E12 E13 E14 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 AVDD_1P9 SPI F6 F7 F11 F12 F13 F14 G6 G7 G11 G12 H6 H7 H11 H12 J6 J7 J11 J12 K6 K7 K11 K12 U9 T9 DCLKM DCLKP DCLKM DCLKP FCLKP FCLKM R10 R8 FCLKP FCLKM LVDS OUTPUTS U1B DVDD POWER U1C SEN SDATA SCLK K17 L16 J17 SEN SDOUT H16 D15 D16 D17 E8 E9 E10 E15 F8 F9 F10 F15 F16 F17 G8 G9 G10 G15 H1 H2 H3 H8 H9 H10 J3 J8 J9 SDOUT SDIN SCLK SPI U1G Input Clock CLKP_16X CLKM_16X CLKP_1X CLKM_1X C89 C90 µF 0.1 0.1µF C91 C92 0.1µF 0.1µF E16 E17 R42 100 G17 G16 R43 CLKP_16X CLKM_16X CLKP_1X CLKM_1X 100 ADC_CLKP ADC_CLKM C93 C94 µF 0.1 0.1µF J1 J2 R45 100 AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS ADC_CLKP ADC_CLKM AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS J10 K1 K2 K3 K8 K9 K10 L8 L9 L10 M3 M7 M8 M9 M10 M11 N7 N8 N9 N10 N11 P8 P9 P10 AGND CW Output R44 VSS Input Clocks AGND U1E GND R46 U1I 0 CW_I_OUT/AMPIN_P CW_I_OUT/AMPIN_M CW_Q_OUT/AMPIN_P CW_Q_OUT/AMPIN_M Digital Inputs PDN_GLOBAL PDN_FAST AFE_RESET TX_TRG L17 M15 PDN_GBL PDN_FAST RESET TX_TRIG TR_EN not supported on EVM. TGC_Prof not supported on EVM. MISC INPUTS J4 H4 TGC_UP_DN TGC_SLOPE J5 H5 TGC_PROF TGC_PROF K15 J16 H15 J15 TR_EN TR_EN TR_EN TR_EN LNA HPF ATGC/DTGC U1J BYP_G5 BYP_F5 D4 D3 G4 G3 CW_IP_OUTP CW_IP_OUTM CW_I_OUT_P CW_I_OUT_M CW_QP_OUTP CW_QP_OUTM CW_Q_OUT_P CW_Q_OUT_M CW Amp M16 M17 U1M TGC_UP_DN/VCNTLM TGC_SLOPE/VCNTLP 0 G5 F5 U1K BAND_GAP LNA_INCM BIAS_2P5 SRC_BIAS OTHER D5 D14 BYP_D5 BYP_D14 A9 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 C9 D1 D2 D13 E1 E2 E3 E4 E5 F1 F2 F3 F4 G1 G2 G13 G14 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC No Connects U1L NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC H13 H14 H17 J13 J14 K4 K5 K13 K14 K16 L1 L2 L4 L14 L15 M1 M2 N1 N17 P1 P17 R1 R5 R9 R13 R17 T1 T17 U1 U2 U3 U4 U14 U15 U16 U17 U1H R47 R48 0 0 U1D Figure 62. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 45 AFE5816 EVM Schematic www.ti.com ADC LVDS OUTPUT J59B J59A 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 A1 A2 A3 A4 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 118 DOUTM9 DOUTP9 DOUTM1 DOUTP1 DOUTM2 DOUTP2 DOUTM3 DOUTP3 DOUTM4 DOUTP4 DOUTM5 DOUTP5 DOUTM6 DOUTP6 DOUTM7 DOUTP7 DCLKM DCLKP TSW_GPIO_0 TSW_GPIO_1 TSW_GPIO_2 TSW_GPIO_3 TSW_GPIO_4 TSW_GPIO_5 TSW_GPIO_6 A5 A6 A7 A8 A1 A2 A3 A4 GND GND 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 119 120 FCLKM FCLKP DOUTM8 DOUTP8 DOUTM10 DOUTP10 DOUTM11 DOUTP11 DOUTM12 DOUTP12 DOUTM13 DOUTP13 DOUTM14 DOUTP14 DOUTM15 DOUTP15 DOUTM16 DOUTP16 TSW_GPIO_7 A5 A6 A7 A8 GND GND Figure 63. AFE5816 Rev C EVM Schematic 46 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com OPAMP- OPAMP+ TP36 CW I/V OUTPUT OPAMP+ OPAMP+ DNP TP37 +VS R145 R143 10k DNP -VS OPAMPR146 0 0 TP38 C207 C208 C209 C210 C211 C212 1uF 0.1uF 0.1uF 0.1uF 0.1uF 1uF Vocm C214 0.1uF C215 1uF C216 0.1uF C217 1uF AGND C213 0.1µF R144 10k AGND OPAMPAGND AGND DC_OUTM_IP DNPC218 1uF R147 DNP 0 DC_INP_IP R148 499 C219 CW_I_OUT_M CW_I_OUT_M 1200pF C226 J52 1 2 DNP 3 C224 7 R155 0 CW_I_OUT_P Vocm J54 1 2 DNP 3 CW_I_OUT/AMPIN_M CW_I_OUT/AMPIN_M R162 CW_I_OUT_M 22uF C222 8 Vocm V+ 2 R158 0 V- 1 R159 DNPC225 3300pFDNP 1.0k 5 CW_I_OUTM_INT 4 CW_I_OUTP_INT CW_I_OUTP_INT CM R157 U17B U20_P6 6 49.9 7 U20_P7 5 R154 J53 C223 R156 1 49.9 U20_P5 49.9 22uF 9 6 CW_I_OUT_P CW_I_OUTM_INT U16 CW_I_OUT_P 4.7µF 5 4 3 2 AGND 0 8 R153 499 +VS 4 CW_I_OUT/AMPIN_P R160 R151 0 3 CW_I_OUT/AMPIN_P 3300pF OPAMP+ R150 DNPC220 3300pF DNP 1.0k R152 499 OPAMP- -VS C221 3300pF AGND R161 AGND 0 0 R149 0 AGND DC_OUTP_IP C227 R163 DNP 0 AGND CW_SE_IP DNPC228 1uF 1200pF R164 499 DC_INM_IP J55 Please make the layout of I/O channels symmetric mirror matching) ( 1 2 3 AGND CW_SE_QP STX-3000 DC_OUTM_QP DNPC229 1uF R165 DNP 0 DC_INP_QP C230 1200pF CW_Q_OUT_M CW_Q_OUT_M 499 R166 J56 1 2 DNP 3 C231 R167 3300pF DNP 1.0k C237 3300pF OPAMP+ 499 R170 0 0 0 J58 Vocm C236 R177 1.0k 3300pF DNP CW_Q_OUT_M Vocm R176 2 V+ CW_Q_OUT/AMPIN_M CW_Q_OUT/AMPIN_M 5 CW_Q_OUTM_INT 4 CW_Q_OUTP_INT C235 22uF R175 49.9 C233 22uF R172 49.9 U17A 2 1 3 CM V- 1 CW_Q_OUTP_INT 0 9 6 1 2 DNP 3 +VS CW_Q_OUTM_INT U18 THS4131CDGNR 8 R174 49.9 J57 C234 1 4.7µF 4 CW_Q_OUT_P R173 3 7 CW_Q_OUT_P CW_Q_OUT_P R180 AGND 5 4 3 2 R169 CW_Q_OUT/AMPIN_P 8 CW_Q_OUT/AMPIN_P R178 AGND 0 OPAMP- R171 499 R179 -VS C232 3300pF AGND 0 AGND DC_OUTP_QP C238 R168 0 1200pF AGND DNPC239 1uF R182 DNP0 R181 499 DC_INM_QP Figure 64. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 47 AFE5816 EVM Schematic www.ti.com DTGC CPLD (AFE58JD16 Only) J42 1 2 3 4 5 6 U13E Pwr_CPLD 12 27 +3.3VD +1.8VD C183 0.1uF 4 20 VAUX VCC Pwr_CPLD DNPFB25 120 ohm GND GND TCK TDO TDI TMS TDI TDO TCK TMS GND 14 25 16 15 TDI TDO TCK TMS C184 0.1uF U13F 21 11 FB24 120 ohm VCCIO1 VCCIO2 U13D Pwr_CPLD 26 33 GND PAD GND GND LED1 LED2 LED3 Pwr_CPLD J43 CPLD_IO_1 1 5 6 7 8 9 10 13 17 18 19 I/O I/O I/O I/O I/O I/O, GSR I/O, GTS2 I/O, GTS3 I/O, GTS0 I/O, GTS1 23 CPLD_IO_7 24 CPLD_SW1 28 CPLD_SW2 29 CPLD_SW3 30 CPLD_SW4 CPLD_RST 31 32 TX_TRIG LED1 1 LED2 2 LED3 3 CPLD_IO_4 CPLD_CLK_P CPLD_CLK_M CPLD_UD CPLD_SL CPLD_IO_5 CPLD_IO_6 5 4 3 2 GND R107 BANK 2 U13C R104 ADC_CLKP 100 0 GND Pwr_CPLD U13B 22 D11 Super Red D12 Super Red LMK_ADC_CLK_DIV_CMOS CPLD_SW1 CPLD_SW2 CPLD_SW3 CPLD_SW4 R105 100 GND R106 100 GND CPLD_RST 8 7 6 5 S4 R112 10.0k BANK 1 CPLD_IO_1 I/O I/O, GCK0 I/O, GCK1 I/O, GCK2 I/O I/O I/O I/O I/O I/O D10 Super Red R108 10.0k R109 10.0k R110 10.0k R111 10.0k CPLD_IO_0 U13A R103 0 1 2 3 4 Pwr_CPLD S3 GND GND J44 CPLD_IO_4 CPLD_IO_5 CPLD_IO_6 CPLD_IO_7 1 3 5 7 2 4 6 8 INPUT GND Figure 65. AFE5816 Rev C EVM Schematic 48 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com DTGC CPLD (AFE58xx16 Only) J42 1 2 3 4 5 6 U13E Pwr_CPLD 12 27 +3.3VD +1.8VD C183 0.1uF 4 20 VAUX VCC Pwr_CPLD FB25 120 ohm GND GND TCK TDO TDI TMS TDI TDO TCK TMS GND 14 25 16 15 TDI TDO TCK TMS C184 0.1uF U13F 21 11 FB24 120 ohm VCCIO1 VCCIO2 U13D Pwr_CPLD 26 33 GND PAD GND GND LED1 LED2 LED3 Pwr_CPLD J43 CPLD_IO_1 1 5 6 7 8 9 10 13 17 18 19 I/O I/O I/O I/O I/O I/O, GSR I/O, GTS2 I/O, GTS3 I/O, GTS0 I/O, GTS1 23 CPLD_IO_7 24 CPLD_SW1 28 CPLD_SW2 29 CPLD_SW3 30 CPLD_SW4 CPLD_RST 31 32 TX_TRIG LED1 1 LED2 2 LED3 3 CPLD_IO_4 CPLD_CLK_P CPLD_CLK_M CPLD_UD CPLD_SL CPLD_IO_5 CPLD_IO_6 5 4 3 2 GND R107 BANK 2 U13C R104 ADC_CLKP 100 0 GND Pwr_CPLD U13B 22 D11 Super Red CPLD_SW1 CPLD_SW2 CPLD_SW3 CPLD_SW4 R105 100 GND D12 Super Red R106 100 GND CPLD_RST 8 7 6 5 S4 R112 10.0k BANK 1 CPLD_IO_1 I/O I/O, GCK0 I/O, GCK1 I/O, GCK2 I/O I/O I/O I/O I/O I/O D10 Super Red LMK_ADC_CLK_DIV_CMOS R108 10.0k R109 10.0k R110 10.0k R111 10.0k CPLD_IO_0 U13A R103 0 1 2 3 4 Pwr_CPLD S3 GND GND J44 CPLD_IO_4 CPLD_IO_5 CPLD_IO_6 CPLD_IO_7 1 3 5 7 2 4 6 8 INPUT GND Figure 66. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 49 AFE5816 EVM Schematic www.ti.com VCntl (AFE58xx18 Only) VCON SINGLE TO DIFFERENTIAL CONVERTER OPAMP+ OPAMP- C187 C186 DNP DNP 0.1uF 1uF C191 C190 DNP DNP 1uF 0.1uF OPAMP+ OPAMP- U14B 1 NC 5 NC DNP 8 NC C194 C195 DNP C199 0.1uF DNP 0.1uF DNP 1uF AGND C196 C197 C198 DNP 0.1uF DNP 0.1uF DNP1uF AGND OPAMP+ R115 DNP 10k R116 OPAMP+ 10k DNP 7 AGND U14A 2 3 DNP R117 DNP 0 6 VCNTL_EXT J47 4 1 R120 DNP 49.9 C189 DNP 0.1uF R119 DNP 390 R118 DNP 390 OPAMP+ 1 DNP2 5 4 VCNTLP DNP3 J48 7 3 3 2 1 DNP U15 OPAMP- 2 8 2 1 VCNTLM 5 V+ CM DNP V- 1 3 5 CM_VCON_OPAMP AGND VCNTLM J46 C188 DNP 0.1uF 4 J45 2 4 6 9 6 DNP VCNTLP AGND OPAMPOPAMP+ R114 DNP OPAMP+ R113 DNP 390 R121 DNP 1.00Meg R122 DNP 200 R123 CM_VCON CM_VCON_OPAMP 0 R124 DNP 0 AGND VCNTLP 390 C185 DNP 0.1uF AGND J49 R126 DNP 1k 1 2DNP C192 C193 DNP DNP 0.1uF 0.1uF C200 DNP 0.1uF R125 1.00Meg ATGC/DTGC OPAMP- ATGC/DTGC Selection AGND TGC_SLOPE_EXT VCNTLP R128 DNP 200 R127 0 R129 DNP 0 TGC_SLOPE/VCNTLP DNPC201 0.1uF AGND DTGC(AFE58xx16 Only) TGC_UP_DOWN_EXT R130 VCNTLM DTGC CONTROL SIGNALS J50 R131 DNP 200 0 R132 DNP 0 TGC_UP_DN/VCNTLM DNPC202 0.1uF J51 1 2 3DNP 4 4 3 DNP2 1 CS_TGC_UP_DOWN CS_TGC_SLOPE CS_TGC_PROFILE_1 CS_TGC_PROFILE_0 AGND GND TP50 CS_TGC_PROFILE_0 R133 100 TP51 DNP CS_TGC_SLOPE TGC_PROF_1 C204 10pF R134 DNP 100 C203 10pF AGND GND TP52 CS_TGC_PROFILE_1R135 100 TGC_SLOPE_EXT DNP TP35 TGC_PROF_2/DIG_CTRL DNP TGC_UP_DOWN_EXT CS_TGC_UP_DOWN R136 100 C206 10pF AGND C205 10pF GND TSW_GPIO_0 TSW_GPIO_1 TSW_GPIO_2 TSW_GPIO_3 R137 DNP R138 0 DNP R139 0 DNP R140 0 DNP 0 CPLD_UD CPLD_SL R141 R142 0 0 TGC_UP_DOWN_EXT TGC_SLOPE_EXT TGC_PROF_1 TGC_PROF_2/DIG_CTRL TGC_UP_DOWN_EXT TGC_SLOPE_EXT Figure 67. AFE5816 Rev C EVM Schematic 50 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated AFE5816 EVM Schematic www.ti.com TX_Trig R49 BYPASSCAPS BYPASS CAPS TX_TRIG 0 R50 DNP 0 TSW_GPIO_5 TP39 J25 R51 TX_TRG 1 0 5 4 3 2 C132 10pF AVDD_H AVDD_M GND C98 GND 0.1uF C95 0.1uF C96 0.1uF C97 BYP_G13 0.1uF BYP_D14 BYP_F5 AGND RESET AND POWER DOWN CONTROLS J23 BYP_D5 BYP_G5 AVDD_M BYP_E5 C113 C104 C105 C106 C107 C108 C109 C110 C111 C112 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C116 C117 C118 0.1uF 0.1uF 0.1uF C99 1uF C100 10µF C101 1uF C103 1uF C114 1uF C115 1uF AGND +1.8VD PDN_GLOBAL AGND J24 AVDD_1.8 PDN_FAST S1 SUPPLY BYPASS CAPACITOR PLACE NEAR DEVICE PINS AFE_RESET C102 AGND 10uF TR ENABLE PINS (AFE58xx16 only) TR_EN_OUT_1 R52 0 C131 DVDD_1.2 R53 0.1uF 49.9 C119 C122 C123 C124 C125 C126 C120 C121 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C129 C130 C128 C127 0.1uF 0.1uF 0.1uF 0.1uF TR_EN_OUT_2 J26 1 3 5 7 C133 2 4 6 8 R55 0 0.1uF GND R54 49.9 DVDD_1.8 TR_EN_OUT_3 AGND C134 R57 0 R56 0.1uF 49.9 TR_EN_OUT_4 C135 0.1uF GND R58 49.9 AGND Figure 68. AFE5816 Rev C EVM Schematic SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 51 AFE5816 EVM Schematic www.ti.com Keystone 8402 for JESD Capture Card Keystone 2203 for LVDS Capture Card H3 DNP H5 H4 H6 DNP H8 H7 PCB Label H10 MECH CA-2185 Size: 0.65" x 0.20 " PCB LOGO MECHANICAL PARTS H2 H1 LBL1 PMSSS 440 0025 PH DNP H9 Texas Instruments PCB LOGO PCB LOGO FCC disclaimer Pb-Free Symbol H11 H12 H13 DNP H14 H15 H16 DNP DNP DNP DNP DNP DNP DNP FID1 FID2 FID3 FID4 FID5 FID6 ZZ1 Label Assembly Note This Assembly Note is for PCB labels only Label Table Variant ZZ2 Assembly Note These assemblies are ESD sensitive, ESD precautions shall be observed. ZZ3 Assembly Note These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable. Label Text 001 AFE58JD18EVM 002 AFE58JD16EVM 003 AFE5818EVM 004 AFE5816EVM ZZ4 Assembly Note These assemblies must comply with workmanship standards IPC-A-610 Class 2, unless otherwise specified. ZZ5 Assembly Note Indication for all LEDs has been marked with their cathode side. Figure 69. AFE5816 Rev C EVM Schematic 52 Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated EVM Bill of Materials www.ti.com E.3 EVM Bill of Materials Table 3 lists the AFE5816 EVM bill of materials (BOM). Table 3. AFE5816 EVM Bill of Materials (1) Designator Qty Value Description Package Reference Part Number MFR C1, C2, C4, C6, C9, C10, C12, C15, C18, C21, C23, C24 12 22 µF CAP, TA, 22 µF, 16V, +/-10%, 0.375 ohm, SMD 6032-28 TPSC226K016R0375 AVX C3, C5, C7, C8, C11, C13, C16, C17, C20, C22, C183, C184 12 0.1 µF CAP, CERM, 0.1 µF, 16V, +/-10%, X5R, 0603 0603 GRM188R61C104KA01D Murata C14 1 470pF CAP, CERM, 470pF, 50V, +/-5%, C0G/NP0, 0603 0603 06035A471JAT2A AVX C19 1 160pF CAP, CERM, 160 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C1H161JA01D Murata C25 1 270pF CAP, CERM, 270 pF, 100 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C2A271JA01D Murata C26, C27, C28, C29, C31, C33, C34, C35, C36, C85, C86, C89, C90, C91, C92, C93, C94, C95, C96, C97, C98, C104, C105, C106, C107, C108, C109, C110, C111, C112, C113, C116, C117, C118, C119, C120, C121, C122, C123, C124, C125, C126, C127, C128, C129, C130, C131, C133, C134, C135, C137, C140, C143, C147, C148, C149, C150, C151, C152, C153, C154, C155, C156, C157, C160, C162, C166, C168, C169, C170, C171, C172, C175, C176, C177, C178, C179, C180, C181, C182, C208, C209, C210, C211, C213, C214, C216, C260, C261 89 0.1 µF CAP, CERM, 0.1 µF, 16 V, +/- 10%, X7R, 0402 0402 GRM155R71C104KA88D Murata C30, C32 2 47pF CAP, CERM, 47 pF, 50 V, +/- 1%, C0G/NP0, 0402 0402 GRM1555C1H470FA01D Murata C37, C42, C45, C50, C53, C58, C61, C66, C69, C74, C77, C80, C81, C82, C83, C84 16 0.01 µF CAP, CERM, 0.01 µF, 6.3 V, +/- 10%, X7R, 0402 0402 GRM155R70J103KA01D Murata C99, C101, C103, C114, C115 5 1 µF CAP, CERM, 1 µF, 6.3 V, +/- 20%, X5R, 0402 0402 GRM152R60J105ME15D Murata C100, C173 2 10 µF CAP, CERM, 10 µF, 6.3 V, +/- 20%, X5R, 0603 0603 C0603C106M9PACTU Kemet C102 1 10 µF CAP, CERM, 10 µF, 6.3 V, +80/-20%, Y5V, 0805_140 0805_140 GRM21BF50J106ZE01L Murata C132, C163, C203, C204, C205, C206 6 10pF CAP, CERM, 10 pF, 50 V, +/- 5%, C0G/NP0, 0402 0402 GRM1555C1H100JA01D Murata C136 1 0.68 µF CAP, CERM, 0.68 µF, 10 V, +/- 10%, X5R, 0603 0603 C0603C684K8PACTU Kemet C138 1 47pF CAP, CERM, 47 pF, 100 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C2A470JA01D Murata C139 1 3900pF CAP, CERM, 3900 pF, 50 V, +/- 10%, X7R, 0402 0402 GRM155R71H392KA01D Murata (1) Alternate Part Number Alternate MFR Unless otherwise noted in the Alternate Part Number and/or Alternate Manufacturer columns, all parts may be substituted with equivalents. SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 53 EVM Bill of Materials www.ti.com Table 3. AFE5816 EVM Bill of Materials (1) (continued) Designator Qty Value Description Package Reference Part Number MFR C141, C144, C159, C165 4 100pF CAP, CERM, 100 pF, 50 V, +/- 10%, X7R, 0402 0402 CC0402KRX7R9BB101 Yageo America C142, C145, C146, C158 4 10 µF CAP, CERM, 10 µF, 6.3 V, +/- 20%, X5R, 0603 0603 GRM188R60J106ME47D Murata C161, C167 2 0.01 µF CAP, CERM, 0.01 µF, 25V, +/-10%, X7R, 0402 0402 C1005X7R1E103K TDK C164 1 2200pF CAP, CERM, 2200 pF, 50 V, +/- 10%, X7R, 0402 0402 GRM155R71H222KA01D Murata C174 1 1000pF CAP, CERM, 1000 pF, 25 V, +/- 5%, C0G/NP0, 0402 0402 C1005C0G1E102J TDK C207, C212, C215, C217 4 1 µF CAP, CERM, 1 µF, 16 V, +/- 10%, X5R, 0603 0603 C0603C105K4PACTU Kemet C219, C227, C230, C238 4 1200pF CAP, CERM, 1200 pF, 50 V, +/- 10%, X7R, 0603 0603 GRM188R71H122KA01D Murata C221, C226, C231, C232, C236, C237 6 3300pF CAP, CERM, 3300 pF, 50 V, +/- 10%, X7R, 0402 0402 GRM155R71H332KA01D Murata C222, C224, C233, C235 4 22 µF CAP, CERM, 22 µF, 6.3 V, +/- 20%, X5R, 0603 0603 C1608X5R0J226M080AC TDK C223, C234 2 4.7 µF CAP, CERM, 4.7 µF, 10 V, +/- 10%, X5R, 0603 0603 C0603C475K8PACTU Kemet D1 1 Orange LED, Orange, SMD 0.8x1.6mm HSMD-C190 Avago D2, D4, D5, D10, D11, D12 6 Super Red LED, Super Red, SMD LED, 1.6x.6x.8mm SML-LX0603SRW-TR Lumex D3 1 Red LED, Red, SMD 0.8x1.6mm HSMC-C190 Avago D6, D7, D8, D9 4 Green LED, Green, SMD 0.8x1.6mm HSMG-C190 Avago FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9, FB10, FB11, FB13, FB14, FB15, FB16, FB18, FB19, FB20, FB21, FB22, FB23, FB24 22 120 ohm Ferrite Bead, 120 ohm @ 100 MHz, 0.8 A, 0805 0805 BLM21AG121SN1D Murata FB17 1 120 ohm Ferrite Bead, 120 ohm @ 100 MHz, 3 A, 0603 0603 BLM18SG121TN1D Murata H2, H5, H8, H12, H15 5 HEX STANDOFF 4-40 ALUMINUM 1/2" HEX STANDOFF 4-40 ALUMINUM 1/2" 2203 Keystone H3, H6, H9, H13, H16 5 MACHINE SCREW PAN PHILLIPS 4-40 Machine Screw, 4-40, 1/4" PMSSS 440 0025 PH B&F Fastener Supply H10 1 CABLE ASSY STR 2.1MM 6' 24 AWG CA-2185 Tensility J1 1 Power Jack, mini, 2.1mm OD, R/A, TH Jack, 14.5x11x9mm RAPC722X Switchcraft J2 1 Terminal Block, 3.5 mm, 3x1, Tin, TH Terminal Block, 3.5 mm, 3x1, TH 39357-0003 Molex J3, J30, J31 3 Header, 100mil, 3x1, Gold, TH 3x1 Header TSW-103-07-G-S Samtec J4 1 Header, 100mil, 5x1, Gold, TH 5x1 Header TSW-105-07-G-S Samtec J5 1 Connector, Receptacle, USB - mini AB, R/A, SMD Receptacle, 5-Leads, Body 9.9x9mm, R/A 67803-8020 Molex J6, J9, J10, J13, J14, J17, J19, J20, J25, J27, J28, J32, J35, J39, J41, J43, J53, J57 18 SMA Straight PCB Socket Die Cast, 50 Ohm, TH SMA Straight PCB Socket Die Cast, TH 5-1814832-1 TE Connectivity 54 Hardware Reference Alternate Part Number Alternate MFR SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated EVM Bill of Materials www.ti.com Table 3. AFE5816 EVM Bill of Materials (continued) Designator Qty Description Package Reference Part Number MFR J7, J8, J11, J12, J15, J16, J18, J21 8 Connector, End launch SMA, 50 ohm, SMT End Launch SMA 142-0701-801 Johnson J22, J59 2 Socket, 0.5MM, 60x2, Gold, SMT Socket, Female, 0.5MM, 60x2, SMT QTH-060-01-L-D-A Samtec J23, J24, J29, J33, J37 5 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec J26, J44 2 Header, 100mil, 4x2, Gold, TH 4x2 Header TSW-104-07-G-D Samtec J34, J36, J38, J40 4 Header, 100mil, 3x2, Gold, TH 3x2 Header TSW-103-07-G-D Samtec J42 1 Header, 100mil, 6x1, Gold, TH 6x1 Header TSW-106-07-G-S Samtec J55 1 Audio Jack, 3.5 mm, Stereo, R/A, TH Connector, 3-Leads, 3.5mm Stereo Jack R/A, TH STX-3000 Kycon Inc LBL1 1 Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll PCB Label 0.650"H x 0.200"W THT-14-423-10 Brady R1, R7, R8, R9, R19 5 0 RES, 0, 5%, 0.1 W, 0603 0603 RC0603JR-070RL Yageo America R2 1 30k RES, 30k ohm, 5%, 0.125W, 0805 0805 CRCW080530K0JNEA Vishay-Dale R3 1 604 RES, 604, 1%, 0.063 W, 0402 0402 CRCW0402604RFKED Vishay-Dale R4 1 5.1k RES, 5.1k ohm, 5%, 0.1W, 0603 0603 CRCW06035K10JNEA Vishay-Dale R5, R14 2 3.01k RES, 3.01k ohm, 1%, 0.1W, 0603 0603 CRCW06033K01FKEA Vishay-Dale R6, R10 2 332 RES, 332, 1%, 0.063 W, 0402 0402 CRCW0402332RFKED Vishay-Dale R11, R21 2 510 RES, 510, 5%, 0.063 W, 0402 0402 CRCW0402510RJNED Vishay-Dale R12 1 196 RES, 196, 1%, 0.063 W, 0402 0402 CRCW0402196RFKED Vishay-Dale R13 1 1.65k RES, 1.65 k, 1%, 0.1 W, 0603 0603 CRCW06031K65FKEA Vishay-Dale R22, R44, R46, R47, R48, R49, R51, R52, R55, R57, R67, R74, R75, R77, R97, R98, R103, R107, R123, R127, R130, R141, R142, R145, R146, R149, R151, R153, R155, R158, R161, R162, R168, R169, R170, R173, R176, R178, R179 39 0 RES, 0, 5%, 0.063 W, 0402 0402 CRCW04020000Z0ED Vishay-Dale R23, R41, R42, R43, R45, R69, R87, R89, R90, R99, R100, R101, R102, R104, R105, R106 16 100 RES, 100, 1%, 0.1 W, 0402 0402 ERJ-2RKF1000X Panasonic R24, R30, R36, R56, R93, 28 49.9 RES, 49.9, 1%, 0.063 W, 0402 0402 CRCW040249R9FKED Vishay-Dale R62 1 39k RES, 39 k, 5%, 0.063 W, 0402 0402 CRCW040239K0JNED Vishay-Dale R63 1 620 RES, 620, 5%, 0.063 W, 0402 0402 CRCW0402620RJNED Vishay-Dale R68 1 11 RES, 11, 5%, 0.063 W, 0402 0402 CRCW040211R0JNED Vishay-Dale R70, R71 2 1.8k RES, 1.8 k, 5%, 0.063 W, 0402 0402 CRCW04021K80JNED Vishay-Dale R79, R80, R82, R84 4 750 RES, 750, 5%, 0.063 W, 0402 0402 CRCW0402750RJNED Vishay-Dale R94 1 60.4k RES, 60.4k ohm, 1%, 0.063W, 0402 0402 CRCW040260K4FKED Vishay-Dale R108, R109, R110, R111, R112 5 10.0k RES, 10.0 k, 1%, 0.1 W, 0603 0603 ERJ-3EKF1002V Panasonic R125 1 1.00Meg RES, 1.00 M, 1%, 0.1 W, 0603 0603 CRCW06031M00FKEA Vishay-Dale R133, R134, R135, R136 4 100 RES, 100, 1%, 0.1 W, 0603 0603 CRCW0603100RFKEA Vishay-Dale R25, R31, R37, R58, R95, R26, R27, R28, R32, R33, R34, R38, R39, R53, R72, R78, R91, R156, R174 R29, R35, R54, R92, Value (1) SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Alternate Part Number Alternate MFR - - Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 55 EVM Bill of Materials www.ti.com Table 3. AFE5816 EVM Bill of Materials (1) (continued) Designator Qty Value Description Package Reference Part Number MFR R143, R144 2 10k RES, 10 k, 5%, 0.063 W, 0402 0402 CRCW040210K0JNED Vishay-Dale R148, R164, R166, R181 4 499 RES, 499, 1%, 0.063 W, 0402 0402 CRCW0402499RFKED Vishay-Dale R152, R160, R171, R180 4 499 RES, 499, 1%, 0.1 W, 0603 0603 CRCW0603499RFKEA Vishay-Dale R154, R157, R172, R175 4 49.9 RES, 49.9, 0.1%, 0.1 W, 0603 0603 RT0603BRD0749R9L Yageo America S1, S2, S3 3 Switch, Tactile, SPST-NO, 0.05A, 12V, SMT Switch, 4.4x2x2.9 mm TL1015AF160QG E-Switch S4 1 Switch, SPST, 4 Pos, Top Actuated, SMD SMD, 8-Leads, Pitch 1.27mm 1571983-5 TE Connectivity SH-5, SH-6, SH-7, SH-8 4 Shunt, 100mil, Gold plated, Black Shunt SNT-100-BK-G Samtec T1, T2, T3, T4, T5 5 RF Transformer, 50 ohm, 2 to 775 MHz, SMT CD542 ADT4-1WT+ Minicircuits TP1, TP4, TP5, TP6, TP8, TP9, TP15 7 Red Test Point, Miniature, Red, TH Red Miniature Testpoint 5000 Keystone TP2, TP11, TP12, TP13, TP14, TP16, TP17, TP18, TP38 9 Black Test Point, Miniature, Black, TH Black Miniature Testpoint 5001 Keystone TP3 1 White Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone TP39 1 Yellow Test Point, Miniature, Yellow, TH Yellow Miniature Testpoint 5004 Keystone U1 1 16-Channel, Ultrasound, Analog FrontEnd with 140-mW/Channel Power, 0.75nV/vHz Noise, 14-Bit, 65-MSPS or 12Bit, 80-MSPS ADC, and Passive CW Mixer, ZBV0289A ZBV0289A AFE5816ZBV Texas Instruments U2 1 Single Output High PSRR LDO, 1 A, Fixed 3.3 V Output, 2.7 to 5.5 V Input, 6pin SOT-223 (DCQ), -40 to 125 degC, Green (RoHS & no Sb/Br) DCQ0006A TPS79633DCQR Texas Instruments U3, U4, U5 3 Ultralow-Noise, High PSRR, Fast, RF, 1A, Low-Dropout Linear Regulator, DCQ0006A DCQ0006A TPS79601DCQR Texas Instruments U6 1 4242-VPK Small-Footprint and LowPower Quad Channels Digital Isolators, DBQ0016A DBQ0016A ISO7140CCDBQR Texas Instruments U7 1 USB FIFO IC, 28SSOP SSOP28 FT245RL FTDI U8 1 4-Bit Dual-supply Bus Transceiver with Configurable Voltage Translation and 3State Outputs, PW0016A PW0016A SN74AVC4T245PWR Texas Instruments U9 1 4242-VPK Small-Footprint and LowPower Quad Channels Digital Isolators, DBQ0016A DBQ0016A ISO7141CCDBQR Texas Instruments U10 1 Ultralow-Noise, High PSRR, Fast, RF, 1A Low-Dropout Linear Regulator, DCQ0006A DCQ0006A TPS79618DCQR Texas Instruments Texas Instruments U11 1 Ultra Low-Noise JESD204B Compliant Clock Jitter Cleaner with Dual Loop PLLs, NKD0064A NKD0064A LMK04826BISQ/NOPB Texas Instruments Texas Instruments U12 1 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT, RGT0016A RGT0016A CDCM1802RGTR Texas Instruments U13 1 CoolRunner-II CPLD, QFG32 5x5 QFN32 XC2C32A-6QFG32C Xilinx 56 1x2 Hardware Reference Alternate Part Number Alternate MFR 969102-0000-DA 3M Texas Instruments Equivalent None Texas Instruments ISO7140CCDBQ Texas Instruments Texas Instruments ISO7141CCDBQ CDCM1802RGTT Texas Instruments Texas Instruments SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated EVM Bill of Materials www.ti.com Table 3. AFE5816 EVM Bill of Materials Value (1) (continued) Designator Qty Description Package Reference Part Number MFR Alternate Part Number Alternate MFR U16, U18 2 HIGH-SPEED, LOW-NOISE, FULLYDIFFERENTIAL I/O AMPLIFIERS, DGN0008D DGN0008D THS4131CDGNR Texas Instruments THS4131CDGN Texas Instruments U17 1 Dual, High Gain Bandwidth, High Output Current, Operational Amplifier with Current Limit, 5 to 12 V, -40 to 85 degC, 8-pin SOIC (D8), Green (RoHS & no Sb/Br) D0008A OPA2614ID Texas Instruments Equivalent Texas Instruments U20 1 SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3STATE OUTPUTS, DBV0006A DBV0006A SN74AVCH1T45DBVR Texas Instruments SN74AVCH1T45DBVT Texas Instruments Y1 1 OSC, 3.3 V, 125 MHz, 15 pF, SMD 7x5mm VCC1-B3B-125M000000 Vectron Y2 1 VCXO, 100 MHz, 3.3V, SMD CVHD-950-4 CVHD-950-100.000 Crystek Corporation Y3 1 OSC, 3.3 V, 40 MHz, SMD SMD, 4-Leads, Body 7x5mm FXO-HC735-40 Fox Electronics C38, C40, C43, C46, C48, C51, C54, C56, C59, C62, C64, C67, C70, C72, C75, C78 0 0.015 µF CAP, CERM, 0.015 µF, 16 V, +/- 10%, X7R, 0402 0402 GRM155R71C153KA01D Murata C39, C41, C44, C47, C49, C52, C55, C57, C60, C63, C65, C68, C71, C73, C76, C79, C218, C228, C229, C239 0 1 µF CAP, CERM, 1 µF, 6.3 V, +/- 20%, X5R, 0402 0402 C1005X5R0J105M TDK C87, C88, C185, C187, C188, C189, C191, C192, C193, C194, C196, C197, C199, C200, C201, C202, C240, C241, C242, C243, C244, C245, C246, C247, C248, C249, C250, C251, C252, C253, C254, C255, C256, C257, C258, C259 0 0.1 µF CAP, CERM, 0.1 µF, 16 V, +/- 10%, X7R, 0402 0402 GRM155R71C104KA88D Murata C186, C190, C195, C198 0 1 µF CAP, CERM, 1 µF, 16 V, +/- 10%, X5R, 0603 0603 C0603C105K4PACTU Kemet C220, C225 0 3300pF CAP, CERM, 3300 pF, 50 V, +/- 10%, X7R, 0402 0402 GRM155R71H332KA01D Murata FB12, FB25 0 120 ohm Ferrite Bead, 120 ohm @ 100 MHz, 0.8 A, 0805 0805 BLM21AG121SN1D Murata H1, H4, H7, H11, H14 0 HEX, M-F STANDOFF 4-40 ALUMINUM 5/8" HEX, M-F STANDOFF 4-40 ALUMINUM 5/8" 8402 Keystone J45 0 Header, 100mil, 3x2, Gold, TH 3x2 Header TSW-103-07-G-D Samtec J46, J52, J54, J56, J58 0 Header, 100mil, 3x1, Gold, TH 3x1 Header TSW-103-07-G-S Samtec J47, J49 0 Header, 100mil, 2x1, Gold, TH 2x1 Header TSW-102-07-G-S Samtec J48 0 SMA Straight PCB Socket Die Cast, 50 Ohm, TH SMA Straight PCB Socket Die Cast, TH 5-1814832-1 TE Connectivity J50, J51 0 Header, 100mil, 4x1, Gold, TH 4x1 Header TSW-104-07-G-S Samtec J60 0 Connector, Male, 1.27 mm, 40x4, SMD Connector, Male, 1.27 mm, 40x4, SMD ASP-134602-01 Samtec R15, R16, R17, R18, R20, R40, R50, R59, R60, R61, R64, R65, R66, R117, R124, R129, R132, R137, R138, R139, R147, R163, R165, R182, R183 0 RES, 0, 5%, 0.063 W, 0402 0402 CRCW04020000Z0ED Vishay-Dale 0 SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Hardware Reference Copyright © 2015–2016, Texas Instruments Incorporated 57 EVM Bill of Materials www.ti.com Table 3. AFE5816 EVM Bill of Materials (1) (continued) Designator Qty Value Description Package Reference Part Number MFR R73, R76, R81, R85, R86, R88, R115 0 10k RES, 10 k, 5%, 0.063 W, 0402 0402 CRCW040210K0JNED Vishay-Dale R83 0 100 RES, 100, 1%, 0.1 W, 0402 0402 ERJ-2RKF1000X Panasonic R96, R140 0 RES, 0, 5%, 0.063 W, 0402 0402 CRCW04020000Z0ED Vishay-Dale R113, R114, R118, R119 0 390 RES, 390, 0.1%, 0.1 W, 0603 0603 RG1608P-391-B-T5 Susumu Co Ltd R116 0 10k Trimmer, 10k ohm, 0.5W, TH 9.5x10x4.8mm 3296W-1-103LF Bourns R120 0 49.9 RES, 49.9, 1%, 0.063 W, 0402 0402 CRCW040249R9FKED Vishay-Dale R121 0 1.00Meg RES, 1.00 M, 1%, 0.1 W, 0603 0603 CRCW06031M00FKEA Vishay-Dale R122 0 200 RES, 200 ohm, 0.1%, 0.125W, 0805 0805 RG2012P-201-B-T5 Susumu Co Ltd R126 0 1k Trimmer, 1k ohm, 0.5W, TH 9.5x10x4.8mm 3296W-1-102LF Bourns R128, R131 0 200 RES, 200, 1%, 0.1 W, 0603 0603 CRCW0603200RFKEA Vishay-Dale R150, R159, R167, R177 0 1.0k RES, 1.0 k, 5%, 0.1 W, 0603 0603 CRCW06031K00JNEA Vishay-Dale SH-1, SH-2, SH-3, SH-4 0 1x2 Shunt, 100mil, Gold plated, Black Shunt SNT-100-BK-G Samtec TP7, TP37 0 White Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone TP10, TP36 Alternate Part Number Alternate MFR 969102-0000-DA 3M 0 Red Test Point, Miniature, Red, TH Red Miniature Testpoint 5000 Keystone TP23, TP28, TP33, TP52 0 Orange Test Point, Miniature, Orange, TH Orange Miniature Testpoint 5003 Keystone TP40, TP41, TP42, TP43, TP44, TP45, TP46, TP47, TP48, TP49 0 Blue Test Point, Miniature, Blue, TH Blue Miniature Testpoint 5117 Keystone U14 0 1.1 nV/rtHz Noise, Low Power, Precision Operational Amplifier, 4.5 to 36 V, -40 to 125 degC, 8-pin SOIC (D0008A), Green (RoHS & no Sb/Br) D0008A OPA211AIDR Texas Instruments Equivalent None U15 0 HIGH-SPEED, LOW-NOISE, FULLYDIFFERENTIAL I/O AMPLIFIERS, DGN0008D DGN0008D THS4131CDGNR Texas Instruments THS4131CDGN Texas Instruments U19 0 64K I2C Smart Serial EEPROM, SOIC-8 SOIC-8, 208mil wide 24LC65-I/SM Microchip TP19, TP24, TP29, TP34, 58 TP20, TP25, TP30, TP35, TP21, TP26, TP31, TP50, TP22, TP27, TP32, TP51, Hardware Reference SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Appendix F SLOU429A – December 2015 – Revised February 2016 FAQ and Troubleshooting F.1 Common Issues The following section illustrates some of the common problems seen when attempting to use the EVM hardware and software. F.1.1 • Issues Windows 8 and Windows 10 support: Officially, the EVM software is only supported for Windows 7. Windows 8 and 10, however, are often known to work but might require enabling .NET FRAMEWORK 3.5. In Control Panel, choose Programs and Features, choose Turn Windows features on or off, and then select the .NET Framework 3.5 (includes .NET 2.0 and 3.0) check box. This option requires an internet connection. Do not select the child items. Figure 70. Enable .NET Framework • • Power supply capacity: It is likely that both the AFE EVM and the TSW EVM do not have a wall power supply. Instead, they include the ability to connect to a bench-top supply via the provided cable. It is critical that each of these EVMs has access to 2 A of current capacity. No Capture in HSDCPro: It is possible that once the GUIs and EVMs are configured for capture, and the capture button in HSDCPro is pressed, that nothing seems to happen and eventually the GUI will timeout and a pop-up an error appears as seen in Figure 71. Reasons for this can include the following: – Incorrect firmware loaded – Current starvation on at least one EVM, 2 A is sufficient – Missing Data output clock from the AFE to the FGPA. With LVDS, this could be the FCLK or DCLK. D5 of the TSW1400 should turn on, and if not, this is probably the reason. With JESD204B data, a SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated FAQ and Troubleshooting 59 Revision History www.ti.com missing GTX Clk or SysRef clock to the FPGA could be the reason. ❏ Verify that the EVMs are mechanically mated correctly ❏ Verify power supply to both EVMs ❏ Verify jumper settings on the AFE EVM. Particularly inspect J29, J33, J37, J31, J34, and J36. ❏ Use an oscilloscope to test the frequency of the clock at header J36 or J34. This should be a 50-MHz square wave. TP44 should be 200 MHz. If using JESD, also check TP42 near the LMK04826, this should be either 200 MHz or 400 MHz, by default. Also check TP43. Figure 71. Read DDR Error for No Capture Revision History Changes from Original (October 2015) to A Revision .................................................................................................... Page • • • • • • • • • • • • • Modified the abstract. ..................................................................................................................... 1 Changed board image and text and renamed the EVM Hardware Overview section. ........................................... 4 Moved and changed text in the GUI Software Installation section. ................................................................. 5 Moved and changed the section name of the Quick Views of Evaluation Setups for LVDS Interface section. .............. 6 Changed text in the Quick Views of Evaluation Setups for LVDS Interface section.............................................. 6 Changed text and section name in the Testing the EVM Data Capture with LVDS section. .................................... 8 Completely overhauled the Software Installation section. .......................................................................... 18 Added the Hardware Configuration section. ......................................................................................... 31 Added the Triggering Options section. ................................................................................................ 35 Added the Common Hardware Modifications section. .............................................................................. 37 Added the AFE5816 EVM Hardware Overview and Schematics sections to Appendix E. .................................... 38 Updated the Bill of Materials in Appendix E. ......................................................................................... 38 Added the FAQ and Troubleshooting section. ....................................................................................... 59 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 60 Revision History SLOU429A – December 2015 – Revised February 2016 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES 1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions. 1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software 1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned, or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production system. 2 Limited Warranty and Related Remedies/Disclaimers: 2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License Agreement. 2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as mandated by government requirements. TI does not test all parameters of each EVM. 2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM, or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day warranty period. 3 Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter. 3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant: CAUTION This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • • • • Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help. 3.2 Canada 3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 Concerning EVMs Including Radio Transmitters: This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concernant les EVMs avec appareils radio: Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concerning EVMs Including Detachable Antennas: Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur 3.3 Japan 3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に 輸入される評価用キット、ボードについては、次のところをご覧ください。 http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified by TI as conforming to Technical Regulations of Radio Law of Japan. If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs: 1. 2. 3. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan. SPACER SPACER SPACER SPACER SPACER 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 2. 3. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 実験局の免許を取得後ご使用いただく。 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER 4 EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information related to, for example, temperatures and voltages. 4.3 Safety-Related Warnings and Restrictions: 4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or property damage. If there are questions concerning performance ratings and specifications, User should contact a TI field representative prior to connecting interface electronics including input power and intended loads. Any loads applied outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit components may have elevated case temperatures. These components include but are not limited to linear regulators, switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the information in the associated documentation. When working with the EVM, please be aware that the EVM may become very warm. 4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems, and subsystems. User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees, affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or designees. 4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal, state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local requirements. 5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as accurate, complete, reliable, current, or error-free. SPACER SPACER SPACER SPACER SPACER SPACER SPACER 6. Disclaimers: 6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS. 6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF THE EVM. 7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES, EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED. 8. Limitations on Damages and Liability: 8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS, LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED. 8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT. 9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s) will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s), excluding any postage or packaging costs. 10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas, without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas. Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated spacer IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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