AFE7906IABJ

AFE7906 SBASAF7C – JANUARY 2022 – REVISED MAY 2023 AFE7906 6-Channel, 5-MHz to 12-GHz RF Sampling Receiver with 3-GSPS ADCs 1 Features 3 Description • • • The AFE7906 is a high performance, wide bandwidth multi-channel receiver, integrating six RF Sampling ADCs. With operation up to 12 GHz, this device enables direct RF sampling in the L, S, C and Xband frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems. • • • • • • • • Request full data sheet Six RF sampling 14 bit, 3 GSPS ADCs Maximum RF signal bandwidth: – 4 ADCs: 1200 MHz per ADC – 6 ADCs: 600 MHz per ADC RF frequency range: 5 MHz - 12 GHz Digital step attenuators (DSA): 25 dB range, 0.5dB steps Single DDC (on 6 channels) or dual-band DDCs (on 4 channels) 16x NCOs per DDC channel Optional Internal PLL/VCO for ADC clocks or external clock at ADC sample rate Sysref alignment detector SerDes data interface: – JESD204B and JESD204C compatible – 8 SerDes transmitters up to 29.5 Gbps – Subclass 1 multi-device synchronization Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch 2 Applications • • • • Radar Seeker front end Defense radio Wireless communications test Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Four receiver channels have an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX or 600 MHz. The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock. Package Information PART NUMBER PACKAGE(1) PACKAGE SIZE(2) FC-BGA 17.00 mm × 17.00 mm AFE7906 (1) (2) For all available packages, see the orderable addendum at the end of the data sheet. The package size (length × width) is a nominal value and includes pins, where applicable. spacer DSA 1FB+/- DSA 1RX+/- DSA 2RX+/- Buffer SHA ADC FB DDC Buffer SHA ADC RX DDC Buffer SHA ADC RX DDC 1STX+/- JESD204B/C 2STX+/- PLL /2,3,4,6 CLKIN+/- SYSREF+/- 3STX+/4STX+/5STX+/6STX+/- DSA 4RX+/- DSA 3RX+/- DSA 2FB+/- 7STX+/RX DDC Buffer SHA ADC Buffer SHA ADC RX DDC ADC FB DDC Buffer SHA 8STX+/- Functional Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Description (continued).................................................. 3 5 Revision History.............................................................. 3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................5 6.4 Thermal Information....................................................5 6.5 RF ADC Electrical Characteristics.............................. 6 6.6 PLL/VCO/Clock Electrical Characteristics................ 12 2 6.7 Digital Electrical Characteristics................................14 6.8 Power Supply Electrical Characteristics................... 15 6.9 Timing Requirements................................................ 17 6.10 Switching Characteristics........................................18 6.11 Typical Characteristics............................................ 19 7 Device and Documentation Support............................68 7.1 Receiving Notification of Documentation Updates....68 7.2 Support Resources................................................... 68 7.3 Trademarks............................................................... 68 7.4 Electrostatic Discharge Caution................................68 7.5 Glossary....................................................................68 8 Mechanical, Packaging, and Orderable Information.. 68 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7906 AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 4 Description (continued) Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analogto-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX without FB paths or 600 MHz with two FB paths (1200 MHz BW each). The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock. 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from July 9, 2022 to May 30, 2023 (from Revision B (July 2022) to Revision C (May 2023)) Page • Changed the Device Information to Package Information table......................................................................... 1 • Changed IIH and IIL units to µA......................................................................................................................... 14 Changes from March 11, 2022 to July 8, 2022 (from Revision A (March 2022) to Revision B (July 2022)) Page • Deleted ABJ from the Thermal Information table. The table applies to both ABJ and the ALK packages......... 4 • Changed 0RX - 3RX to 1RX - 4RX in several plots..........................................................................................40 • Changed 0RX - 3RX to 1RX - 4RX in several plots..........................................................................................45 Changes from Revision * (January 2022) to Revision A (March 2022) Page • Added Feature to Request the full data sheet....................................................................................................1 • Added the Specification tables to the data sheet................................................................................................4 • Changed Power Mode 4 to fRX = 2.25 GHz..................................................................................................... 15 • Added the Typical Characteristics section to the data sheet............................................................................ 19 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7906 3 AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) Supply Voltage Range Pin Volatge Range MIN MAX DVDD0P9, VDDT0P9 –0.3 1.2 V VDD1P2RX, VDD1P2TXCLK, VDD1P2TXENC, VDD1P2PLL, VDD1P2PLLCLKREF, VDD1P2FB, VDD1P2FBCML, VDD1P2RXCML –0.3 1.4 V VDD1P8RX, VDD1P8RXCLK, VDD1P8TX, VDD1P8TXDAC, VDD1P8TXENC, VDD1P8PLL, VDD1P8PLLVCO, VDD1P8FB, VDD1P8FBCLK, VDD1P8GPIO, VDDA1P8 –0.5 2.1 V {1/2/3/4}RXIN+/- –0.5 VDDRX1P8+0.3 V 1FBIN+/-, 2FB+/- –0.5 VDDFB1P8+0.3 V REFCLK+/-, SYSREF+/- –0.3 1.4 V {1:8}STX+/- –0.3 1.4 V GPIO{B/C/D/E}x, SPICLK, SPISDIO, SPISDO, SPISEN, RESETZ, BISTB0, BISTB1 –0.5 VDD1P8GPIO + 0.3 V IFORCE, VSENSE –0.3 VDDCLK1P8 + 0.3 V SRDAMUX1, SRDAMUX2 –0.3 VDDA1P8+0.3 V Peak Input Current any input TJ Junction temperature Tstg Storage temperature (1) –65 UNIT 20 mA 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) (2) 4 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/ JEDEC JS-001, all pins(1) 1000 Charged device model (CDM), per ANSI/ESDA/ JEDEC JS-002, all pins(2) 150 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible if necessary precautions are taken. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7906 AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT DVDD0P9, VDDT0P9 Supply voltage 0.9V 0.9 0.925 0.95 V VDD1P2{RX/TXCLK/TXENC/FB/PLL/ PLLCLKREF/FBCML/RXCML} Supply voltage 1.2V 1.15 1.2 1.25 V VDD1P8{RX/RXCLK/TX/TXDAC/ TXENC/PLL/PLLVCO/FB/FBCLK/ GPIO}, VDDA1P8 Supply voltage 1.8V 1.75 1.8 1.85 V TA Ambient temperature –40 85 °C 110(1) °C Operating Junction Temperature TJ (1) Maximum Operating Junction Temperature 125 °C Prolonged use at or above this junction temperature can increase the device failure-in-time (FIT) rate. Refer to SBAA403 application note for additional details 6.4 Thermal Information AFE7906 THERMAL METRIC(1) FC-BGA UNIT 400 PINS RθJA Junction-to-ambient thermal resistance 16.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 0.42 °C/W RθJB Junction-to-board thermal resistance 4.85 °C/W ΨJT Junction-to-top characterization parameter 0.12 °C/W ΨJB Junction-to-board characterization parameter 4.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7906 5 AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 6.5 RF ADC Electrical Characteristics Typical values at TA = +25°C, full temperature range is TA,MIN = -40°C to TJ,MAX = +110°C; RX Output Rate = 491.52MSPS below 6GHz input frequency and 1500MSPS above 6GHz input frequency, fADC = 2949.12MSPS; PLL clock mode with fREF = 491.52MHz below 6GHz input frequency and External clock mode with fCLK = 2949.12MHz above 6GHz input frequency; nominal power supplies; DSA Setting =3dB; SerDes rate =24.33Gbps; unless otherwise noted. PARAMETER ADCRES ADC resolution FRFin RF input frequency range PFS_CW,min PFS_CW,MAX TEST CONDITIONS 5 -0.4 fIN = 30 MHz, DSA=0dB, fADC = 1500MSPS, fNCO = 30MHz, Decimate by 24 -2.2 fIN = 410 MHz, DSA=0dB, fADC = 3000MSPS, fNCO = 400MHz, Decimate by 12 -2.5 fIN = 830 MHz, DSA=0dB -2.9 fIN = 1760 MHz, DSA=0dB -2.8 fIN = 2610 MHz, DSA=0dB -1.8 fIN = 3610 MHz, DSA=0dB -0.4 fIN = 4910 MHz, DSA=0dB 0.1 fIN = 8150 MHz, DSA=0dB 2.1 fIN = 9610 MHz, DSA=0dB 4.3 fIN = 5 MHz, fADC = 1500MSPS, fNCO = 17MHz, Decimate by 48 19.7 fIN = 30 MHz, fADC = 1500MSPS, fNCO = 30MHz, Decimate by 24 17.8 fIN = 410 MHz, fADC = 3000MSPS, fNCO = 400MHz, Decimate by 24 17.6 DSA Attenuation range Gflat 18 18.5 fIN = 4910 MHz 19.3 fIN = 8150 MHz 21.3 6 bits MHz dBm dBm 23.5 100.0 Ω 25.0 dB 0.5 DSA Attenuation step accuracy Delta=Gatt(X)-Gatt(X-1), Fin=3610MHz, after calibration 0.1 DSA Gain Steps Phase accuracy any 8dB range Fin=3610MHz, after calibration 0.9 DSA Gain Steps Phase accuracy any 8dB range Fin=4910MHz, after calibration 1.8 Measured Over 80MHz BW 0.2 Measured Over 200MHz BW 0.5 Measured Over 400MHz BW 1.1 Gain flatness UNIT 17.0 fIN = 3610 MHz DSA Attenuation step ATTstep 16.7 fIN = 2610 MHz fIN = 9610 MHz ATTrange MAX 12000 fIN = 5 MHz, DSA=0dB, fADC = 1500MSPS, fNCO = 17MHz, Decimate by 48 MAX Full scale input power - reliability f = 830 MHz IN limited, at device pins fIN = 1760 MHz Input reference impedance TYP 14 Min Full scale input power, at device pins (1) RTERM MIN dB deg Submit Document Feedback dB Copyright © 2023 Texas Instruments Incorporated Product Folder Links: AFE7906 AFE7906 www.ti.com SBASAF7C – JANUARY 2022 – REVISED MAY 2023 6.5 RF ADC Electrical Characteristics (continued) Typical values at TA = +25°C, full temperature range is TA,MIN = -40°C to TJ,MAX = +110°C; RX Output Rate = 491.52MSPS below 6GHz input frequency and 1500MSPS above 6GHz input frequency, fADC = 2949.12MSPS; PLL clock mode with fREF = 491.52MHz below 6GHz input frequency and External clock mode with fCLK = 2949.12MHz above 6GHz input frequency; nominal power supplies; DSA Setting =3dB; SerDes rate =24.33Gbps; unless otherwise noted. PARAMETER TEST CONDITIONS fIN = 30 MHz, DSA = 3dB, fADC = 1500MSPS, fNCO = 30MHz, Decimate by 24 -150.7 fIN = 410 MHz, DSA = 3dB, fADC = 3000MSPS, fNCO = 400MHz, Decimate by 24 -155.4 fIN = 830 MHz, DSA = 3dB(3) -156.2 3dB(3) -156.0 fIN = 2610 MHz, DSA = 3dB(3) -155.4 3dB(3) -155.1 fIN = 4910 MHz, DSA = 3dB(3) -155.1 3dB(3) -152 fIN = 9610 MHz, DSA = 3dB(3) -151 fIN = 3610 MHz, DSA = fIN = 8110 MHz, DSA = NFmin Noise Density (small signal = -30dBFS) Noise Figure min DSA Atten=0 - 3dB TYP -147.1 fIN = 1760 MHz, DSA = NSD MIN fIN = 5 MHz, DSA = 3dB, fADC = 1500MSPS, fNCO = 17MHz, Decimate by 48 fIN = 5 MHz, fADC = 1500MSPS, fNCO = 17MHz, Decimate by 48, 3