User's Guide
SLAU609A – November 2014 – Revised September 2016
AMC7836 Evaluation Module
This user's guide describes the characteristics, operation, and use of the AMC7836 evaluation boards
(EVMs). This user’s guide also discusses the proper setup and configuration of software and hardware,
and reviews various aspects of program operation. A complete circuit description, schematic diagram, and
bill of materials (BOM) are also included.
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2
3
4
5
6
Contents
Overview ...................................................................................................................... 3
1.1
AMC7836EVM Kit Contents ....................................................................................... 3
1.2
Related Documentation from TI ................................................................................... 3
AMC7836EVM Hardware Setup ........................................................................................... 4
2.1
Theory of Operation for AMC7836 Hardware ................................................................... 4
2.2
Signal Definitions of J7 (20-Pin Male Connector Socket) ..................................................... 5
2.3
Theory of Operation for SDM-USB-DIG Platform .............................................................. 6
AMC7836EVM Software Setup ............................................................................................ 7
3.1
Operating Systems for AMC7836EVM Software ............................................................... 7
3.2
AMC7836EVM Software Installation ............................................................................. 7
AMC7836EVM Hardware Overview ....................................................................................... 8
4.1
Electrostatic Discharge Warning .................................................................................. 8
4.2
Connecting the Hardware.......................................................................................... 9
4.3
Connecting the USB Cable to the SDM-DIG .................................................................... 9
4.4
AMC7836EVM Power Configurations .......................................................................... 10
4.5
ADC Signal Pins ................................................................................................... 10
4.6
DAC Signal Pins ................................................................................................... 11
4.7
GPIO Signal Pins .................................................................................................. 12
AMC7836EVM Software Overview ...................................................................................... 13
5.1
Starting the AMC7836EVM Software ........................................................................... 13
5.2
AMC7836EVM Software Features .............................................................................. 13
5.3
AMC7836EVM GPIO Page ...................................................................................... 20
AMC7836EVM Documentation ........................................................................................... 21
6.1
AMC7836EVM Board Schematic................................................................................ 21
6.2
AMC7836EVM PCB Components Layout...................................................................... 23
6.3
AMC7836 Test Board Bill of Materials ......................................................................... 24
List of Figures
1
AMC7836EVM Hardware Setup ........................................................................................... 4
2
AMC7836 Test Board Block Diagram ..................................................................................... 4
3
SDM-USB-DIG Platform Block Diagram .................................................................................. 6
4
AMC7836EVM Installer Directory
5
AMC7836EVM Install Path ................................................................................................. 7
6
Typical Hardware Connections on the AMC7836EVM ................................................................. 9
7
Confirmation of SDM-USB-DIG Platform Driver Installation ........................................................... 9
8
AMC7836EVM GUI Location ............................................................................................. 13
9
AMC7836EVM GUI – Power On ......................................................................................... 13
10
Software Reset ............................................................................................................. 13
.........................................................................................
7
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11
Low Level Configuration Page............................................................................................ 14
12
ADC Page ................................................................................................................... 15
13
ADC Block Activation Sequence ......................................................................................... 15
14
........................................................................................................
ADC Channel MUX ........................................................................................................
ADC Chart...................................................................................................................
DAC Page ...................................................................................................................
Program DAC Registers ...................................................................................................
DAC Read ...................................................................................................................
ALARMS Page .............................................................................................................
Enable Alarm for Configuration ...........................................................................................
CH-FALR-CT Menu ........................................................................................................
Clear DAC Options .........................................................................................................
GPIO Page ..................................................................................................................
GPIO Write/Read ...........................................................................................................
AMC7836EVM Schematic (1 of 2) .......................................................................................
AMC7836EVM Schematic (2 of 2) .......................................................................................
AMC7836EVM PCB Components Layout...............................................................................
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16
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20
21
22
23
24
25
26
27
28
ADC Channel MUX
15
16
16
17
17
18
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18
19
19
20
20
21
22
23
List of Tables
1
Contents of AMC7836EVM Kit ............................................................................................. 3
2
Related Documentation ..................................................................................................... 3
3
J7 Signal Definition .......................................................................................................... 5
4
Default Jumper Settings .................................................................................................... 8
5
AMC7836EVM Jumper Settings
6
7
8
9
10
11
12
2
.........................................................................................
AMC7836EVM ADC Signal Connections ...............................................................................
AMC7836EVM DAC Signal Connections ...............................................................................
AMC7836EVM DAC Range Connections ...............................................................................
AMC7836 DAC Group Configuration ....................................................................................
AMC7836EVM GPIO Signal Definition ..................................................................................
Conversion Rates ..........................................................................................................
AMC7836EVM Bill of Materials ...........................................................................................
AMC7836 Evaluation Module
10
10
11
11
12
12
16
24
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Overview
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1
Overview
This EVM features the AMC7836 device, a highly integrated, low-power, complete analog monitoring and
control solution that includes a 21-channel (12-bit) ADC, 16-channel (12-bit) DAC, eight general-purpose
I/Os (GPIO), and a local temperature sensor. The DACs include a flexible output range that allows the
device to be fully compatible with a large array of biasing technologies, such as LDMOS, GaAs, and GaN.
The devices also feature programmable out-of-range alarms, an internal reference, and a low power SPIcompatible serial interface.
1.1
AMC7836EVM Kit Contents
Table 1 details the contents of the EVM kit. Contact the TI Product Information Center nearest you if any
component is missing. TI highly recommends verifying you have the latest versions of the related software
at the TI website, www.ti.com.
Table 1. Contents of AMC7836EVM Kit (1)
(1)
1.2
Item
Quantity
AMC7836EVM PCB Evaluation Board
1
SDM-USB-DIG Platform PCB
1
USB Extender Cable
1
The 24-V wall adapter is not included with the evaluation module (EVM). Optionally, a 24-V (750-mA)
center-positive wall adapter can be separately purchased to interface to the onboard 2.1 × 5.5-mm DC
jack. In the case that a wall adapter is not available, external terminal blocks are included, which can
interface with external supplies.
Related Documentation from TI
The following document provides information regarding Texas Instruments integrated circuits used in the
assembly of the AMC7836EVM. This user's guide is available from the TI web site under literature number
SLAU609. Any letter appended to the literature number corresponds to the document revision that is
current at the time of the writing of this document. Newer revisions may be available from the TI web site
at http://www.ti.com/, or call the Texas Instruments Literature Response Center at (800) 477-8924 or the
Product Information Center at (972) 644-5580. When ordering, identify the document by both title and
literature number
Table 2. Related Documentation
Document
Literature Number
AMC7836 Product Data Sheet
SLAS986
SDM-USB-DIG Platform User’s Guide
SBOU136
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AMC7836EVM Hardware Setup
This section provides the overall system setup for the EVM. A personal computer (PC) runs software that
communicates with the SDM-USB-DIG platform, which generates the power and digital signals used to
communicate with the EVM board. The EVM includes a +24-V wall supply that provides power to on-board
power regulators (LDOs), which regulate the analog and digital supplies. Connectors are also included on
the EVM board for optional, external power supplies. Figure 1 displays the system setup for the
AMC7836EVM.
Personal
Computer
(PC)
External Power
or
Optional 24-V Wall Adapter
USB Bus
from
Computer
SDM-USBDIG
J8 Connection or
Terminal Blocks
20-Pin
Connector
AMC7836EVM
Figure 1. AMC7836EVM Hardware Setup
2.1
Theory of Operation for AMC7836 Hardware
A block diagram of the AMC7836EVM test board is displayed in Figure 2. The EVM board provides test
points and connections for the supplies, internal reference, ground connections, SPI inputs, ADC inputs,
and analog outputs of the DAC.
Optional:
24-V Wall Adapter
Default: Terminal
Blocks for External
Power
Power
20-Pin
Conn. To
SDMUSB-DIG
SPI
AMC7836
8 GPIO
Connection
16-CH 12-Bit DACs
21-CH ADC
Input
Figure 2. AMC7836 Test Board Block Diagram
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2.2
Signal Definitions of J7 (20-Pin Male Connector Socket)
The AMC7836EVM includes a 20-pin connector socket used to communicate between the EVM and the
SDM-USB-DIG platform. The pin out of the J7 connector is shown in Table 3.
Table 3. J7 Signal Definition
Pin on J7
Signal
Description
1
SCL
I2C clock signal (SCL)
2
DIG_GPIO2
GPIO – control output or measure input
3
DIG_GPIO0
GPIO – control output or measure input
4
DIG_GPIO3
GPIO – control output or measure input
5
SDA
I2C data signal (SDA)
6
DIG_GPIO4
GPIO – control output or measure input
7
DIG_GPIO1
GPIO – Control Output or Measure Input
8
DIG_GPIO5
GPIO – control output or measure input
9
MOSI
SPI data output (MOSI)
10
DIG_GPIO6
GPIO – control output or measure input
11
VDUT
Switchable DUT power supply: +3.3 V, +5 V, Hi-Z
(disconnected). Note: When VDUT is Hi-Z all digital I/O are
Hi-Z as well.
12
DIG_GPIO7
GPIO – control output or measure input
13
SCLK
SPI clock signal (SCLK)
14
DIG_GPIO8
GPIO – control output or measure input
15
GND
Power return (GND)
16
DIG_GPIO9
GPIO – control output or measure input
17
CS
SPI chip select signal (CS)
18
DIG_GPIO10
GPIO – control output or measure input
19
MISO
SPI data input (MISO)
20
DIG_GPIO11
GPIO – control output or measure input
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Theory of Operation for SDM-USB-DIG Platform
The SDM-USB-DIG platform is a general-purpose data acquisition system that is used on select TI EVMs.
The core component of the platform is the MSP430F5528, an ultra-low power 16-bit MCU. The
microcontroller receives information from the host PC and translates it into I2C, SPI, or other digital I/O
patterns. The connected device (in this case, the AMC7836 device) connects to the I/O interface of the
platform. During digital I/O transactions, the platform obtains information from the AMC7836 device and
sends to the host PC for interpretation. A block diagram of the platform is shown in Figure 3.
SDM-USB-DIG
+3.3 V
USB Bus
from
Computer
USB
+5.0 V
MSP430F5528
uC
Level
Translators
I2C
SPI
GPIO
To Test Board
To Computer and Power Supplies
3.3-V
Regulator
Power on
Reset
USB +5.0 V
+3.3 V
Power
Switching
Vdut
(Hi-Z, 3.3 V or 5 V) Switched Power
Figure 3. SDM-USB-DIG Platform Block Diagram
6
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3
AMC7836EVM Software Setup
This section provides the procedure for EVM software installation.
3.1
Operating Systems for AMC7836EVM Software
The EVM software was tested on the Microsoft® Windows® XP and Windows 7 operating systems with the
United States and European regional settings. The software should also be compatible with other
Windows operating systems.
3.2
AMC7836EVM Software Installation
The software is available through the EVM product folder on the TI website. After the software is
downloaded on the PC, navigate to the AMC7836EVM_Installer folder, and run the setup.exe file, as
shown in Figure 4. When the software is launched, an installation dialog opens and prompts the user to
select an installation directory. If left unchanged, the software location defaults to C:\Program Files
(x86)\AMC7836EVM. The software installation automatically copies the required drivers for the SDM-USBDIG and AMC7836EVM to the PC. After the software is installed, connecting the SDM-USB-DIG to a USB
port may launch a driver installation dialog. Choose the ‘Install this driver software anyway’ option to
continue with installation. (Note: On Windows XP machines, choose to have the system automatically find
the driver or software.)
Figure 4. AMC7836EVM Installer Directory
Figure 5. AMC7836EVM Install Path
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AMC7836EVM Hardware Overview
The subsequent sections provide detailed information on the EVM hardware, and jumper configuration
settings. To use the +24V wall supply and onboard supplies, connect the jumpers to their default
configurations, which are located in Table 4. Connect the USB extender cable from the SDM-USB-DIG to
the PC, and the +24-V wall adapter to the J8 terminal.
Table 4. Default Jumper Settings
Jumper
Position
Description
JP1
1-2
Shunting JP1 to this position connects the AVCC supply for the AMC7836 to the +12V supply
provided on board.
2-3
Shunting JP1 to this position connects the AVCC supply for the AMC7836 to the +5V supply
provided on board.
1-2
Shunting JP2 to this position connects the AVEE/AVSSA supply for the AMC7836 to the-12V
supply provided on board.
2-3
Shunting JP2 to this position connects the AVEE/AVSSA supply for the AMC7836 to GND
provided on board.
1-2
Shunting JP3 to this position connects the AVSSB pin to AVEE/AVSSA supply.
2-3
Shunting JP3 to this position connects the AVSSB pin to GND.
1-2
Shunting JP4 to this position connects the AVSSC pin to AVEE/AVSSA supply.
2-3
Shunting JP4 to this position connects the AVSSC pin to GND.
1-2
Shunting JP5 to this position connects the AVSSD pin to AVEE/AVSSA supply.
2-3
Shunting JP5 to this position connects the AVSSD pin to GND.
1-2
Shunting JP6 to this position connects the AVDD and DVDD supplies for the AMC7836 to the
external connector J10.
2-3
Shunting JP6 to this position connects the AVDD and DVDD supplies for the AMC7836 to the 5V
supply provided on board.
1-2
Shunting JP7 to this position connects the IOVDD supply for the AMC7836 to the +3.3V supply
provided by the SDM-USB-DIG.
2-3
Shunting JP7 to this position connects the IOVDD supply for the AMC7836 to the external
connector J9.
JP2
JP3
JP4
JP5
JP6
JP7
4.1
Electrostatic Discharge Warning
Many of the components on the AMC7836EVM are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling
the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
8
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4.2
Connecting the Hardware
To connect the SDM-USB-DIG to the EVM board, align and firmly connect the female and male ends of
the 20-pin connectors (see Figure 6). Verify the connection is snug, as loose connections may cause
intermittent operation.
Figure 6. Typical Hardware Connections on the AMC7836EVM
4.3
Connecting the USB Cable to the SDM-DIG
Figure 7 shows the typical response when connecting the SDM-USB-DIG platform to a USB port of a
personal computer (PC) for the first time. The PC usually responds with a Found New Hardware, USB
Device pop-up dialog window. The pop-up window then changes to Found New Hardware, Virtual COM
Port (CDC). This pop-up indicates that the device is ready for use. The CDC driver is used for
communication between the SDM-USB-DIG and PC.
Figure 7. Confirmation of SDM-USB-DIG Platform Driver Installation
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AMC7836EVM Power Configurations
This section describes the various power configurations that can be used by the EVM.
The AMC7836EVM provides terminal blocks for external supplies as well as (optional) onboard power
conditioning to convert a 24-V supply into a +12-V, –12-V, and +5-V supply. Jumpers JP1, JP2, JP6, and
JP7 allow the AVCC, AVEE, AVDD, and IOVDD pins to be configured to use these onboard supplies, or
external supplies through the J6, J9, and J10 terminal blocks. These connection schemes are displayed in
Table 5.
Table 5. AMC7836EVM Jumper Settings
Jumper
Position
Description
JP1
1-2
Shunting JP1 to this position connects the AVCC supply for the AMC7836 to the +12-V supply provided on
board.
2-3
Shunting JP1 to this position connects the AVCC supply for the AMC7836 to the +5-V supply provided on
board.
1-2
Shunting JP2 to this position connects the AVEE/AVSSA supply for the AMC7836 to the -12-V supply
provided on board.
2-3
Shunting JP2 to this position connects the AVEE/AVSSA supply for the AMC7836 to GND provided on
board.
1-2
Shunting JP6 to this position connects the AVDD and DVDD supplies for the AMC7836 to the external
connector J10.
2-3
Shunting JP6 to this position connects the AVDD and DVDD supplies for the AMC7836 to the 5-V supply
provided on board.
1-2
Shunting JP7 to this position connects the IOVDD supply for the AMC7836 to the +3.3-V supply provided by
the SDM-USB-DIG.
2-3
Shunting JP7 to this position connects the IOVDD supply for the AMC7836 to the external connector J9.
JP2
JP6
JP7
4.5
ADC Signal Pins
The AMC7836 device contains 21 ADC single-ended channels, sixteen of which have bipolar inputs
(ADC0–ADC15) and have an input range of –10 V to 10 V. The unipolar inputs, (ADC16–ADC20), have a
range of 0 V to 5 V. These signal pins are connected to the J2, J4, and J5 connectors, which are
described in Table 6.
Table 6. AMC7836EVM ADC Signal Connections
10
Name
Connector
Description
ADC0
J2-1
ADC channel 0 input
ADC1
J2-3
ADC channel 1 input
ADC2
J2-5
ADC channel 2 input
ADC3
J2-7
ADC channel 3 input
ADC4
J2-9
ADC channel 4 input
ADC5
J2-11
ADC channel 5 input
ADC6
J2-13
ADC channel 6 input
ADC7
J2-15
ADC channel 7 input
ADC8
J4-1
ADC channel 8 input
ADC9
J4-3
ADC channel 9 input
ADC10
J4-5
ADC channel 10 input
ADC11
J4-7
ADC channel 11 input
ADC12
J4-9
ADC channel 12 input
ADC13
J4-11
ADC channel 13 input
ADC14
J4-13
ADC channel 14 input
ADC15
J4-15
ADC channel 15 input
LV ADC16
J5-1
ADC channel 16 input
LV ADC17
J5-3
ADC channel 17 input
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Table 6. AMC7836EVM ADC Signal
Connections (continued)
4.6
Name
Connector
Description
LV ADC18
J5-5
ADC channel 18 input
LV ADC19
J5-7
ADC channel 19 input
LV ADC20
J5-9
ADC channel 20 input
DAC Signal Pins
The sixteen DAC voltage outputs of the AMC7836 device are accessible through the J1, and J3
connectors, as shown in Table 7. The DAC voltage ranges are configurable through software and
hardware. Table 8 describes the selectable voltage ranges and jumper configurations for JP3, JP4, and
JP5.
Table 7. AMC7836EVM DAC Signal Connections
Name
Connector
Description
DAC A0
J1-15
DAC-A0 output
DAC A1
J1-13
DAC-A1 output
DAC A2
J1-11
DAC-A2 output
DAC A3
J1-9
DAC-A3 output
DAC B4
J1-7
DAC-B4 output
DAC B5
J1-5
DAC-B5 output
DAC B6
J1-3
DAC-B6 output
DAC B7
J1-1
DAC-B7 output
DAC C8
J3-2
DAC-C8 output
DAC C9
J3-4
DAC-C9 output
DAC C10
J3-6
DAC-C10 output
DAC C11
J3-8
DAC-C11 output
DAC D12
J3-10
DAC-D12 output
DAC D13
J3-12
DAC-D13 output
DAC D14
J3-14
DAC-D14 output
DAC D15
J3-16
DAC-D15 output
Table 8. AMC7836EVM DAC Range Connections
Jumper
Position
Description
JP3
1-2
Shunting JP3 to this position connects the AVSSB pin to AVEE/AVSSA supply.
2-3
Shunting JP3 to this position connects the AVSSB pin to GND.
1-2
Shunting JP4 to this position connects the AVSSC pin to AVEE/AVSSA supply.
2-3
Shunting JP4 to this position connects the AVSSC pin to GND.
1-2
Shunting JP5 to this position connects the AVSSD pin to AVEE/AVSSA supply.
2-3
Shunting JP5 to this position connects the AVSSD pin to GND.
JP4
JP5
The full-scale output range for each DAC group is limited by the power supplies AVCC and its
corresponding AVSS. The DAC outputs cannot exceed AVCC or be lower than AVSS.
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It is important to note that DAC group A shares a dual functionality, both as the AVEE pin and output
range for DAC group A. AVEE is also the lowest potential of the device, therefore, the other AVSS pins
should not go below the voltage set on the AVEE pin. A complete description of the different DAC Group
configurations is listed in Table 9.
Table 9. AMC7836 DAC Group Configuration
AVEE = GND
DAC Group
DACs
A
DAC_A0
DAC_A1
DAC_A2
DAC_A3
AVEE
DAC_B4
DAC_B5
DAC_B6
DAC_B7
AVSSB
DAC_C8
DAC_C9
DAC_C10
DAC_C11
AVSSC
DAC_D12
DAC_D13
DAC_D14
DAC_D15
AVSSD
B
C
D
4.7
Auto-Range and
Clamp Voltage
Selection
AVEE = -12 V
Valid Output
Range
Valid Clamp Voltage
Connection
+5-V or +10-V
GND
+5-V or +10-V
GND
+5-V or +10-V
GND
+5-V or +10-V
GND
Valid Output Range
Valid Clamp
Voltage
Connection
-5-V or -10-V
-12-V
-5-V or -10-V
-12-V
+5-V or +10-V
GND
-5-V or -10-V
-12-V
+5-V or +10-V
GND
-5-V or -10-V
-12-V
+5-V or +10-V
GND
GPIO Signal Pins
The eight GPIO signals on the EVM can be measured on the J11 header. A signal description of the J11
header is provided in Table 10.
Table 10. AMC7836EVM GPIO Signal Definition
12
Name
Connector
Description
GPIO0
J11-2
General-purpose I/O (GPIO0)
GPIO1
J11-4
General-purpose I/O (GPIO1)
GPIO2
J11-6
General-purpose I/O (GPIO2)
GPIO3
J11-8
General-purpose I/O (GPIO3)
GPIO4
J11-10
General-purpose I/O (GPIO4)
GPIO5
J11-12
General-purpose I/O (GPIO5)
GPIO6
J11-14
General-purpose I/O (GPIO6)
GPIO7
J11-16
General-purpose I/O (GPIO7)
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5
AMC7836EVM Software Overview
This section discusses how to use the AMC7836EVM software.
5.1
Starting the AMC7836EVM Software
Once the hardware connections are established and jumper settings configured, launch the software
located in the AMC7836EVM folder of the Start All Programs menu, and select the AMC7836EVM icon.
Figure 8. AMC7836EVM GUI Location
If the SDM-USB-DIG is properly connected to the AMC7836EVM, the GUI should automatically power on
the system and display CONNECTED: Power On in the upper right of the GUI, as seen in Figure 9.
Figure 9. AMC7836EVM GUI – Power On
If the SDM-USB-DIG has a faulty connection, or is not connected at all, the GUI will launch in simulation
mode. In simulation mode, NOT CONNECTED: Simulating will be displayed in the top right of the GUI. If
this text appears while the SDM-USB-DIG device is connected, then unplug the SDM-USB-DIG and close
the GUI. Reconnect the SDM-USB-DIG, and ensure that the connectors are correctly aligned. After this,
verify the USB extender cable is properly connected to both the SDM-USB-DIG and PC, and re-launch the
GUI. This issue can also occur if the CDC driver is installed incorrectly, and so the AMC7836EVM
software may need to be reinstalled.
5.2
AMC7836EVM Software Features
The following subsections describe the functionality of each page of the AMC7836EVM GUI.
5.2.1
Software Reset
The AMC7836 Software Reset button, shown in Figure 10, resets the AMC7836 device and resets all
registers to their default setting.
Figure 10. Software Reset
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AMC7836EVM Low Level Configuration Page
The AMC7836EVM features a Register Map page that allows access to low-level communication by
directly writing to and reading from the AMC7836’s registers. Selecting a register on the Register Map list
will present a description of the values in that register, and also display information such as the register’s
address, default value, size, and current value. The register values can be modified through the Hex Write
Register field, or set through Boolean check boxes under the Register Data column, as displayed in
Figure 11.
Figure 11. Low Level Configuration Page
This page also provides the option of saving the Register Map settings as a configuration file, which is
done by pressing the Save Config button. Additionally, the configuration files can be accessed through the
Load Config button.
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5.2.3
AMC7836EVM ADC Page
This page provides insight into the functionality of the AMC7836’s (21) channel 12-bit ADC. The ADC
block includes sixteen bipolar ADC channels featuring a –10- to 10-V input range, and five low voltage
unipolar analog channels that accept a 0- to 5-V range. The channels with the twenty volt range are
labeled as (ADC0–ADC15), while channels with five volt ranges are printed as (LV_ADC16–LV_ADC20).
Figure 12 displays the ADC Page.
Figure 12. ADC Page
To completely activate the ADC block, the Enable Reference Block must be enabled, along with the
Enable Internal Reference Buffer and Power ADC Block. This sequence is shown in Figure 13.
Figure 13. ADC Block Activation Sequence
Once the device is configured, individual channels can be enabled by selecting their respective ADC MUX
button, as shown in Figure 14.
Figure 14. ADC Channel MUX
The conversion mode can be set to either Auto or Direct mode.
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If choosing Direct Mode, a Start Conv is required to update every new read. In Direct Mode, the analog
inputs enabled in the ADC MUX register are converted sequentially one time. Conversions are triggered
by pressing the Start Conv button or can be automatically triggered before every read by enabling the
Auto-Trigger ADC's before read? check box. The ADC data registers, displayed on the right side of the
GUI, are updated with the converted results when the Read button is pressed. These controls are located
in Figure 15.
Figure 15. ADC Channel MUX
If choosing Auto Mode, ensure that the ADC-Update before read? (auto mode) boolean field is checked
and a Start Conv is issued to start the auto conversion process. The analog inputs that are enabled in the
ADC MUX register are converted sequentially and repeatedly. When one set of conversion is complete,
the ADC multiplexer returns to the first channel and repeats the process. The auto conversion process can
be stopped by pressing the Start Conv button again.
Most of the controls listed within the ADC image are used to set up the ADC configuration register. These
include the Conversion Rate and Conversion Mode parameters, which are selectable through their
respective drop-down list. The selectable conversion rates are listed in Table 11.
Table 11. Conversion Rates
Conversion Rate
Throughput (ADC0–ADC11)
(Single-Channel Auto Mode)
Throughput
(LVADC12–LVADC16)
(Single-Channel Auto Mode)
00
29 kSPS
87 kSPS
01
29 kSPS
43.5 kSPS
10
29 kSPS
29 kSPS
11
14.5 kSPS
14.5 kSPS
An ADC Chart is included in the ADC Page to keep a history of the contents of the data registers. This is
displayed in Figure 16. Pressing the (Auto) Read button starts the ADC Chart to periodically read the ADC
data registers. If in Direct Mode, the chart automatically issues a software conversion before every read.
In Auto mode, the user must ensure that all input channels are enabled in the ADC MUX block and Start
Conv button pressed before starting the (Auto) Read. The contents of the chart can be copied into
Microsoft® Excel® by right clicking on the chart and selecting Export Data to Excel.
Figure 16. ADC Chart
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5.2.4
AMC7836EVM DAC Page
The DAC page gives the users an interface to observe and control the different data registers, modes, and
configurations available for each individual DAC channel.
To fully activate the DAC block, the Enable Reference Block should be set. The DAC channels can be
individually set by selecting their respective check box under the Power DACs column, as displayed in
Figure 17.
Figure 17. DAC Page
The sixteen DAC channels are broken up into different DAC banks, where each channel within a bank
shares a common programmable voltage range, which is selectable through the Program Range column.
The default ‘Autoset’ range is automatically set at startup by the auto range detection circuit within the
AMC7836 device. If the AVSS pin is connected to ground, the Autoset range will automatically configure
the DAC for the 0- to 5-V range, while an AVSS value of –12 V would program the range for –10 V to 0 V.
The different DAC ranges can be by set by configuring the appropriate jumpers and supplies listed in
Table 8 and Table 9.
NOTE: Please ensure that the AMC7836EVM board is powered off before selecting different jumper
positions.
The DAC Page includes one hexadecimal input field under the Program Values column, which is shown in
Figure 18.
Figure 18. Program DAC Registers
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This window can be programmed with the desired DAC output voltage by writing the corresponding
hexadecimal value. Once the hexadecimal value is entered, it is instantly written to the internal DAC buffer
register, and the neighboring output voltage window will update. Pressing the Register Update button
shifts the contents of the DAC buffer stage to the DAC latch stage, which then updates the DAC output
voltage.
The Read Back column allows the user to read back the register contents of either the Latch or Buffer
stage, which is selectable through the Boolean check box under the Read DACs button, as shown in
Figure 19. The results are read back once the Read DACs button is pressed.
Figure 19. DAC Read
The AMC7836 ALARMS page gives the user access to the programmable out-of-range alarms for the
internal temperature sensor and low-voltage ADC channels (ADC16–ADC20). Figure 20 displays the
ALARMS Page of the AMC7836EVM. The page displays the name of each Alarm, shown under the Alarm
Name column, and provides information such as the value, High Limit, Low Limit, and Alarm Status, along
with other additional options.
Figure 20. ALARMS Page
5.2.5
AMC7836EVM ALARMS Page
To use the page, the ADC channel or Temperature Sensor should be enabled in the ADCs page of the
GUI. This is achieved by enabling the appropriate channel’s mux. Once the channels are active, the Low
Limit and High Limit fields will be available for edit (see Figure 21).
Figure 21. Enable Alarm for Configuration
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The Write Settings button is used to write the values from the Low Limit and High Limit fields into the
device. The Read Alarm button is used to read the state of the active channels. When an alarm is
triggered, the Alarm Status will display the text Tripped in red. If the channel values are within the range of
the alarm thresholds, the status will display No Alarm in black text.
Figure 22 displays the False Alarm protection, CH-FALR-CT, drop-down list, which contains integer values
that are related to the consecutive number of samples required for the alarm to activate. The lists defaults
to 16 consecutive samples, and therefore requires 16 conversions with an over range value before the
alarm is triggered.
Figure 22. CH-FALR-CT Menu
The CLR, ALARM OUT, and DACs to CLR column, as shown in Figure 23, allow the user to tie DAC
output behavior to alarm events. By selecting the CLR checkbox, the alarm events are able to force the
DACs into a clear state, regardless of which DAC operation mode is active, auto or manual. The DAC
channels to clear are selectable under the DACs to CLR column.
Figure 23. Clear DAC Options
The ALARM OUT checkbox allows the device to create an external signal on GPIO1 that goes low (active)
when an alarm event is detected. The general-purpose I/O, more specifically GPIO1 must be configured
for ALARMOUT for this function to take effect.
The ALARMIN-ALR checkbox gives the user the ability to clear the DACs with an active low input signal
through GPIO0. Just as with GPIO1, GPIO0 must be configured for ALARMIN for this function to take
effect.
The ALARMIN-ALR-OUT checkbox enables the propagation of alarm signals by allowing the user to input
an active-low signal to the ALARMIN pin, which then creates an active low signal on the ALARMOUT pin.
These functions need to be set in the GPIO configuration register, which is available for configuration in
the GPIO page of the AMC7836EVM GUI.
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AMC7836EVM GPIO Page
The AMC7836 GPIO Page features the first four (GPIO0–GPIO3) general-purpose I/O of the AMC7836
device. These four GPIOs are also configurable for other specific functions, including the ability to
externally trigger conversions, enable alarms, and provide an output indicating conversion completion. The
GPIO page also provides a detailed description text box that gives more information about the different
GPIO pins as the user hovers over the pull-down list under the GPIO Block column (see Figure 24).
Figure 24. GPIO Page
Use the GPIO Block section of the GPIO tab, as shown in Figure 25, to set the various GPIO functions.
The drop-down menu defaults to general-purpose I/O. To perform a write or read, set the W/R Function
pull-down to either Write or Read. The W/R value enables the user to input or observe the Boolean value
of the GPIO register. Press the Generate Write/Read button to write to or read from the GPIO pin.
Figure 25. GPIO Write/Read
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6
AMC7836EVM Documentation
This section contains the schematic diagrams and complete BOM for the AMC7836EVM. Documentation information for the SDM-USB-DIG
platform can be found in the SDM-USB-DIG Platform User’s Guide (SBOU136), available at the TI website at www.ti.com.
6.1
AMC7836EVM Board Schematic
Figure 26 and Figure 27 illustrate the EVM schematic.
AVDD
DVDD
IOVDD
C1
0.1µF
C2
0.1µF
C3
C4
C5
C6
C7
C8
C9
C10
NI
NI
NI
NI
NI
NI
NI
NI
GND
U1
GND
C11
GND
1
AVCC
C14
C15
C16
C17
C18
C19
C20
0.1µF
C21
GND
470pF
470pF
470pF
470pF
470pF
470pF
470pF
470pF
C12
C13
0.1µF
0.1µF
GND
J2
2
4
6
8
10
12
14
16
GND
1
3
5
7
9
11
13
15
R11
R15
R18
R22
R9
0
R13
0
R17
0
R20
0
1
3
5
7
9
11
13
15
R26
R29
R33
R37
R24
0
R27
0
R31
0
R35
0
AVDD
DVDD
20
57
AVCC_AB
AVCC_CD
0
GND
47
46
45
44
43
42
41
40
34
33
32
31
30
29
28
27
0
0
0
0
0
0
C30
C31
C32
C33
C34
C35
C36
C37
470pF
470pF
470pF
470pF
470pF
470pF
470pF
470pF
ADC_0
ADC_1
ADC_2
ADC_3
ADC_4
ADC_5
ADC_6
ADC_7
ADC_8
ADC_9
ADC_10
ADC_11
ADC_12
ADC_13
ADC_14
ADC_15
GND
39
38
37
36
35
GND
DIG_GPIO1 | /RESET
10
8
6
4
2
9
7
5
3
1
R45
R48
R50
0
R47
0
R49
0
0
2
R43
0
0
0
5
4
6
0
49
0
LVADC
GND
TP1
C40
C41
C42
C43
C44
470pF
470pF
470pF
470pF
470pF
C38
C39
NI
4.7µF
0
22
23
25
26
DAC_C8
DAC_C9
DAC_C10
DAC_C11
51
52
54
55
DAC_D12
DAC_D13
DAC_D14
DAC_D15
58
59
61
62
GPIO0/ALARMIN
GPIO1/ALARMOUT
GPIO2/ADCTRIG
GPIO3/DAV
GPIO4
GPIO5
GPIO6
GPIO7
7
8
9
10
11
12
13
14
R28
R30
R32
R34
R36
R38
R39
R40
0
0
0
0
0
0
0
0
3
R41
0
LV_ADC16
LV_ADC17
LV_ADC18
LV_ADC19
LV_ADC20
R42
SCLK
R44
MOSI | SDI
R46
/CS
R3
DAC_B4
DAC_B5
DAC_B6
DAC_B7
SDO
AVSS_B
AVSS_C
AVSS_D
THERM1
J5
0
15
16
18
19
0
J4
2
4
6
8
10
12
14
16
50
63
R1
DAC_A0
DAC_A1
DAC_A2
DAC_A3
IOVDD
AGND1
AGND2
AGND3
RESET
SCLK
SDI
CS
DGND
AVEE
REF_CMP
24
53
60
R2
0
R4
0
R6
0
R8
0
R5
0
R7
0
R10
0
R14
0
R12
R16
R19
0
R23
0
R21
R25
J1
15
13
11
9
7
5
3
1
GND
J3
0
2
4
6
8
10
12
14
16
0
0
0
DIG_GPIO2
DIG_GPIO3
DIG_GPIO4
DIG_GPIO5
DIG_GPIO6
DIG_GPIO7
DIG_GPIO8
DIG_GPIO9
16
14
12
10
8
6
4
2
|
|
|
|
|
|
|
|
AMC_GPIO0
AMC_GPIO1
AMC_GPIO2
AMC_GPIO3
AMC_GPIO4
AMC_GPIO5
AMC_GPIO6
AMC_GPIO7
C22
C23
C24
C25
C26
C27
C28
C29
NI
NI
NI
NI
NI
NI
NI
NI
1
3
5
7
9
11
13
15
GND
GND
MISO | SDO
AVSS_B
AVSS_C
AVSS_D
21
48
56
GND
64
17
AVEE/AVSS_A
PAD
AMC7836PAP
GND
GND
IOVDD
IOVDD
R51
R52
R53
R54
R55
R56
R57
R58
10.0k 10.0k 10.0k 10.0k 10.0k 10.0k 10.0k 10.0k
R59
R60
R61
R62
10.0k
10.0k
10.0k
10.0k
TP3
TP4
TP5
TP6
J7
DIG_GPIO2
DIG_GPIO3
DIG_GPIO4
DIG_GPIO5
DIG_GPIO6
DIG_GPIO7
DIG_GPIO8
DIG_GPIO9
|
|
|
|
|
|
|
|
AMC_GPIO0
AMC_GPIO1
AMC_GPIO2
AMC_GPIO3
AMC_GPIO4
AMC_GPIO5
AMC_GPIO6
AMC_GPIO7
2
4
6
8
10
12
14
16
18
20
J11
1
3
5
7
9
11
13
15
17
19
SCL | NC
DIG_GPIO0 | NC
SDA | NC
DIG_GPIO1 | /RESET
MOSI | SDI
VDUT
SCLK
/CS
MISO | SDO
TP13
GND
DIG_GPIO2
DIG_GPIO3
DIG_GPIO4
DIG_GPIO5
DIG_GPIO6
DIG_GPIO7
DIG_GPIO8
DIG_GPIO9
|
|
|
|
|
|
|
|
AMC_GPIO0
AMC_GPIO1
AMC_GPIO2
AMC_GPIO3
AMC_GPIO4
AMC_GPIO5
AMC_GPIO6
AMC_GPIO7
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
SCL/NC
DIG_GPIO0 | NC
SDA/NC
DIG_GPIO1 | /RESET
MOSI | SDI
VDUT
SCLK
/CS
MISO | SDO
GND
TP7
TP8
TP9
TP10 TP11
TP14
GND
Figure 26. AMC7836EVM Schematic (1 of 2)
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T1094-P5P-ND 19-30V
1
4.7µF
+14V
U2
R65
49.9k
R66
174k
26
VIN
178k 31
RT/CLK
C60
NI
28
SS/TR
R75
NI
29
STSEL
VADJ
36
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
GND_PT
GND_PT
PGND
PGND
PGND
PGND
PGND
PGND
1
4
5
30
32
33
34
37
9
8
16
17
18
19
20
40
INH/UVLO
1
R70
24.9k
GND
D1
MMSZ4689
5.1V
R71
13.7k
R72
2
GND
10
11
12
13
14
15
39
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
27
GND
R69
165k
C55
47µF 47µF
C56
C57
10µF
1µF
R68
NI
R73
VDUT
GND
35
6
7
21
22
23
24
38
41
2
3
25
PWRGD
PH
PH
PH
PH
PH
PH
PH
PH
ISHARE
DNC
DNC
IN
IN
13
1
20
OUT
OUT
EN
+12V_LDO
C58
C59
47µF
10µF
R67
750
3
SENSE
0
R74
R76
R77
R78
R79
R80
R81
R82
GND
GND
GND
+12V
U3
15
16
C54
1
C52
4.7µF
0 4
NI 5
0 6
NI 8
0 9
NI 10
0 11
NI 12
GND
6P4V2
6P4V1
3P2V
1P6V
0P8V
0P4V
0P2V
0P1V
NR
14
NC
NC
NC
NC
19
18
17
2
GND
PAD
7
21
OUT
OUT
1
20
C61
D2
Green
GND
1µF
2
C51
22µF
GND
TPS7A4700RGW
GND
GND
+5V
U4
15
16
C62
10µF
R84
NI
C63
13
EN
1µF
R85
VDUT
GND
IN
IN
+5V_LDO
C64
C65
47µF
10µF
0
R86
R87
R88
R89
R90
R91
R92
R93
GND
LMZ35003RKG
TP15
AVEE
R83
300
3
SENSE
1
C53
NI 4
NI 5
0 6
NI 8
NI 9
0 10
NI 11
NI 12
AVEE/AVSS_A
6P4V2
6P4V1
3P2V
1P6V
0P8V
0P4V
0P2V
0P1V
NR
14
NC
NC
NC
NC
19
18
17
2
GND
PAD
7
21
C66
D3
Green
GND
1µF
2
3
2
PJ-102A
GND
TPS7A4700RGW
GND
GND
1
C67
0.1µF
TP16
JP3
C68
-14V
C69
0.1µF
C70
4.7µF
C71
4.7µF
R94
174k
27
31
GND
R100
GND
R101
13.7k
C80
NI 29
NI
28
INH/UVLO
CLK
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
STSEL
RT
16
17
18
19
20
40
C74
47µF
47µF
R98
4.99k
C75
C76
10µF
1µF
R97
NI
R99
VDUT
GND
GND
JP4
2
6
7
21
22
23
24
38
41
AVSS_C
3
C81
0.1µF
GND
PH
PH
PH
PH
PH
PH
PH
PH
1
4
5
32
33
34
37
VADJ
36
4
5
6
8
9
10
11
12
NC
NC
NC
NC
NC
NC
NC
NC
2
AVSS_D
2
3
25
35
3
C82
0.1µF
DNC
DNC
DNC
DNC
GND
GND
GND
GND
GND
GND
GND
C78
47µF
10µF
R96
750
NR/SS
14
NC
NC
NC
NC
19
18
17
2
GND
PAD
7
21
C79
R102
162k
1µF
D4
Green
GND
GND
GND
JP1
+5V_LDO
3
1
R103
165k
10
11
12
13
14
15
39
DVDD
V+
VO
NC
C83
+5V_LDO
3
1
GND
NI
TP19
AVDD
JP6
R63
AVCC
NI
U7
4
GND
THERM1
C45
C46
C47
10µF
1µF
0.1µF
J6
AVCC
GND
AVEE
1
2
3
LM20BIM7
GND
JP2
2
3
GND
1
GND
IOVDD
GND
1
2
3
VDUT
600 ohm
2
IOVDD
C87
C88
1µF
0.1µF
GND
J10
L1
1
JP7
TP21
GND
1
AVDD
GND
0
C84
10µF
-12V_LDO
C85
1µF
C86
0.1µF
1
2
TP20
DVDD
GND
R64
NI GND
TP12
AVEE
2
R104
J9
+12V_LDO
TP2
NI - Temperature Circuit - User Option
LMZ34002RKG
GND
C77
TPS7A3301RGW
3
TP18
JP5
R95
1.50M
1µF
3
FB
-12V_LDO
C72
0
GND
8
9
A_VOUT
A_VOUT
A_VOUT
A_VOUT
A_VOUT
A_VOUT
A_VOUT
EN
1
AVEE
VOUT_PT
VOUT_PT
1
20
OUT
OUT
2
TP17
IN
IN
13
30
SS
-12V
U6
15
16
C73
1
AVEE
VIN
2
U5
26
3
2.2µF
GND
1
AVSS_B
2
5
2
C48
C49
C50
10µF
1µF
0.1µF
GND
C89
C90
10µF
1µF
GND
C91
0.1µF
GND
Figure 27. AMC7836EVM Schematic (2 of 2)
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6.2
AMC7836EVM PCB Components Layout
Figure 28 shows the layout of the components for the AMC7836EVM board.
Figure 28. AMC7836EVM PCB Components Layout
SLAU609A – November 2014 – Revised September 2016
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AMC7836EVM Documentation
6.3
www.ti.com
AMC7836 Test Board Bill of Materials
Table 12 lists the BOM for this EVM.
Table 12. AMC7836EVM Bill of Materials
Item
Quantity
1
1
2
14
3
Description
Manufacturer
Part Number
Printed Circuit Board
Any
6579845
C1, C2, C11, C12, C13, C47, C50,
C67, C69, C81, C82, C86, C88,
C91
CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603
MuRata
GCM188R71H104KA57D
0
C3, C4, C5, C6, C7, C8, C9, C10,
C22, C23, C24, C25, C26, C27,
C28, C29, C38, C60, C80, C83
NI
4
21
C14 - C21, C30 - C37, C40 - C44
CAP, CERM, 470pF, 50V, +/-10%, X7R, 0603
Kemet
C0603C471K5RACTU
5
1
C39
CAP, CERM, 4.7uF, 10V, +/-10%, X5R, 0603
Kemet
C0603C475K8PACTU
6
10
C45, C48, C56, C59, C62, C65,
C75, C78, C84, C89
CAP, CERM, 10uF, 25V, +/-10%, X7R, 1206
MuRata
GRM31CR71E106KA12L
7
5
C46, C49, C85, C87, C90
CAP, CERM, 1uF, 25V, +/-10%, X5R, 0603
MuRata
GRM188R61E105KA12D
8
4
C51, C52, C70, C71
CAP, CERM, 4.7uF, 50V, +/-10%, X7R, 1210
MuRata
GRM32ER71H475KA88L
9
1
C53
CAP, AL, 22uF, 35V, +/-20%, 1 ohm, SMD
Panasonic
EEE-FC1V220P
10
7
C54, C55, C58, C64, C73, C74,
C77
CAP, CERM, 47uF, 25V, +/-20%, X5R, 1206
TDK
C3216X5R1E476M160AC
11
7
C57, C61, C63, C66, C72, C76,
C79
CAP, CERM, 1uF, 25V, +/-10%, X5R, 0805
TDK
C2012X5R1E105K
12
1
C68
CAP, CERM, 2.2uF, 25V, +/-10%, X5R, 1206
AVX
12063D225KAT2A
13
1
D1
Diode, Zener, 5.1V, 500mW, SOD-123
Fairchild
MMSZ4689
14
3
D2, D3, D4
LED, Green, SMD
Lumex
SML-LX0603GW-TR
15
4
J1, J2, J3, J4
Header, TH, 100mil, 8x2, Gold plated, 230 mil above insulator
Samtec
TSW-108-07-G-D
16
1
J5
Header, TH, 100mil, 5x2, Gold plated, 230 mil above insulator
Samtec
TSW-105-07-G-D
17
1
J6
Terminal Block, 6A, 3.5mm Pitch, 3-Pos, TH
On-Shore Technology
ED555/3DS
18
1
J7
Receptacle, 50mil 10x2, R/A, TH
Mill-Max
853-43-020-20-001000
19
1
J8
Connector, DC Jack 2.1X5.5 mm, TH
CUI Inc.
PJ-102A
20
2
J9, J10
Terminal Block, 6A, 3.5mm Pitch, 2-Pos, TH
On-Shore Technology
ED555/2DS
21
1
J11
Header, TH, 100mil, 10x2, Gold plated, 230 mil above insulator
Samtec
TSW-110-07-G-D
22
7
JP1, JP2, JP3, JP4, JP5, JP6, JP7
Header, TH, 100mil, 3x1, Gold plated, 230 mil above insulator
Samtec
TSW-103-07-G-S
23
1
L1
0.2A Ferrite Bead, 600 ohm @ 100MHz, SMD
MuRata
BLM18HG601SN1D
24
60
R1 - R50, R73, R74, R77, R79,
R81, R85, R88, R91, R99, R104
RES, 0 ohm, 5%, 0.1W, 0603
Yageo America
RC0603JR-070RL
25
12
R51, R52, R53, R54, R55, R56,
R57, R58, R59, R60, R61, R62
RES, 10.0k ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060310K0FKEA
26
1
R65
RES, 49.9k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-0749K9L
27
0
R63, R64, R68, R75, R76, R78,
R80, R82, R84, R86, R87, R89,
R90, R92, R93, R97, R100
NI
28
2
R66, R94
RES, 174k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07174KL
29
2
R67, R96
RES, 750 ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07750RL
30
2
R69, R103
RES, 165k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07165KL
31
1
R70
RES, 24.9k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-0724K9L
32
2
R71, R101
RES, 13.7k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-0713K7L
33
1
R72
RES, 178k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07178KL
34
1
R83
RES, 300 ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07300RL
35
1
R95
RES, 1.50Meg ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-071M5L
36
1
R98
RES, 4.99k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-074K99L
37
1
R102
RES, 162k ohm, 1%, 0.1W, 0603
Yageo America
RC0603FR-07162KL
38
16
TP1, TP2, TP3, TP4, TP5, TP6,
TP12, TP13, TP14, TP15, TP16,
TP17, TP18, TP19, TP20, TP21
Test Point, Miniature, RedTH
Keystone
5000
39
5
TP7, TP8, TP9, TP10, TP11
Test Point, TH, Miniature, Black
Keystone
5001
40
0
U1
12-Bit ANALOG MONITOR AND CONTROL (AMC) SOLUTION with
Multichannel ADC, Bipolar DACs and Temperature Sensors,
PAP0064G
Texas Instruments
AMC7836PAP
41
1
U2
7-V to 50-V Input, 2.5-A Step-Down, Integrated Power Solution,
RKG0041A
Texas Instruments
LMZ35003RKG
24
Designator
AMC7836 Evaluation Module
SLAU609A – November 2014 – Revised September 2016
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
Revision History
www.ti.com
Item
Quantity
Designator
Description
Manufacturer
Part Number
42
2
U3, U4
36-V, 1-A, 4.17-µVRMS, RF LDO Voltage Regulator, RGW0020A
Texas Instruments
TPS7A4700RGW
43
1
U5
4.5-V to 40-V Input, 15-W, Negative Output, Integrated Power
Solution, RKG0041A
Texas Instruments
LMZ34002RKG
44
1
U6
–36-V, –1-A, Ultralow-Noise Negative Voltage Regulator,
Adjustable, RGW0020A
Texas Instruments
TPS7A3301RGW
45
0
U7
NI
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (November, 2014) to A Revision ............................................................................................... Page
•
•
•
•
Added note and removed last row in the Contents of AMC7836EVM Kit table. .................................................. 3
Modified the AMC7836EVM Hardware Setup image. ................................................................................ 4
Changed "Default" and "Optional" blocks in AMC7836 Test Board Block Diagram image. ..................................... 4
Changed the text in the AMC7836EVM Power Configurations section. .......................................................... 10
SLAU609A – November 2014 – Revised September 2016
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
Revision History
25
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
spacer
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
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