bq20z60-R1
SLUS991A – DECEMBER 2009 – REVISED MARCH 2011
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SBS 1.1-COMPLIANT GAS GAUGE ENABLED WITH IMPEDANCE TRACK™
TECHNOLOGY FOR USE WITH THE bq29330
Check for Samples: bq20z60-R1
FEATURES
APPLICATIONS
•
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1
2
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Next Generation Patented Impedance Track™
Technology Accurately Measures Available
Charge in Li-Ion and Li-Polymer Batteries
– Better Than 1% Error Over the Lifetime of
the Battery
Supports the Smart Battery Specification
SBS V1.1
Flexible Configuration for 2-, 3-, and 4-Series
Li-Ion and Li-Polymer Cells
Powerful 8-Bit RISC CPU With Ultralow Power
Modes
Full Array of Programmable Protection
Features
– Voltage, Current, and Temperature
Satisfies JEITA Guidelines
Added Flexibility to Handle More Complex
Charging Profiles
Lifetime Data Logging
Drives 3-, 4-, or 5-Segment LED Display for
Battery-Pack Conditions
Supports SHA-1 Authentication
Available in 30-Pin TSSOP (DBT) and 32-Pin
QFN (RSM) Packages
Notebook PCs
Medical and Test Equipment
Portable Instrumentation
DESCRIPTION
The bq20z60-R1 SBS-compliant gas gauge and
protection IC, incorporating patented Impedance
Track™ technology, is designed for battery-pack or
in-system installation. The bq20z60-R1 measures
and maintains an accurate record of available charge
in Li-Ion or Li-Polymer batteries, using its integrated
high-performance
analog
peripherals.
The
bq20z60-R1 monitors capacity change, battery
impedance, open-circuit voltage, and other critical
parameters of the battery pack, which reports the
information to the system host controller over a
serial-communication bus. It is designed to work with
the bq29330 analog front-end (AFE) protection IC to
maximize functionality and safety, while minimizing
external component count and cost in smart battery
circuits.
The Impedance Track™ technology continuously
analyzes the battery impedance, resulting in superior
gas-gauging accuracy. This enables the remaining
capacity to be calculated with discharge rate,
temperature, and cell aging, which are all accounted
for during each stage of every cycle with high
accuracy.
Table 1. AVAILABLE OPTIONS
PACKAGE
(1)
(2)
TA
30-PIN TSSOP (DBT)
Tube
30-PIN TSSOP (DBT)
Tape & Reel
32-PIN QFN (RSM)
Tube
32-PIN QFN (RSM)
Tape & Reel
–40°C to
85°C
bq20z60-R1DBT (1)
bq20z60-R1DBTR (2)
bq20z60-R1RSM (1)
bq20z60-R1RSMR (2)
A single tube quantity is 60 units.
A single reel quantity is 2000 units.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Impedance Track is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2011, Texas Instruments Incorporated
bq20z60-R1
SLUS991A – DECEMBER 2009 – REVISED MARCH 2011
www.ti.com
THERMAL INFORMATION
bq20z60-R1
THERMAL METRIC (1)
TSSOP (DBT)
QFN (RSM)
30 PINS
32 PINS
θJA, High K
Junction-to-ambient thermal
resistance (2)
81.4
37.4
θJC(top)
Junction-to-case(top) thermal
resistance (3)
16.2
30.6
θJB
Junction-to-board thermal
resistance (4)
34.1
7.7
ψJT
Junction-to-top characterization
parameter (5)
0.4
0.4
ψJB
Junction-to-board characterization
parameter (6)
33.6
7.5
θJC(bottom)
Junction-to-case(bottom) thermal
resistance (7)
N/A
2.6
(1)
(2)
(3)
(4)
(5)
(6)
(7)
2
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
SYSTEM PARTITIONING DIAGRAM
Pack +
Discharge/Charge/
Pre-Charge FETs
Fuse
Temperature
Measurement
& Protection
32kHz Clock
Generator
Charging
Algorithm
SMBus
SBS v1.1
Data
SHA-1
Authentication
Cell Balancing
Algorith &
Control
Therm
Supply Voltage
LDO/Therm
Drive
N-Ch FET Drive
& Charge Pumps
Watchdog, Reset, &
Protection Timing
Reset
32 KHz
bq29330
Validation &
Control
Alert
System
Interface
I2C
Registers
System
Interface
Overvoltage &
Undervoltage
Protection
Cell & Pack
Voltage
Measurement
Voltage Level
Translator
Overcurrent
Protection
Impedance
Track™ Gas
Gauging
Overcurrent &
Short Circuit
Protection
bq20z60-R1
bq29330
VCELL4
VCELL3
VCELL2
VCELL1
2nd Level Voltage Protection
Fail Safe
Protection
Cell Selection Multiplexer
LED Display
Cell Balancing Drive
DISP
bq294xy
Pack –
RSNS
5 mΩ – 20 mΩ typ
TSSOP (DBT) PIN FUNCTIONS
TSSOP (DBT)
(TOP VIEW)
NC
1
30
VCELL–
XALERT
2
29
VCELL+
SDATA
3
28
NC
SCLK
4
27
RBI
CLKOUT
5
26
VCC
TS1
6
25
VSS
TS2
7
24
MRST
PRES
8
23
SRN
PFIN
9
22
SRP
SAFE
10
21
VSS
SMBD
11
20
LED5
NC
12
19
LED4
SMBC
13
18
LED3
DISP
14
17
LED2
NC
15
16
LED1
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Table 2. TSSOP (DBT) PIN CONFIGURATIONS
PIN
NO.
(1)
4
NAME
I/O (1)
DESCRIPTION
1
NC
—
2
XALERT
I
Input from bq29330 XALERT output
3
SDATA
I/O
Data transfer to and from bq29330
4
SCLK
I/O
Communication clock to the bq29330
5
CLKOUT
O
32.768-kHz output for the bq29330. This pin should be directly connected to the AFE.
6
TS1
I
1st Thermistor voltage input connection to monitor temperature
7
TS2
I
2nd Thermistor voltage input connection to monitor temperature
8
PRES
I
Active low input to sense system insertion. This typically requires additional ESD protection.
9
PFIN
I
Active low input to detect secondary protector output status, and to allow the bq20z60-R1 to report
the status of the 2nd level protection output
10
SAFE
OD
Active high output to enforce additional level of safety protection; for example, fuse blow
11
SMBD
I/OD
SMBus data open-drain bidirectional pin used to transfer address and data to and from the
bq20z60-R1
12
NC
—
13
SMBC
I/OD
14
DISP
I
15
NC
—
Not used—leave floating
16
LED1
O
LED1 display segment that drives an external LED depending on the firmware configuration
17
LED2
O
LED2 display segment that drives an external LED depending on the firmware configuration
18
LED3
O
LED3 display segment that drives an external LED depending on the firmware configuration
19
LED4
O
LED4 display segment that drives an external LED depending on the firmware configuration
20
LED5
O
LED5 display segment that drives an external LED depending on the firmware configuration
21
VSS
—
Negative supply voltage
22
SRP
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
23
SRN
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
24
MRST
I
Master reset input that forces the device into reset when held low. This pin must be held high for
normal operation.
25
VSS
P
Negative supply voltage
26
VCC
P
Positive supply voltage
27
RBI
P
RAM backup input. Connect a capacitor to this pin and VSS to protect loss of RAM data in case of
short circuit condition.
28
NC
—
Not used—leave floating
29
VCELL+
I
Input from bq29330 used to read a scaled value of individual cell voltages
30
VCELL–
I
Input from bq29330 used to read a scaled value of individual cell voltages
Not used—leave floating
Not used—leave floating
SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq20z60-R1
Display control for the LEDs. This pin is typically connected to bq29330 REG via a 100-KΩ resistor
and a push-button switch connect to VSS.
I = Input, IA = Analog input, I/O = Input/output, I/OD = Input/Open-drain output, O = Output, OA = Analog output, P = Power
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QFN (RSM) PIN FUNCTIONS
S MB D
SA FE
PF IN
NC
PRES
TS2
TS1
CLKOUT
QFN (RSM)
(TOP VIEW)
32
31
30
29
28
27
26
25
DISP
3
22
XALERT
NC
4
21
NC
LED1
5
20
VCELL–
LED2
6
19
VCELL +
LED3
7
18
NC
LED4
8
17
RBI
9
10
11
12
13
14
15
16
V CC
SDATA
VSS
23
MRST
2
S RN
SMBC
NC
SCLK
SRP
24
VSS
1
LED5
NC
QFN (RSM) PIN CONFIGURATIONS
PIN
NO.
(1)
NAME
I/O (1)
DESCRIPTION
1
NC
—
2
SMBC
I/OD
3
DISP
—
4
NC
—
Not used—leave floating
5
LED1
O
LED1 display segment that drives an external LED depending on the firmware configuration
6
LED2
O
LED2 display segment that drives an external LED depending on the firmware configuration
7
LED3
O
LED3 display segment that drives an external LED depending on the firmware configuration
8
LED4
O
LED4 display segment that drives an external LED depending on the firmware configuration
9
LED5
O
LED5 display segment that drives an external LED depending on the firmware configuration
10
VSS
P
Negative Supply Voltage
11
SRP
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
12
NC
—
Not used—leave floating
13
SRN
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
14
MRST
I
Master reset input that forces the device into reset when held low. This pin must be held high for
normal operation.
Not used—leave floating
SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq20z60-R1
Not used—leave floating
15
VSS
P
Negative Supply Voltage
16
VCC
P
Positive Supply Voltage
17
RBI
P
RAM backup input. Connect a capacitor to this pin and VSS to protect loss of RAM data in case of
short circuit condition.
18
NC
—
19
VCELL+
I
Input from bq29330 used to read a scaled value of individual cell voltages
20
VCELL–
I
Input from bq29330 used to read a scaled value of individual cell voltages
Not used—leave floating
I = Input, IA = Analog input, I/O = Input/output, I/OD = Input/Open-drain output, O = Output, OA = Analog output, P = Power
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QFN (RSM) PIN CONFIGURATIONS (continued)
PIN
NO.
NAME
I/O (1)
DESCRIPTION
21
NC
—
22
XALERT
I
Input from bq29330 XALERT output
23
SDATA
I/O
Data transfer to and from bq29330
24
SCLK
I/O
Communication clock to the bq29330
25
CLKOUT
O
32.768-kHz output to the bq29330. This pin should be directly connected to the bq29330 AFE.
26
TS1
I
Thermistor 1 input
Not used—leave floating
27
TS2
I
Thermistor 2 input
28
PRES
I
Active low input to sense system insertion. This typically requires additional ESD protection.
29
NC
—
30
PFIN
I
Active low input to detect secondary protector output status, and to allow the bq20z60-R1 to report
the status of the 2nd level protection output
31
SAFE
O
Active high output to enforce additional level of safety protection; for example, fuse blow
32
SMBD
I/OD
Not used—leave floating
SMBus data open-drain bidirectional pin used to transfer address and data to and from the
bq20z60-R1
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range (unless otherwise noted) (1)
RANGE
–0.3 V to 2.75 V
VCC relative to VSS
Supply voltage range
V(IOD) relative to VSS
Open-drain I/O pins
VI relative to VSS
Input voltage range to all other pins
TA
Operating free-air temperature range
–40°C to 85°C
Tstg
Storage temperature range
–65°C to 150°C
(1)
–0.3 V to 6 V
–0.3 V to VCC + 0.3 V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
VCC
TEST CONDITIONS
Supply voltage
MIN
TYP
MAX
UNIT
2.4
2.5
2.6
V
No flash programming
ICC
Operating mode current
I(SLEEP)
Low-power storage mode current
I(SHUTDOWN)
Low-power shutdown mode current
400
(1)
bq20z60-R1 + bq29330
475
Sleep mode
8 (1)
bq20z60-R1 + bq29330
51
Shutdown mode
0.1
bq20z60-R1 + bq29330
0.2
μA
μA
1
Output voltage low SMBC, SMBD, SDATA,
SCLK, SAFE
IOL = 0.5 mA
0.4
Output voltage low LED1, LED2, LED3,
LED4, LED5
IOL = 10 mA
0.4
VOH
Output voltage high SMBC, SMBD, SDATA,
SCLK, SAFE
IOH = –1 mA
VIL
Input voltage low SMBC, SMBD, SDATA,
SCLK, XALERT, PRES, PFIN, DISP
VOL
(1)
6
VCC – 0.5
–0.3
μA
V
V
V
0.8
V
This value does not include the bq29330
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ELECTRICAL CHARACTERISTICS (continued)
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
VIH
TEST CONDITIONS
MIN
Input voltage high SMBC, SMBD, SDATA,
SCLK, XALERT, PRES, PFIN
2
Input voltage high DISP
2
TYP
MAX
UNIT
6
V
VCC + 0.3
5
V
CIN
Input capacitance
pF
V(AI1)
Input voltage range VCELL+, VCELL–,TS1,
TS2
–0.2
0.8 x VCC
V(AI2)
Input voltage range SRN, SRP
–0.20
0.20
Z(AI2)
Input impedance VCELL+, VCELL–, TS1,
TS2
0 V–1 V
8
MΩ
Z(AI1)
Input impedance SRN, SRP
0 V–1 V
2.5
MΩ
V
POWER-ON RESET
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
MIN
TYP
MAX
VIT–
Negative-going voltage input
PARAMETER
TEST CONDITIONS
1.7
1.8
1.9
UNIT
V
VHYS
Power-on reset hysteresis
50
125
200
mV
POWER ON RESET BEHAVIOR
VS
FREE-AIR TEMPERATURE
Power-On Reset Negative-Going Voltage - V
1.81
1.8
1.79
1.78
1.77
1.76
-40
-20
0
20
40
60
80
TA - Free-Air Temperature - °C
INTEGRATING ADC (Coulomb Counter) CHARACTERISTICS
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
V(SR)
Input voltage range, V(SRN) and V(SRP)
V(SROS)
Input offset
INL
Integral nonlinearity error
TEST CONDITIONS
V(SR) = V(SRN) – V(SRP)
MIN
TYP
–0.2
MAX
UNIT
0.2
V
μV
10
0.007
0.034
%
TYP
MAX
UNIT
OSCILLATOR
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
HIGH FREQUENCY OSCILLATOR
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OSCILLATOR (continued)
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
f(OSC)
TEST CONDITIONS
MIN
TYP
–3
0.25
3
–2
0.25
2
2.5
5
–2.5
0.25
2.5
–1.5
0.25
1.5
Operating frequency
f(EIO)
Frequency error (1)
t(SXO)
Start-up time (3)
(2)
TA = 20°C to 70°C
MAX
UNIT
4.194
MHz
%
ms
LOW FREQUENCY OSCILLATOR
f(LOSC)
Operating frequency
f(LEIO)
Frequency error (2)
t(LSXO)
Start-up time
(1)
(2)
(3)
(4)
(5)
32.768
(4)
TA = 20°C to 70°C
kHz
(5)
500
%
μs
The frequency error is measured from 4.194 MHz.
The frequency drift is included and measured from the trimmed frequency at VCC = 2.5 V, TA = 25°C.
The start-up time is defined as the time it takes for the oscillator output frequency to be within 1 % of the specified frequency.
The frequency error is measured from 32.768 kHz.
The start-up time is defined as the time it takes for the oscillator output frequency to be ± 3%.
DATA FLASH MEMORY CHARACTERISTICS
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
tDR
TEST CONDITIONS
TYP
MAX
UNIT
10
Years
See
(1)
20,000
Cycles
See
Flash programming write-cycles
t(WORDPROG)
Word programming time
See
(1)
I(DDdPROG)
Flash-write supply current
See
(1)
(1)
MIN
(1)
Data retention
5
2
ms
10
mA
MAX
UNIT
Specified by design. Not production tested.
REGISTER BACKUP
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
I(RB)
TEST CONDITIONS
MIN
1500
V(RB) > V(RBMIN), VCC < VIT–,
TA = 0°C to 50°C
RB data-retention voltage (1)
V(RB)
(1)
TYP
V(RB) > V(RBMIN), VCC < VIT–
RB data-retention input current
40
160
1.7
nA
V
Specified by design. Not production tested.
SMBus TIMING SPECIFICATIONS
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fSMB
SMBus operating frequency
Slave mode, SMBC 50% duty cycle
fMAS
SMBus master clock frequency
Master mode, no clock low slave
extend
tBUF
Bus free time between start and stop
tHD:STA
Hold time after (repeated) start
tSU:STA
Repeated start setup time
tSU:STO
Stop setup time
tHD:DAT
Data hold time
tSU:DAT
Data setup time
tTIMEOUT
Error signal/detect
(1)
8
MIN
TYP
10
MAX
UNIT
100
kHz
51.2
4.7
4
μs
4.7
4
Receive mode
0
Transmit mode
300
ns
250
See
(1)
25
35
ms
The bq20z60-R1 times out when any clock low exceeds tTIMEOUT.
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SMBus TIMING SPECIFICATIONS (continued)
VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
tLOW
Clock low period
tHIGH
Clock high period
See
(2)
tLOW:SEXT
Cumulative clock low slave extend
time
See
(3)
25
tLOW:MEXT
Cumulative clock low master extend
time
See
(4)
10
tF
Clock/data fall time
(VILMAX – 0.15 V) to (VIHMIN + 0.15 V)
300
tR
Clock/data rise time
0.9 VCC to (VILMAX – 0.15 V)
1000
(2)
(3)
(4)
UNIT
4.7
4
μs
50
ms
ns
tHIGH:MAX is minimum bus idle time. SMBC = 1 for t > 50 μs causes reset of any transaction involving the bq20z60-R1 that is in progress.
tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
SMBus TIMING DIAGRAM
tR
tSU(STO)
tF
tF
tHD(STA)
tBUF
tHIGH
SMBC
SMBC
SMBD
SMBD
P
tR
S
tLOW
tHD(DAT)
Start and Stop condition
tSU(DAT)
Wait and Hold condition
tSU(STA)
tTIMEOUT
SMBC
SMBC
SMBD
SMBD
S
Timeout condition
A.
Repeated Start condition
SCLKACK is the acknowledge related clock pulse generated by the master.
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FEATURE SET
Primary (1st Level) Safety Features
The bq20z60-R1 supports a wide range of battery and system protection features that can easily be configured.
The primary safety features include:
•
•
•
•
•
Cell over/undervoltage protection
Charge and discharge overcurrent
Short circuit protection
Charge and discharge overtemperature with independent alarms and thresholds for each thermistor
AFE Watchdog
Secondary (2nd Level) Safety Features
The secondary safety features of the bq20z60-R1 can be used to indicate more serious faults via the SAFE pin.
This pin can be used to blow an in-line fuse to permanently disable the battery pack from charging or
discharging. The secondary safety protection features include:
•
•
•
•
•
•
•
•
•
•
Safety overvoltage
Safety undervoltage
2nd level protection IC input
Safety over current in charge and discharge
Safety overtemperature in charge and discharge with independent alarms and thresholds for each thermistor
Charge FET and zero-volt Charge FET fault
Discharge FET fault
Cell imbalance detection (active and at rest)
Open thermistor detection
AFE communication fault
Charge Control Features
The bq20z60-R1 charge control features include:
• Supports JEITA temperature ranges. Reports charging voltage and charging current according to the
active temperature range
• Handles more complex charging profiles. Allows for splitting the standard temperature range into two
sub-ranges and allows for varying the charging current according to the cell voltage.
• Reports the appropriate charging current needed for constant current charging and the appropriate
charging voltage needed for constant voltage charging to a smart charger using SMBus broadcasts
• Determines the chemical state of charge of each battery cell using Impedance Track, and reduces the
charge difference of the battery cells in fully charged state of the battery pack, gradually using the cell
balancing algorithm during charging. This prevents fully charged cells from overcharging and causing
excessive degradation, and also increases the usable pack energy by preventing premature charge
termination.
• Supports pre-charging/zero-volt charging
• Supports charge inhibit and charge suspend if battery pack temperature is out of temperature range
• Reports charging fault and also indicate charge status via charge and discharge alarms
Gas Gauging
The bq20z60-R1 uses the Impedance Track technology to measure and calculate the available charge in battery
cells. The achievable accuracy is better than 1% error over the lifetime of the battery and there is no full charge
discharge learning cycle required.
See Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm application note (SLUA364)
for further details.
10
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Lifetime Data Logging Features
The bq20z60-R1 offers lifetime data logging, where important measurements are stored for warranty and
analysis purposes. The data monitored includes:
• Lifetime maximum temperature
• Lifetime maximum temperature count
• Lifetime maximum temperature duration
• Lifetime minimum temperature
• Lifetime maximum battery cell voltage
• Lifetime maximum battery cell voltage count
• Lifetime maximum battery cell voltage duration
• Lifetime minimum battery cell voltage
• Lifetime maximum battery pack voltage
• Lifetime minimum battery pack voltage
• Lifetime maximum charge current
• Lifetime maximum discharge current
• Lifetime maximum charge power
• Lifetime maximum discharge power
• Lifetime maximum average discharge current
• Lifetime maximum average discharge power
• Lifetime average temperature
Authentication
The bq20z60-R1 supports authentication by the host using SHA-1.
Power Modes
The bq20z60-R1 supports three separate power modes to reduce power consumption:
•
•
•
In Normal Mode, the bq20z60-R1 performs measurements, calculations, protection decisions, and data
updates in 1-s intervals. Between these intervals, the bq20z60-R1 is in a reduced power stage.
In Sleep Mode, the bq20z60-R1 performs measurements, calculations, protection decisions, and data
updates in adjustable time intervals. Between these intervals, the bq20z60-R1 is in a reduced power stage.
The bq20z60-R1 has a wake function that enables exit from Sleep mode when current flow or failure is
detected.
In Shutdown Mode, the bq20z60-R1 is completely disabled.
CONFIGURATION
Oscillator Function
The bq20z60-R1 fully integrates the system oscillators; therefore, no external components are required for this
feature.
System Present Operation
The bq20z60-R1 periodically verifies the PRES pin and detects that the battery is present in the system via a low
state on a PRES input. When this occurs, the bq20z60-R1 enters normal operating mode. When the pack is
removed from the system and the PRES input is high, the bq20z60-R1 enters the battery-removed state,
disabling the charge, discharge, and ZVCHG FETs. The PRES input is ignored and can be left floating when
non-removal mode is set in the data flash.
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BATTERY PARAMETER MEASUREMENTS
The bq20z60-R1 uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement, and
a second delta-sigma ADC for individual cell and battery voltage and temperature measurement.
Charge and Discharge Counting
The integrating delta-sigma ADC measures the charge/discharge flow of the battery by measuring the voltage
drop across a small-value sense resistor between the SRP and SRN pins. The integrating ADC measures bipolar
signals from –0.25 V to 0.25 V. The bq20z60-R1 detects charge activity when VSR = V(SRP) –V(SRN)is positive and
discharge activity when VSR = V(SRP) – V (SRN) is negative. The bq20z60-R1 continuously integrates the signal
over time, using an internal counter. The fundamental rate of the counter is 0.65 nVh.
Voltage
The bq20z60-R1 updates the individual series cell voltages through the bq29330 at 1-s intervals. The
bq20z60-R1 configures the bq29330 to connect the selected cell, cell offset, or bq29330 VREF to the CELL pin
of the bq29330, which is required to be connected to VIN of the bq20z60-R1. The internal ADC of the
bq20z60-R1 measures the voltage, scales it, and calibrates itself appropriately. This data is also used to
calculate the impedance of the cell for the Impedance Track gas-gauging.
Current
The bq20z60-R1 uses the SRP and SRN inputs to measure and calculate the battery charge and discharge
current using a 5-mΩ to 20-mΩ typ. sense resistor.
Wake Function
The bq20z60-R1 can exit sleep mode, if enabled, by the presence of a programmable level of current signal
across SRP and SRN.
Auto Calibration
The bq20z60-R1 provides an auto-calibration feature to cancel the voltage offset error across SRP and SRN for
maximum charge measurement accuracy. The bq20z60-R1 performs auto-calibration when the SMBus lines stay
low continuously for a minimum of a programmable amount of time.
Temperature
The bq20z60-R1 has an internal temperature sensor and inputs for two external temperature sensors, TS1 and
TS2, used in conjunction with two identical NTC thermistors (default are Semitec 103AT) to sense the battery
environmental temperature. The bq20z60-R1 can be configured to use the internal temperature sensor, or up to
two external temperature sensors.
COMMUNICATIONS
The bq20z60-R1 uses SMBus v1.1 with Master Mode and package error checking (PEC) options per the SBS
specification.
SMBus On and Off State
The bq20z60-R1 detects an SMBus off state when SMBC and SMBD are logic-low for ≥ 2 seconds. Clearing this
state requires either SMBC or SMBD to transition high. Within 1 ms, the communication bus is available.
12
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SBS Commands
Table 3. SBS COMMANDS
SBS
CMD
MODE NAME
FORMAT
SIZE IN MIN
BYTES VALUE
MAX
VALUE
DEFAULT
VALUE
UNIT
0x00
R/W
ManufacturerAccess
Hex
2
0x0000
0xffff
—
—
0x01
R/W
RemainingCapacityAlarm
Integer
2
0
700 or
1000
300 or 432
mAh or 10
mWh
0x02
R/W
RemainingTimeAlarm
Unsigned Integer
2
0
30
10
min
0x03
R/W
BatteryMode
Hex
2
0x0000
0xffff
—
—
0x04
R/W
AtRate
Integer
2
–32,768
32,767
0
mA or 10 mW
0x05
R
AtRateTimeToFull
Unsigned Integer
2
0
65,535
—
min
0x06
R
AtRateTimeToEmpty
Unsigned Integer
2
0
65,535
—
min
0x07
R
AtRateOK
Unsigned Integer
2
0
65,535
—
—
0x08
R
Temperature
Unsigned Integer
2
0
65,535
—
0.1°K
0x09
R
Voltage
Unsigned Integer
2
0
20,000
—
mV
0x0a
R
Current
Integer
2
–32,768
32,767
—
mA
0x0b
R
AverageCurrent
Integer
2
–32,768
32,767
—
mA
0x0c
R
MaxError
Unsigned Integer
1
0
100
—
%
0x0d
R
RelativeStateOfCharge
Unsigned Integer
1
0
100
—
%
0x0e
R
AbsoluteStateOfCharge
Unsigned Integer
1
0
100+
—
%
0x0f
R/W
RemainingCapacity
Unsigned Integer
2
0
65,535
—
mAh or 10
mWh
0x10
R
FullChargeCapacity
Unsigned Integer
2
0
65,535
—
mAh or 10
mWh
0x11
R
RunTimeToEmpty
Unsigned Integer
2
0
65,534
—
min
0x12
R
AverageTimeToEmpty
Unsigned Integer
2
0
65,534
—
min
0x13
R
AverageTimeToFull
Unsigned Integer
2
0
65,534
—
min
0x14
R
ChargingCurrent
Unsigned Integer
2
0
65,534
—
mA
0x15
R
ChargingVoltage
Unsigned Integer
2
0
65,534
—
mV
0x16
R
BatteryStatus
Hex
2
0x0000
0xdbff
—
—
0x17
R/W
CycleCount
Unsigned Integer
2
0
65,535
0
—
0x18
R/W
DesignCapacity
Integer
2
0
32,767
4400 or 6336
mAh or 10
mWh
0x19
R/W
DesignVoltage
Integer
2
7000
18,000
14,400
mV
0x1a
R/W
SpecificationInfo
Hex
2
0x0000
0xffff
0x0031
—
0x1b
R/W
ManufactureDate
Unsigned Integer
2
—
65,535
0
—
0x1c
R/W
SerialNumber
Hex
2
0x0000
0xffff
0
—
0x20
R/W
ManufacturerName
String
11+1
—
—
Texas
Instruments
—
0x21
R/W
DeviceName
String
7+1
—
—
bq20z60-R1
—
0x22
R/W
DeviceChemistry
String
4+1
—
—
LION
—
0x23
R/W
ManufacturerData
String
14+1
—
—
—
—
0x2f
R/W
Authenticate
String
20+1
—
—
—
—
0x3c
R
CellVoltage4
Unsigned Integer
2
0
65,535
—
mV
0x3d
R
CellVoltage3
Unsigned Integer
2
0
65,535
—
mV
0x3e
R
CellVoltage2
Unsigned Integer
2
0
65,535
—
mV
0x3f
R
CellVoltage1
Unsigned Integer
2
0
65,535
—
mV
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Table 4. EXTENDED SBS COMMANDS
SBS
CMD
MODE NAME
FORMAT
SIZE IN MIN
BYTES VALUE
MAX
VALUE
DEFAULT
VALUE
UNIT
0x45
R
AFEData
String
11+1
—
—
—
—
0x46
R/W
FETControl
Hex
2
0x4f
R
StateOfHealth
Hex
2
0x00
0xff
—
—
0x0000
0xffff
—
0x50
R
SafetyAlert
Hex
—
2
0x0000
0xffff
—
—
0x51
R
SafetyStatus
0x52
R
PFAlert
Hex
2
0x0000
0xffff
—
—
Hex
2
0x0000
0xffff
—
0x53
R
—
PFStatus
Hex
2
0x0000
0xffff
—
—
0x54
0x55
R
OperationStatus
Hex
2
0x0000
0xffff
—
—
R
ChargingStatus
Hex
2
0x0000
0xffff
—
—
0x57
R
ResetData
Hex
2
0x0000
0xffff
—
—
0x58
R
WDResetData
Unsigned Integer
2
0
65,535
—
—
0x5a
R
PackVoltage
Unsigned Integer
2
0
65,535
—
mV
0x5d
R
AverageVoltage
Unsigned Integer
2
0
65,535
—
mV
0x5e
R
TS1Temperature
Integer
2
–400
1200
—
0.1°C
0x5f
R
TS2Temperature
Integer
2
–400
1200
—
0.1°C
0x60
R/W
UnSealKey
Hex
4
0x00000000 0xffffffff
—
—
0x61
R/W
FullAccessKey
Hex
4
0x00000000 0xffffffff
—
—
0x62
R/W
PFKey
Hex
4
0x00000000 0xffffffff
—
—
0x63
R/W
AuthenKey3
Hex
4
0x00000000 0xffffffff
—
—
0x64
R/W
AuthenKey2
Hex
4
0x00000000 0xffffffff
—
—
0x65
R/W
AuthenKey1
Hex
4
0x00000000 0xffffffff
—
—
0x66
R/W
AuthenKey0
Hex
4
0x00000000 0xffffffff
—
—
0x68
R
SafetyAlert2
Hex
2
0x0000
0x000f
—
—
0x69
R
SafetyStatus2
Hex
2
0x0000
0x000f
—
—
0x6a
R
PFAlert2
Hex
2
0x0000
0x000f
—
—
0x6b
R
PFStatus2
Hex
2
0x0000
0x000f
—
—
0x6c
R/W
ManufBlock1
String
20
—
—
—
—
0x6d
R/W
ManufBlock2
String
20
—
—
—
—
0x6e
R/W
ManufBlock3
String
20
—
—
—
—
0x6f
R/W
ManufBlock4
String
20
—
—
—
—
0x70
R/W
ManufacturerInfo
String
31+1
—
—
—
—
0x71
R/W
SenseResistor
Unsigned Integer
2
0
65,535
—
μΩ
0x72
R
TempRange
Hex
2
0x0000
0xffff
—
—
0x73
R
LifetimeData1
String
32+1
—
—
—
—
0x74
R
LifetimeData2
String
8+1
—
—
—
—
0x77
R/W
DataFlashSubClassID
Hex
2
0x0000
0xffff
—
—
0x78
R/W
DataFlashSubClassPage1
Hex
32
—
—
—
—
0x79
R/W
DataFlashSubClassPage2
Hex
32
—
—
—
—
0x7a
R/W
DataFlashSubClassPage3
Hex
32
—
—
—
—
0x7b
R/W
DataFlashSubClassPage4
Hex
32
—
—
—
—
0x7c
R/W
DataFlashSubClassPage5
Hex
32
—
—
—
—
0x7d
R/W
DataFlashSubClassPage6
Hex
32
—
—
—
—
0x7e
R/W
DataFlashSubClassPage7
Hex
32
—
—
—
—
0x7f
R/W
DataFlashSubClassPage8
Hex
32
—
—
—
—
14
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bq20z60-R1DBT
APPLICATION SCHEMATIC
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SLUS991A – DECEMBER 2009 – REVISED MARCH 2011
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REVISION HISTORY
Changes from Original (December 2009) to Revision A
•
16
Page
Added the 32-pin QFN (RSM) package ................................................................................................................................ 1
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ20Z60DBT-R1
ACTIVE
TSSOP
DBT
30
60
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
20Z60
BQ20Z60DBTR-R1
ACTIVE
TSSOP
DBT
30
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
20Z60
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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