BQ24040DSQR

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 bq2404x 1A, Single-Input, Single Cell Li-Ion and Li-Pol Battery Charger With Auto Start 1 Features 3 Description • The bq2404x series of devices are highly integrated Li-Ion and Li-Pol linear chargers devices targeted at space-limited portable applications. The devices operate from either a USB port or AC adapter. The high input voltage range with input overvoltage protection supports low-cost unregulated adapters. 1 • • Charging – 1% Charge Voltage Accuracy – 10% Charge Current Accuracy – Pin Selectable USB 100mA and 500mA Maximum Input Current Limit – Programmable Termination and Precharge Threshold, bq24040 and bq24045 – High voltage (4.35V) Chemistry Support with bq24045 Protection – 30V Input Rating; with 6.6V or 7.1V Input Overvoltage Protection – Input Voltage Dynamic Power Management – 125°C Thermal Regulation; 150°C Thermal Shutdown Protection – OUT Short-Circuit Protection and ISET short detection – Operation over JEITA Range via Battery NTC – 1/2 Fast-Charge-Current at Cold, 4.06V at Hot, bq24040 and bq24045 – Fixed 10 Hour Safety Timer, bq24040 and bq24045 System – Automatic Termination and Timer Disable Mode (TTDM) for Absent Battery Pack With Thermistor, bq24040 and bq24045 – Status Indication – Charging/Done – Available in Small 2×2mm2 DFN-10 Package – Integrated Auto Start Function for Production Line Testing, bq24041 The bq2404x has a single power output that charges the battery. A system load can be placed in parallel with the battery as long as the average system load does not keep the battery from charging fully during the 10 hour safety timer. The battery is charged in three phases: conditioning, constant current and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is exceeded. The charger power stage and charge current sense functions are fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status display, and charge termination. The pre-charge current and termination current threshold are programmed via an external resistor on the bq24040 and bq24045. The fast charge current value is also programmable via an external resistor. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) bq24040 WSON (10) 2.00 mm x 2.00 mm bq24041 WSON (10) 2.00 mm x 2.00 mm bq24045 WSON (10) 2.00 mm x 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic 1.5kW 2 Applications bq24040 • • • • Smart Phones PDAs MP3 Players Low-Power Handheld Devices Adaptor 1 IN DC+ OUT 10 1.5kW GND 1mF 1kW 2 ISET TS 9 3 VSS CHG 8 System Load Battery Pack ++ 1mF 4 PRETERM ISET2 7 OR 5 PG NC 6 VDD 2kW TTDM/BAT_EN USB Port ISET/100/500mA VBUS GND GND D+ D+ D- Disconnect after Detection D- Host 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison ............................................... Pin Configuration and Functions ......................... Specifications......................................................... 7.1 7.2 7.3 7.4 7.5 7.6 7.7 8 1 1 1 2 4 4 5 Absolute Maximum Ratings ..................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions ...................... 5 Thermal Information .................................................. 6 Electrical Characteristics........................................... 6 Timing Requirements ................................................ 9 Typical Operational Characteristics (Protection Circuits Waveforms)................................................. 10 Detailed Description ............................................ 11 8.1 Overview ................................................................. 11 8.2 Functional Block Diagram ....................................... 12 8.3 Feature Description................................................. 13 8.4 Device Functional Modes........................................ 16 9 Application and Implementation ........................ 21 9.1 Application Information............................................ 21 9.2 Typical Applications ................................................ 21 10 Power Supply Recommendations ..................... 29 11 Layout................................................................... 29 11.1 Layout Guidelines ................................................. 29 11.2 Layout Example .................................................... 29 12 Device and Documentation Support ................. 30 12.1 12.2 12.3 12.4 12.5 Documentation Support ........................................ Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 30 30 30 30 30 13 Mechanical, Packaging, and Orderable Information ........................................................... 30 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (February 2014) to Revision F Page • Changed the Device Information table header information, and removed the package designation from the device number ................................................................................................................................................................................... 1 • Changed the Terminal Configuration and Functions To: Pin Configuration and Functions .................................................. 4 • The storage temperature range has been moved to the Absolute Maximum Ratings (1) ....................................................... 5 • Changed the Handling Ratings table To: ESD Ratings and updated the guidelines ............................................................. 5 • Added the package family to the column heading in the Thermal Information. ..................................................................... 6 • Added the NOTE to the Application and Implementation .................................................................................................... 21 Changes from Revision D (March 2013) to Revision E Page • Added Handling Ratings table , Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1 • Changed the Dissipation Rating table to the Thermal Information......................................................................................... 6 • Changed VO_HT(REG) in the Electrical Characteristics table to include new values bq24045 .................................................. 7 • Added the Timing Requirements table ................................................................................................................................... 9 • Deleted the last sentence in the first paragraph of the TS (bq24040/5) section ................................................................. 18 • Added the Application Performance Curves......................................................................................................................... 24 2 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Changes from Revision C (February 2013) to Revision D Page • Changed Feature From: Fixed 10 Hour Safety Timer To: Fixed 10 Hour Safety Timer, bq24040 and bq24045 .................. 1 • Changed the OUT terminal DESCRIPTION ........................................................................................................................... 4 • Changed RISET NOM value in the ROC table From: 49.9 kΩ To: 10.8 kΩ ............................................................................. 5 • Changed RISET_SHORT test conditions From: RISET : 600Ω → 250Ω To: RISET : 540Ω → 250Ω ............................................... 6 • Changed IOUT_CL test conditions From: RISET : 600Ω → 250Ω To: RISET : 540Ω → 250Ω ...................................................... 6 • Deleted: Internally Set: bq24041 from the TERMINATION section........................................................................................ 7 • Added bq24040 and bq24045 only to the BATTERY CHARGING TIMERS AND FAULT TIMERS section ......................... 9 • Changed text in the ISET section From: "maximum current between 1.1A and 1.35A" To: "maximum current between 1.05A and 1.4A" ..................................................................................................................................................... 17 • Changed the Timers section................................................................................................................................................. 19 • Deleted: IOUT_TERM = 54mA from the Typical Application Circuit: bq24041, with ASI and ASO conditions .......................... 27 Changes from Revision B (June 2012) to Revision C Page • Added device bq24045 ........................................................................................................................................................... 1 • Added additional KISET information to the Electrical Characteristics table.............................................................................. 7 • Added graph - Load Regulation............................................................................................................................................ 10 • Added graph - Line Regulation............................................................................................................................................. 10 Changes from Revision A (September 2009) to Revision B • Page Changed all occurrences of Li-Ion To: Li-Ion and Li-Pol ........................................................................................................ 1 Changes from Original (August 2009) to Revision A • Page Changed the status of the devices From: Product Preview To: Production Data .................................................................. 1 Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 3 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 5 www.ti.com Device Comparison PART # VO(REG) VOVP PreTerm ASI/ASO TS/BAT_EN PG PACKAGE bq24040 4.20 V 6.6 V Yes No TS (JEITA) Yes 10 terminal 2 × 2mm2 DFN bq24041 4.20 V 7.1 V No Yes BAT_EN Terminaton Disabled Yes 10 terminal 2 × 2mm2 DFN bq24045 4.35V 6.6V Yes No TS (JEITA) Yes 10 terminal 2 × 2mm2 DFN 6 Pin Configuration and Functions bq24040 and bq24045 DSQ (WSON) Top View 1 IN bq24041 DSQ (WSON) Top View OUT 10 2 ISET TS 9 3 VSS CHG 8 1 IN 4 PRETERM ISET2 7 5 PG NC 6 OUT 10 2 ISET BAT_EN 9 3 VSS CHG 8 4 ASI ISET2 7 5 PG ASO 6 Pin Functions bq24040 bq24045 bq24041 I/O IN 1 1 I Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass capacitors 1μF to 10μF, connect from IN to VSS. OUT 10 10 O Battery Connection. System Load may be connected. Expected range of bypass capacitors 1μF to 10μF. PRE-TERM 4 – I Programs the Current Termination Threshold (5 to 50% of Iout which is set by ISET) and Sets the PreCharge Current to twice the Termination Current Level. NAME DESCRIPTION Expected range of programming resistor is 1k to 10kΩ (2k: Ipgm/10 for term; Ipgm/5 for precharge) ISET 2 2 I Programs the Fast-charge current setting. External resistor from ISET to VSS defines fast charge current value. Range is 10.8k (50mA) to 540Ω (1000mA). ISET2 7 7 I Programming the Input/Output Current Limit for the USB or Adaptor source: bq24040/5 => High = 500mAmax, Low = ISET, FLOAT = 100mAmax. bq24041 => High = 410mAmax, Low = ISET, FLOAT = 100mAmax. I Temperature sense terminal connected to bq24040/5 -10k at 25°C NTC thermistor, in the battery pack. Floating T terminal or pulling High puts part in TTDM “Charger” Mode and disable TS monitoring, Timers and Termination. Pulling terminal Low disables the IC. If NTC sensing is not needed, connect this terminal to VSS through an external 10 kΩ resistor. A 250kΩ from TS to ground will prevent IC entering TTDM mode when battery with thermistor is removed. 9 (1) – BAT_EN – 9 I Charge Enable Input (active low) VSS 3 3 – Ground terminal CHG 8 8 O Low (FET on) indicates charging and Open Drain (FET off) indicates no Charging or Charge complete. PG 5 5 O Low (FET on) indicates the input voltage is above UVLO and the OUT (battery) voltage. ASI – 4 I Auto start External input. Internal 200kΩ pull-down. ASO – 6 O Auto Start Logic Output NC 6 – NA Do not make a connection to this terminal (for internal use) – Do not route through this terminal Pad 2x2mm2 Pad 2x2mm2 – TS Thermal PAD and Package (1) 4 There is an internal electrical connection between the exposed thermal pad and the VSS terminal of the device. The thermal pad must be connected to the same potential as the VSS terminal on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. VSS terminal must be connected to ground at all times Spins have different terminal definitions Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) Input Voltage MIN MAX UNIT IN (with respect to VSS) –0.3 30 V OUT (with respect to VSS) –0.3 7 V PRE-TERM, ISET, ISET2, TS, CHG, PG, ASI, ASO (with respect to VSS) –0.3 7 V Input Current IN 1.25 A Output Current (Continuous) OUT 1.25 A Output Sink Current CHG 15 mA TJ Junction temperature –40 150 °C TSTG Storage temperature –65 150 °C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. 7.2 ESD Ratings VALUE V(ESD) (1) (2) (3) Electrostatic discharge (1) Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (2) ±3000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (3) ±1500 UNIT V The test was performed on IC terminals that may potentially be exposed to the customer at the product level. The bq2404x IC requires a minimum of the listed capacitance, external to the IC, to pass the ESD test. The D+ D- lines require clamp diodes such as CM1213A02SR from CMD to protect the IC for this testing. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions (1) IN voltage range VIN IN operating voltage range, Restricted by VDPM and VOVP MIN NOM 3.5 28 UNIT V 4.45 6.45 V A IIN Input current, IN terminal 1 IOUT Current, OUT terminal 1 A TJ Junction temperature 125 °C RPRE-TERM Programs precharge and termination current thresholds RISET Fast-charge current programming resistor RTS 10k NTC thermistor range without entering BAT_EN or TTDM (1) 0 1 10 kΩ 0.540 10.8 kΩ 1.66 258 kΩ Operation with VIN less than 4.5V or in drop-out may result in reduced performance. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 5 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com 7.4 Thermal Information DSQ (WSON) THERMAL METRIC (1) θJA Junction-to-ambient thermal resistance 63.5 θJCtop Junction-to-case (top) thermal resistance 79.5 θJB Junction-to-board thermal resistance 33.9 ψJT Junction-to-top characterization parameter 7.8 ψJB Junction-to-board characterization parameter 34.3 θJCbot Junction-to-case (bottom) thermal resistance 7.5 (1) UNIT 10 PINS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT UVLO Undervoltage lock-out Exit VIN: 0V → 4V Update based on sim/char 3.15 3.3 3.45 V VHYS_UVLO Hysteresis on VUVLO_RISE falling VIN: 4V→0V, VUVLO_FALL = VUVLO_RISE –VHYS-UVLO 175 227 280 mV VIN-DT Input power good detection threshold is VOUT + VIN-DT (Input power good if VIN > VOUT + VIN-DT); VOUT = 3.6V, VIN: 3.5V → 4V 30 80 145 mV VHYS-INDT Hysteresis on VIN-DT falling VOUT = 3.6V, VIN: 4V → 3.5V VOVP Input over-voltage protection threshold VHYS-OVP Hysteresis on OVP IIN-USB-CL mV VIN: 5V → 12V (bq24040, bq24045) 6.5 6.65 6.8 VIN: 5V → 12V (bq24041) 6.9 7.1 7.3 V VIN: 11V → 5V USB/Adaptor low input voltage protection. Restricts lout at VIN-DPM VIN-DPM 31 95 mV Feature active in USB mode; Limit Input Source Current to 50mA; VOUT= 3.5V; RISET = 825Ω 4.34 4.4 4.46 Feature active in Adaptor mode; Limit Input Source Current to 50mA; VOUT = 3.5V; RISET = 825 4.24 4.3 4.46 V USB input I-Limit 100mA ISET2 = Float; RISET = 825Ω 85 92 100 USB input I-Limit 500mA, bq24040, bq24045 ISET2 = High; RISET = 825Ω 430 462 500 USB input I-Limit 380mA, bq24041 ISET2 = High; RISET = 825Ω 350 386 420 mA ISET SHORT CIRCUIT TEST RISET_SHORT Highest Resistor value considered a fault (short). Monitored for Iout>90mA RISET: 540Ω → 250Ω, Iout latches off. Cycle power to Reset. 280 500 Ω IOUT_CL Maximum OUT current limit Regulation (Clamp) VIN = 5V, VOUT = 3.6V, VISET2 = Low, RISET: 540Ω → 250Ω, IOUT latches off after tDGL-SHORT 1.05 1.4 A OUT terminal short-circuit detection threshold/ precharge threshold Vout:3V → 0.5V, no deglitch 0.75 0.85 V VOUT(SC-HYS) OUT terminal Short hysteresis Recovery ≥ VOUT(SC) + VOUT(SC-HYS); Rising, no Deglitch IOUT(SC) Source current to OUT terminal during shortcircuit detection BATTERY SHORT PROTECTION VOUT(SC) 0.8 77 10 15 mV 20 mA QUIESCENT CURRENT IOUT(PDWN) Battery current into OUT terminal VIN = 0V 1 IOUT(DONE) OUT terminal current, charging terminated VIN = 6V, VOUT > VOUT(REG) 6 IIN(STDBY) Standby current into IN terminal TS = LO, VIN ≤ 6V Active supply current, IN terminal TS = open, VIN = 6V, TTDM – no load on OUT terminal, VOUT > VOUT(REG), IC enabled ICC 6 Submit Documentation Feedback 0.8 μA 125 μA 1 mA Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Electrical Characteristics (continued) Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX VIN = 5.5V, IOUT = 25mA, (VTS-45°C≤ VTS ≤ VTS-0°C, bq24040) 4.16 4.2 4.23 VIN = 5.5V, IOUT = 25mA, (VTS-45°C≤ VTS ≤ VTS-0°C, bq24045) 4.30 4.35 4.40 VIN = 5.5V, IOUT = 25mA, (VTS-45°C≤ VTS ≤ VTS-0°C, bq24040) 4.02 4.06 4.1 VIN = 5.5V, IOUT = 25mA, (VTS-45°C≤ VTS ≤ VTS-0°C, bq24045) 4.16 4.2 4.23 UNIT BATTERY CHARGER FAST-CHARGE VOUT(REG) VO_HT(REG) Battery regulation voltage Battery hot regulation Voltage IOUT(RANGE) Programmed Output “fast charge” current range VOUT(REG) > VOUT > VLOWV; VIN = 5V, ISET2=Lo, RISET = 540 to 10.8kΩ VDO(IN-OUT) Drop-Out, VIN – VOUT Adjust VIN down until IOUT = 0.5A, VOUT = 4.15V, RISET = 540 , ISET2 = Lo (adaptor mode); TJ ≤ 100°C IOUT Output “fast charge” formula VOUT(REG) > VOUT > VLOWV; VIN = 5V, ISET2 = Lo KISET KISET Fast charge current factor Fast charge current factor (bq24045) V V 10 325 1000 mA 500 mV KISET/RISET A RISET = KISET /IOUT; 50 < IOUT < 1000 mA 510 540 570 RISET = KISET /IOUT; 25 < IOUT < 50 mA 480 527 600 RISET = KISET /IOUT; 10 < IOUT < 25 mA 350 520 680 RISET = KISET /IOUT; 50 < IOUT < 1000 mA 510 560 585 RISET = KISET /IOUT; 25 < IOUT < 50 mA 480 557 596 RISET = KISET /IOUT; 10 < IOUT < 25 mA 350 555 680 2.4 2.5 2.6 V 20 22 %IOUT-CC AΩ AΩ PRECHARGE – SET BY PRETERM terminal: bq24040 / bq24045; Internally Set: bq24041 VLOWV Pre-charge to fast-charge transition threshold IPRE-TERM See the Termination Section Pre-charge current, default setting VOUT < VLOWV; RISET = 1080Ω; bq24040: RPRE-TERM= High Z; bq24041: Internally Fixed Pre-charge current formula RPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%) %PRECHG KPRE-CHG % Pre-charge Factor 18 RPRE-TERM/KPRE-CHG% VOUT < VLOWV, VIN = 5V, RPRE-TERM = 2k to 10kΩ; RISET = 1080Ω , RPRE-TERM = KPRE-CHG × %IFAST-CHG, where %IFASTCHG is 20 to 100% 90 100 110 Ω/% VOUT < VLOWV, VIN = 5V, RPRE-TERM = 1k to 2kΩ; RISET = 1080Ω, RPRE-TERM = KPRE-CHG × %IFAST-CHG, where %IFASTCHG is 10% to 20% 84 100 117 Ω/% 9 10 11 %IOUT-CC TERMINATION – SET BY PRE-TERM terminal: bq24040 / bq24045 Termination Threshold Current, default setting VOUT > VRCH; RISET = 1k; bq24040 / bq24045: RPRE-TERM= High Z Termination Current Threshold Formula, bq24040 / bq24045 RPRE-TERM = KTERM (Ω/%) × %TERM (%) %TERM KTERM % Term Factor IPRE-TERM Current for programming the term. and prechg with resistor. ITerm-Start is the initial PRETERM curent. %TERM Termination current formula ITerm-Start Elevated PRE-TERM current for, tTerm-Start, during start of charge to prevent recharge of full battery, RPRE-TERM/ KTERM VOUT > VRCH, VIN = 5V, RPRE-TERM = 2k to 10kΩ ; RISET = 750Ω KTERM × %IFAST-CHG, where %IFAST-CHG is 10 to 50% 182 200 216 VOUT > VRCH, VIN = 5V, RPRE-TERM = 1k to 2kΩ ; RISET = 750Ω KTERM × %Iset, where %Iset is 5 to 10% 174 199 224 71 75 81 μA RPRE-TERM = 2k, VOUT = 4.15V Ω/% RTERM/ KTERM % 80 85 92 μA VIN = 5V, VTS = 0.5V, VOUT: 4.25V → VRCH VO(REG) –0.120 VO(REG)–0.095 VO(REG)–0.07 0 V VIN = 5V, VTS = 0.2V, VOUT: 4.15V → VRCH VO_HT(REG) –0.130 VO_HT(REG) –0.105 VO_HT(REG) –0.080 V VO(REG)0.450 VO(REG)-0.400 VO(REG)-350 RECHARGE OR REFRESH – bq24040 / bq24045 Recharge detection threshold – Normal Temp VRCH Recharge detection threshold – Hot Temp BATTERY DETECT ROUTINE – bq24040 / bq24045 (NOTE: In Hot mode VO(REG) becomes VO_HT(REG)) VREG-BD VOUT Reduced regulation during battery detect IBD-SINK Sink current during VREG-BD VBD-HI High battery detection threshold VIN = 5V, VTS = 0.5V, Battery Absent VO(REG) 0.150 VO(REG)-0.100 VO(REG)0.050 V VBD-LO Low battery detection threshold VIN = 5V, VTS = 0.5V, Battery Absent VREG-BD +0.50 VREG-BD +0.1 VREG-BD +0.15 V VIN = 5V, VTS = 0.5V, Battery Absent 7 Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 10 Submit Documentation Feedback V mA 7 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Electrical Characteristics (continued) Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BATTERY-PACK NTC MONITOR; TS Terminal: bq24040 / bq24045: 10k NTC INTC-10k NTC bias current VTS = 0.3V 48 50 52 μA INTC-DIS-10k 10k NTC bias current when Charging is disabled. VTS = 0V 27 30 34 μA INTC-FLDBK-10k INTC is reduced prior to entering TTDM to keep cold thermistor from entering TTDM VTS: Set to 1.525V 4 5 6.5 μA VTTDM(TS) Termination and timer disable mode Threshold – Enter VTS: 0.5V → 1.7V; Timer Held in Reset 1550 1600 1650 mV VHYS-TTDM(TS) Hysteresis exiting TTDM VTS: 1.7V → 0.5V; Timer Enabled VCLAMP(TS) TS maximum voltage clamp VTS = Open (Float) 1800 1950 VTS_I-FLDBK TS voltage where INTC is reduce to keep thermistor from entering TTDM INTC adjustment (90 to 10%; 45 to 6.6uS) takes place near this spec threshold. VTS: 1.425V → 1.525V CTS Optional Capacitance – ESD VTS-0°C Low temperature CHG Pending Low Temp Charging to Pending; VTS: 1V → 1.5V VHYS-0°C Hysteresis at 0°C Charge pending to low temp charging; VTS: 1.5V → 1V VTS-10°C Low temperature, half charge Normal charging to low temp charging; VTS: 0.5V → 1V VHYS-10°C Hysteresis at 10°C Low temp charging to normal CHG; VTS: 1V → 0.5V VTS-45°C High temperature at 4.1V Normal charging to high temp CHG; VTS: 0.5V → 0.2V VHYS-45°C Hysteresis at 45°C High temp charging to normal CHG; VTS: 0.2V → 0.5V VTS-60°C High temperature Disable High temp charge to pending; VTS: 0.2V → 0.1V VHYS-60°C Hysteresis at 60°C Charge pending to high temp CHG; VTS: 0.1V → 0.2V VTS-EN-10k Charge Enable Threshold, (10k NTC) VTS: 0V → 0.175V; VTS-DIS_HYS-10k HYS below VTS-EN-10k to Disable, (10k NTC) VTS: 0.125V → 0V; 100 mV 2000 1475 mV μF 0.22 1205 1230 1255 86 765 790 278 815 178 293 88 mV mV 186 11.5 80 mV mV 10.7 170 mV mV 35 263 mV mV mV 96 mV 12 mV THERMAL REGULATION TJ(REG) Temperature regulation limit 125 °C TJ(OFF) Thermal shutdown temperature 155 °C TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C BAT_EN , bq24041 I BAT_EN Current Sourced out of terminal VIL Logic LOW enables charger VIH Logic HIGH disables charger VCLAMP Floating Clamp Voltage V BAT_EN < 1.4 V 9 μA 0 0.4 V 1.1 6 V 1.8 V 0.4 V 9 μA 2.3 Floating BAT_EN terminal 1.4 5 1.6 LOGIC LIVELS ON ISET2 VIL Logic LOW input voltage Sink 8 μA VIH Logic HIGH input voltage Source 8 μA 1.4 IIL Sink current required for LO VISET2 = 0.4V 2 IIH Source current required for HI VISET2 = 1.4V VFLT ISET2 Float Voltage V 1.1 575 900 8 μA 1225 mV AUTO START, ASI AND ASO TERMINALS, bq24041 VASIL Has 200k Internal Pull-down 0.4 VASIH 1.3 VASOL Auto Start Output Sinks 1mA VASOH Auto Start Input Sources 1mA V V 0.4 VOUT - 0.4 V V LOGIC LEVELS ON CHG AND PG VOL Output LOW voltage ISINK = 5 mA ILEAK Leakage current into IC V 8 Submit Documentation Feedback CHG = 5V, VPG = 5V 0.4 V 1 µA Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 7.6 Timing Requirements MIN TYP MAX UNIT INPUT tDGL(PG_PWR) Deglitch time on exiting sleep. Time measured from VIN: 0V → 5V 1μs rise-time to PG = low, VOUT = 3.6V 45 μs tDGL(PG_NO- Deglitch time on VHYS-INDT power down. Same as entering sleep. Time measured from VIN: 5V → 3.2V 1μs fall-time to PG = OC, VOUT = 3.6V 29 ms PWR) tDGL(OVP-SET) Input over-voltage blanking time VIN: 5V → 12V 113 μs Deglitch time exiting OVP Time measured from VIN: 12V → 5V 1μs fall-time to PG = LO 30 μs Clear fault by disconnecting IN or cycling (high / low) TS/BAT_EN 1 ms tDGL(OVP-REC) ISET SHORT CIRCUIT TEST tDGL_SHORT Deglitch time transition from ISET short to IOUT disable PRECHARGE – SET BY PRETERM PIN: bq24040 / bq24045; Internally Set: bq24041 tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition 70 μs tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition 32 ms 29 ms 1.25 min TERMINATION – SET BY PRE-TERM PIN: bq24040 / bq24045 tDGL(TERM) Deglitch time, termination detected tTerm-Start Elevated termination threshold initially active for tTerm-Start RECHARGE OR REFRESH – bq24040 / bq24045 tDGL1(RCH) Deglitch time, recharge threshold detected VIN = 5V, VTS = 0.5V, VOUT: 4.25V → 3.5V in 1μs; tDGL(RCH) is time to ISET ramp 29 ms tDGL2(RCH) Deglitch time, recharge threshold detected in OUT-Detect Mode VIN = 5V, VTS = 0.5V, VOUT = 3.5V inserted; tDGL(RCH) is time to ISET ramp 3.6 ms 25 ms BATTERY DETECT ROUTINE – bq24040 / bq24045 (NOTE: In Hot mode VO(REG) becomes VO_HT(REG)) tDGL(HI/LOW REG) Regulation time at VREG or VREG-BD BATTERY CHARGING TIMERS AND FAULT TIMERS: bq24040 and bq24045 only tPRECHG Pre-charge safety timer value Restarts when entering Pre-charge; Always enabled when in pre-charge. 1700 1940 2250 s tMAXCH Charge safety timer value Clears fault or resets at UVLO, TS/BAT_EN disable, OUT Short, exiting LOWV and Refresh 34000 38800 45000 s BATTERY-PACK NTC MONITOR; TS Terminal: bq24040 / bq24045: 10k NTC tDGL(TTDM) Deglitch exit TTDM between states 57 8 μs Normal to Cold Operation; VTS: 0.6V → 1V 50 ms Cold to Normal Operation; VTS: 1V → 0.6V 12 ms Battery charging 30 ms Deglitch enter TTDM between states tDGL(TS_10C) Deglitch for TS thresholds: 10C. tDGL(TS) Deglitch for TS thresholds: 0/45/60C. ms Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 9 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com 7.7 Typical Operational Characteristics (Protection Circuits Waveforms) SETUP: bq24040 typical applications schematic; VIN = 5V, VBAT = 3.6V (unless otherwise indicated) 4.212 546 VO at 0°C Kiset VOUT - Output Voltage DC - V 542 Low to High Currents (may occur in recharge to fast charge transion) 540 Kiset - W ROUT = 100 Ω 4.21 544 538 High to Low Currents (may occur in Voltage Regulation - Taper Current) 536 534 532 4.208 4.206 VO at 25°C 4.204 VO at 85°C 4.202 4.2 4.198 530 4.196 4.5 528 .15 0 0.2 0.4 IO - Output Current - A 0.6 0.8 5 5.5 VI - Input Voltage DC - V 6 6.5 Figure 2. Line Regulation Figure 1. Kiset for Low and High Currents 4.2 4.352 VREG at 0°C 4.199 4.35 VREG - Voltage - V VOUT - Output Voltage - V Vreg at 25°C 4.198 Vreg at 85°C 4.197 4.196 4.195 Vreg at 0°C VREG at 25°C 4.348 VREG at 85°C 4.346 VREG at 125°C 4.344 4.194 4.342 4.193 4.34 4.192 0 0.2 0.4 0.6 IO - Output current - A 0.8 0 1 100 500 600 700 800 900 363.4 363.2 4.3445 IO at 25°C IO - Output Current - mA VREG at 0°C VOUT - Output Voltage - V 400 Figure 4. Load Regulation 4.3450 4.3440 4.3435 VREG at 25°C 4.3430 4.3425 363 362.8 IO at 85°C 362.6 362.4 362.2 IO at 0°C VREG at 25°C 4.3420 362 5 5.5 6 6.5 7 361.8 2.5 3 VIN - Input Voltage - V Figure 5. Line Regulation 10 300 ILOAD - Current - mA Figure 3. Load Regulation Over Temperature 4.3415 4.5 200 Submit Documentation Feedback 3.5 VO - Output Voltage - V 4 4.5 Figure 6. Current Regulation Over Temperature Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 8 Detailed Description 8.1 Overview The bq2404x is a highly integrate family of 2×2 single cell Li-Ion and Li-Pol chargers. The charger can be used to charge a battery, power a system or both. The charger has three phases of charging: Pre-charge to recover a fully discharged battery, fast-charge constant current to supply the buck charge safely and voltage regulation to safely reach full capacity. The charger is very flexible, allowing programming of the fast-charge current and Precharge/Termination Current (bq24040/5 only). This charger is designed to work with a USB connection or Adaptor (DC out). The charger also checks to see if a battery is present. The charger also comes with a full set of safety features: JEITA Temperature Standard (bq24040/5 only), OverVoltage Protection, DPM-IN, Safety Timers, and ISET short protection. All of these features and more are described in detail below. The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or Li-Pol battery pack. Upon application of a 5VDC power source the ISET and OUT short checks are performed to assure a proper charge cycle. If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning cycle begins. The amount of precharge current can be programmed using the PRE-TERM terminal which programs a percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system load is connected across the battery “stealing” the battery current. The precharge current can be set higher to account for the system loading while allowing the battery to be properly conditioned. The PRE-TERM terminal is a dual function terminal which sets the precharge current level and the termination threshold level. The termination "current threshold" is always half of the precharge programmed current level. Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge current is applied. The fast charge constant current is programmed using the ISET terminal. The constant current provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage. If the IC reaches 125°C the IC enters thermal requlation, slows the timer clock by half and reduce the charge current as needed to keep the temperature from rising any further. Figure 8 shows the charging profile with thermal regulation. Typically under normal operating conditions, the IC’s junction temperature is less than 125°C and thermal regulation is not entered. Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the regulation voltage until the current tapers to the termination threshold. The termination can be disabled if desired. The CHG terminal is low (LED on) during the first charge cycle only and turns off once the termination threshold is reached, regardless if termination, for charge current, is enabled or disabled. Further details are mentioned in the Operating Modes section. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 11 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com 8.2 Functional Block Diagram Internal Charge Current Sense w/ Multiple Outputs IN OUT 80 mV + _ OUT Input Power Detect IN OUT + _ + _ + - IN-DPMREF Charge Pump IOUT x 1.5 V 540 AW OUTREGREF TJ°C + _ FAST CHARGE 125°CREF PRE-CHARGE ISET IN + _ 1.5V Pre-CHG Reference + _ USB100/500REF USB Sense Resistor o TJ C + _ Term Reference + _ 75mA + 150oCREF Thermal Shutdown Charge Pump X2 Gain (1: 2) Term:Pre-CHGX2 PRE-TERM Increased from 75mA to 85mA for 1st minute of charge. IN + _ + bq24040 and bq24045 Only OUT VTERM_EN CHG OVPREF + _ + _ ON: OFF: ISET2 (LO = ISET, HI = USB500, 0.9V Float On During 1st Charge Only CHARGE CONTROL FLOAT = USB100) PG VCOLD-10 C o + _ o + _ VHOT-45 C HI = Half CHG (JEITA) HI = 4.06Vreg (JEITA) OUT VCOLD-FLT ASO + _ bq24041 Only ASI + _ VHOT-FLT LO = TTDM MODE HI = Suspend CHG 200kW TS/BAT_EN VTTDM TS - bq24040 and bq24045 BAT_EN - bq24041 VCE + _ + _ bq24041 This Comparator Only – No TS Features HI=CHIP DISABLE VDISABLE + _ Cold Temperature Sink Current VCLAMP = 1.4V = 45mA + _ 5 mA Disable Sink Current = 20mA + _ 45mA Bq24040 and bq24045 are as shown Bq24041 has no Current Sinks and only 5mA Current Source Figure 7. Functional Block Diagram 12 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Functional Block Diagram (continued) VO(REG) PreConditioning Phase Thermal Regulation Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE IO(OUT) FAST-CHARGE CURRENT PRE-CHARGE CURRENT AND TERMINATION THRESHOLD Battery Voltage, V(OUT) Battery Current, I(OUT) Charge Complete Status, Charger Off VO(LOWV) I(TERM) IO(PRECHG) T(THREG) 0A Temperature, Tj T(PRECHG) T(CHG) DONE Figure 8. Charging Profile With Thermal Regulation 8.3 Feature Description 8.3.1 Power-Down or Undervoltage Lockout (UVLO) The bq2404x family is in power down mode if the IN terminal voltage is less than UVLO. The part is considered “dead” and all the terminals are high impedance. Once the IN voltage rises above the UVLO threshold the IC will enter Sleep Mode or Active mode depending on the OUT terminal (battery) voltage. 8.3.2 Power-up The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the UVLO and sleep states where the IC declares power good, starts the qualification charge at 100mA, sets the input current limit threshold base on the ISET2 terminal, starts the safety timer and enables the CHG terminal. See Figure 9. 8.3.3 Sleep Mode If the IN terminal voltage is between than VOUT+VDT and UVLO, the charge current is disabled, the safety timer counting stops (not reset) and the PG and CHG terminals are high impedance. As the input voltage rises and the charger exits sleep mode, the PG terminal goes low, the safety timer continues to count, charge is enabled and the CHG terminal returns to its previous state. See Figure 10. 8.3.4 New Charge Cycle A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS terminal/BAT_EN), exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropterminalg below the VRCH threshold. The CHG terminal is active low only during the first charge cycle, therefore exiting TTDM or a dropterminalg below VRCH will not turn on the CHG terminal FET, if the CHG terminal is already high impedance. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 13 14 Submit Documentation Feedback Product Folder Links: bq24040 bq24041 bq24045 0V DISHYS EN 60°C 60°CHYS 45°C 45°CHYS 10°CHYS 10°C 0°CHYS 0°C LDOHYS LDO 1.8V VSS tDGL(TS) Disabled 4.06 V HOT Operation tDGL(TS) Normal Operation tDGL(TS) 4.06 V HOT Operation tDGL(TS) HOT Fault tDGL(TS) Cold Fault LDO Mode t < tDGL(IS) Normal Operation Cold Operation tDGL(TS_IOC) Falling tDGL(TS) tDGL(TTDM) Exit Cold Fault Drawing Not to Scale Dots Show Threshold Trip Points fllowed by a deglitch time before transitioning into a new mode. tDGL(TTDM) Enter Cold Operation tDGL(TS) Normal Operation tDGL(TS_IOC) Rising Disabled Normal Operation t tDGL(TS1_IOC) Cold to Normal t < tDGL(TTDM) Exit tDGL(TTDM) Enter LDO Mode bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Feature Description (continued) Figure 9. TS Battery Temperature Bias Threshold and Deglitch Timers Copyright © 2009–2015, Texas Instruments Incorporated bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Feature Description (continued) Apply Input Power Is power good? VBAT +VDT < VIN < VOVP & VUVLO < VIN No Turn on PG FET PG pin LOW Yes Is chip enabled? VTS > VEN No Yes Set Input Current Limit to 100 mA and Start Charge Perform ISET & OUT short tests Remember ISET2 State Set charge current based on ISET2 truth table. Return to Charge Figure 10. bq2404x Power-Up Flow Diagram 8.3.5 Overvoltage-Protection (OVP) – Continuously Monitored If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The timer ends and the CHG and PG terminal goes to a high impedance state. Once the overvoltage returns to a normal voltage, the PG terminal goes low, timer continues, charge continues and the CHG terminal goes low after a 25ms deglitch. PG terminal is optional on some packages Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 15 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Feature Description (continued) 8.3.6 Power Good Indication (PG) After application of a 5V source, the input voltage rises above the UVLO and sleep thresholds (VIN>VBAT+VDT), but is less than OVP (VINVBAT + VIN-DT) and an external input from ASI terminal (internal 100k pull-down). The ASO terminal outputs a signal that can be used as a system boot signal. The OR gate is powered by the OUT terminal and the OUT terminal must be powered by an external source (battery or P/S) or via the IN terminal for the ASO terminal to deliver a logic High. The ASI and/or the internal power good signal have to be logic high for the ASO to be logic high. The ASI/ASO, OUT and PG signals are used in production testing to test the system without a battery. 16 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 8.4.3 IN-DPM (VIN-DPM or IN-DPM) The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropterminalg), reaching its current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with voltage less than VIN-DPM to power the out terminal. This works well with current limited adaptors and USB ports as long as the nominal voltage is above 4.3V and 4.4V respectively. This is an added safety feature that helps protect the source from excessive loads. 8.4.4 OUT The Charger’s OUT terminal provides current to the battery and to the system, if present. This IC can be used to charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the loads do not exceed the available current. The OUT terminal is a current limited source and is inherently protected against shorts. If the system load ever exceeds the output programmed current threshold, the output will be discharged unless there is sufficient capacitance or a charged battery present to supplement the excessive load. 8.4.5 ISET An external resistor is used to Program the Output Current (50 to 1000mA) and can be used as a current monitor. RISET = KISET ÷ IOUT (1) Where: • IOUT is the desired fast charge current; • KISET is a gain factor found in the electrical specification For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Figure 1 shows the transition from low current to higher current. Going from higher currents to low currents, there is hysteresis and the transition occurs around 0.15A. o 1.8 For < 45 C, 4.2V Regulation No Operation During Cold Fault 3 60oC to 45oC HOT TEMP 4.06V Regulation 1.6 1.4 VOUT IO - Output Current - A 3.5 2.5 < 48oC 1.5 1 0.5 0 0 o 10oC 60oC Termination Disable 2 0C 100% of Programmed Current } IC Disable } Hot Fault Normalized OUT Current and VREG - V 4 50% 0.2 0.4 0.6 1.2 0.8 0.8 1 1.2 1.4 IOUT Programmed max 0.6 ISET Short Fault Range min 0.2 Cold Fault IOUT Internal Clamp Range 1 0.4 IOUT IOUT Clamp min - max 4.5 IOUT Fault min - max The ISET resistor is short protected and will detect a resistance lower than ≉340Ω. The detection requires at least 80mA of output current. If a “short” is detected, then the IC will latch off and can only be reset by cycling the power. The OUT current is internally clamped to a maximum current between 1.05A and 1.4A and is independent of the ISET short detection circuitry, as shown in Figure 12. Also, see Figure 28 and Figure 29. Non Restricted Operating Area 0 1.6 1.8 1000 100 VTS - Voltage - V Figure 11. Operation Over TS Bias Voltage 10000 ISET - W Figure 12. Programmed/Clamped Out Current Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 17 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com 8.4.6 PRE_TERM – Pre-Charge and Termination Programmable Threshold, bq24040/5 Pre-Term is used to program both the pre-charge current and the termination current threshold. The pre-charge current level is a factor of two higher than the termination current level. The termination can be set between 5 and 50% of the programmed output current level set by ISET. If left floating the termination and pre-charge are set internally at 10/20% respectively. The pre-charge-to-fast-charge, Vlowv threshold is set to 2.5V. RPRE-TERM = %Term × KTERM = %Pre-CHG × KPRE-CHG (2) Where: • %Term is the percent of fast charge current where termination occurs; • %Pre-CHG is the percent of fast charge current that is desired during precharge; • KTERM and KPRE-CHG are gain factors found in the electrical specifications. 8.4.7 ISET2 Is a 3-state input and programs the Input Current Limit/Regulation Threshold. A low will program a regulated fast charge current via the ISET resistor and is the maximum allowed input/output current for any ISET2 setting, Float will program a 100mA Current limit and High will program a 500mA Current limit. Below are two configurations for driving the 3-state ISET2 terminal: VCC VCC To ISET2 R1 Drive Logic To ISET2 Drive Logic Q1 OR R1 Divider set to 0.9 V Which is the Float Voltage R2 Q2 Figure 13. 3-state ISET2 Terminal Circuits 8.4.8 TS (bq24040/5) The TS function for the bq24040/5 is designed to follow the new JEITA temperature standard for Li-Ion and LiPol batteries. There are now four thresholds, 60°C, 45°C, 10°C, and 0°C. Normal operation occurs between 10°C and 45°C. If between 0°C and 10°C the charge current level is cut in half and if between 45°C and 60°C the regulation voltage is reduced to 4.1Vmax, see Figure 11. The TS feature is implemented using an internal 50μA current source to bias the thermistor (designed for use with a 10k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F) connected from the TS terminal to VSS. If this feature is not needed, a fixed 10kΩ can be placed between TS and VSS to allow normal operation. This may be done if the host is monitoring the thermistor and then the host would determine when to pull the TS terminal low to disable charge. The TS terminal has two additional features, when the TS terminal is pulled low or floated/driven high. A low disables charge (similar to a high on the BAT_EN feature) and a high puts the charger in TTDM. Above 60°C or below 0°C the charge is disabled. Once the thermistor reaches ≉–10°C the TS current folds back to keep a cold thermistor (between –10°C and –50°C) from placing the IC in the TTDM mode. If the TS terminal is pulled low into disable mode, the current is reduce to ≉30μA, see Figure 9. Since the ITS curent is fixed along with the temperature thresholds, it is not possible to use thermistor values other than the 10k NTC (at 25°C). 18 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 8.4.9 Termination and Timer Disable Mode (TTDM) - TS Terminal High The battery charger is in TTDM when the TS terminal goes high from removing the thermistor (removing battery pack/floating the TS terminal) or by pulling the TS terminal up to the TTDM threshold. When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect routine is run to see if the battery was removed or not. If the battery was removed then the CHG terminal will go to its high impedance state if not already there. If a battery is detected the CHG terminal does not change states until the current tapers to the termination threshold, where the CHG terminal goes to its high impedance state if not already there (the regulated output will remain on). The charging profile does not change (still has pre-charge, fast-charge constant current and constant voltage modes). This implies the battery is still charged safely and the current is allowed to taper to zero. When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle begins and the CHG LED turns on. If TTDM is not desired upon removing the battery with the thermistor, one can add a 237k resistor between TS and VSS to disable TTDM. This keeps the current source from driving the TS terminal into TTDM. This creates ≉0.1°C error at hot and a ≉3°C error at cold. 8.4.10 Timers, bq24040 and bq24045 only The pre-charge timer is set to 30 minutes. The pre-charge current, can be programmed to off-set any system load, making sure that the 30 minutes is adequate. The bq24041 does not have a safety timer. The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation, INDPM or if in USB current limit. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast when in these modes. If either the 30 minute or ten hour timer times out, the charging is terminated and the CHG terminal goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power or going into and out of TTDM. 8.4.11 Termination Once the OUT terminal goes above VRCH, (reaches voltage regulation) and the current tapers down to the termination threshold, the CHG terminal goes high impedance and a battery detect route is run to determine if the battery was removed or the battery is full. If the battery is present, the charge current will terminate. If the battery was removed along with the thermistor, then the TS terminal is driven high and the charge enters TTDM. If the battery was removed and the TS terminal is held in the active region, then the battery detect routine will continue until a battery is inserted. 8.4.12 Battery Detect Routine The battery detect routine should check for a missing battery while keeping the OUT terminal at a useable voltage. Whenever the battery is missing the CHG terminal should be high impedance. The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the time if battery is missing and not in TTDM. On power-up, if battery voltage is greater than VRCH threshold, a battery detect routine is run to determine if a battery is present. The battery detect routine is disabled while the IC is in TTDM, or has a TS fault. See Figure 14 for the Battery Detect Flow Diagram. 8.4.13 Refresh Threshold After termination, if the OUT terminal voltage drops to VRCH (100mV below regulation) then a new charge is initiated, but the CHG terminal remains at a high impedance (off). 8.4.14 Starting a Charge on a Full Battery The termination threshold is raised by ≉14%, for the first minute of a charge cycle so if a full battery is removed and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries that have relaxed many hours may take several minutes to taper to the termination threshold and terminate charge. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 19 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Start BATT_DETECT Start 25ms timer Timer Expired? No Yes Is VOUTVREG-300mV? Battery Present Turn off Sink Current Return to flow No Battery Absent Don’t Signal Charge Turn off Sink Current Return to Flow Figure 14. Battery Detect Routine (bq24040) 20 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The bq2404x series of devices are highly integrated Li-Ion and Li-Pol linear chargers devices targeted at spacelimited portable applications. The devices operate from either a USB port or AC adapter. The high input voltage range with input overvoltage protection supports low-cost unregulated adapters. These devices have a single power output that charges the battery. A system load can be placed in parallel with the battery as long as the average system load does not keep the battery from charging fully during the 10 hour safety timer. 9.2 Typical Applications 9.2.1 Typical Application: bq24040 and bq24045 IOUT_FAST_CHG = 540mA; IOUT_PRE_CHG = 108mA; IOUT_TERM = 54mA 1.5kW bq24040 and bq24045 Adaptor 1 IN DC+ OUT 10 1.5kW GND 1mF 1kW 2 ISET TS 9 3 VSS CHG 8 System Load Battery Pack ++ 1mF 4 PRETERM ISET2 7 OR 5 PG NC 6 VDD 2kW TTDM/BAT_EN USB Port ISET/100/500 mA VBUS GND GND D+ D+ D- D- Disconnect after Detection Host Figure 15. Typical Application Circuit: bq24040 and bq24045 9.2.1.1 Design Requirements • Supply voltage = 5 V • Fast charge current: IOUT-FC = 540 mA; ISET-terminal 2 • Termination Current Threshold: %IOUT-FC = 10% of Fast Charge or ~54mA • Pre-Charge Current by default is twice the termination Current or ~108mA • TS – Battery Temperature Sense = 10k NTC (103AT) Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 21 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Typical Applications (continued) 9.2.1.2 Detailed Design Procedures 9.2.1.2.1 Calculations 9.2.1.2.1.1 Program the Fast Charge Current, ISET: RISET = [K(ISET) / I(OUT)] (3) From the Electrical Characteristics table: • K(SET) = 540AΩ • RISET = [540AΩ/0.54A] = 1.0 kΩ Selecting the closest standard value, use a 1.0 kΩ resistor between ISET (terminal 16) and Vss. 9.2.1.2.1.2 Program the Termination Current Threshold, ITERM: RPRE-TERM = K(TERM) × %IOUT-FC RPRE-TERM = 200Ω/% × 10% = 2kΩ (4) (5) Selecting the closest standard value, use a 2 kΩ resistor between ITERM (terminal 15) and Vss. One can arrive at the same value by using 20% for a pre-charge value (factor of 2 difference). RPRE-TERM = K(PRE-CHG) × %IOUT-FC RPRE-TERM = 100Ω/% × 20%= 2kΩ (6) (7) 9.2.1.2.1.3 TS Function (bq24040) Use a 10k NTC thermistor in the battery pack (103AT). To Disable the temp sense function, use a fixed 10k resistor between the TS (terminal 1) and Vss. 9.2.1.2.1.4 CHG and PG LED Status: connect a 1.5k resistor in series with a LED between the OUT terminal and the CHG terminal. Connect a 1.5k resistor in series with a LED between the OUT terminal and the and PG terminal. Processor Monitoring: Connect a pull-up resistor between the processor’s power rail and the CHG terminal. Connect a pull-up resistor between the processor’s power rail and the PG terminal. 9.2.1.2.2 Selecting In and Out Terminal Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power terminal, input and output terminals. Using the values shown on the application diagram, is recommended. After evaluation of these voltage signals with real system operational conditions, one can determine if capacitance values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast high amplitude pulsed load applications. Note if designed for high input voltage sources (bad adaptors or wrong adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16V capacitor may be adequate for a 30V transient (verify tested rating with capacitor manufacturer). 9.2.1.2.3 Thermal Package The bq2404x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should be directly connected to the VSS terminal. Full PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: θJA = (TJ – T) / P (8) Where: • TJ = chip junction temperature • T = ambient temperature • P = device power dissipation 22 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Typical Applications (continued) Factors that can influence the measurement and calculation of θJA include: 1. Whether or not the device is board mounted 2. Trace size, composition, thickness, and geometry 3. Orientation of the device (horizontal or vertical) 4. Volume of the ambient air surrounding the device under test and airflow 5. Whether other surfaces are in close proximity to the device being tested Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to ≉3.4V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4V is a good minimum voltage to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of time. The fast charge current will start to taper off if the part goes into thermal regulation. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged : P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT) (9) The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active. 9.2.1.2.3.1 Leakage Current Effects on Battery Capacity To determine how fast a leakage current on the battery will discharge the battery is an easy calculation. The time from full to discharge can be calculated by dividing the Amp-Hour Capacity of the battery by the leakage current. For a 0.75AHr battery and a 10μA leakage current (750mAHr/0.010mA = 75000 Hours), it would take 75k hours or 8.8 years to discharge. In reality the self discharge of the cell would be much faster so the 10μA leakage would be considered negliable. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 23 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Typical Applications (continued) 9.2.1.3 Application Performance Curves SETUP: bq24040 typical applications schematic; VIN = 5V, VBAT = 3.6V (unless otherwise indicated) Vin Vin 5V/div 5V/div Vout Vout 5V/div Vpg 5V/div 5V/div Vpg 5V/div Vaso Vaso 5V/div 5V/div t - time - 10ms/div t - time - 10ms/div Figure 16. Power-up Timing Figure 17. Power-up Timing – No Battery or Load Vasi Vasi 5V/div 5V/div Vout 5V/div Vout Vpg Vpg 5V/div 5V/div 5V/div Vaso Vas 5V/div 5V/div t - time - 50ms/div t - time - 20ms/div Figure 19. ASI and delayed OUT Power-up Timing – No Input Figure 18. – ASI and OUT Power-up Timing – No Input Vin Vin 5V/div 5V/div Vchg 2V/div Vchg Vpg 2V/div Vpg Viset 2V/div Viset 2V/div 2V/div t - time - 20ms/div t - time - 100ms/div Figure 20. OVP 8V Adaptor - Hot Plug 24 2V/div Submit Documentation Feedback Figure 21. OVP from Normal Power-up Operation – VIN 0V → 5V → 8V →5V Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Typical Applications (continued) Vpg Vpg 2V/div 5V/div Vchg Vchg 2V/div 2V/div Vout 2V/div 500mV/div Vts Battery Detect Mode Viset Vin 2V/div 5V/div t - time - 20ms/div t - time - 50ms/div . Figure 22. TS Enable and Disable Fixed 10kΩ resistor, between TS and GND. Figure 23. Hot Plug Source w/No Battery – Battery Detection Vout Vin 1 Battery Detect Cycle 2V/div 1V/div Vchg Vout Viset 500mV/div 5V/div 1V/div Viset 1V/div Vts 1V/div Vts 2V/div Entered TTDM t - time - 5ms/div t - time - 10ms/div Figure 24. Battery Removal – GND Removed 1st, 42 Ω Load Vout Figure 25. Battery Removal with OUT and TS Disconnect 1st, With 100 Ω Load 1V/div 1V/div Vout Vchg Vchg Battery Declared Absent 5V/div 5V/div Viset Viset 1V/div Battery Threshold Reached 1V/div V_0.1 W_OUT V_0.1 W_OUT 100mV/div 100mV/div t - time - 20ms/div t - time - 500ms/div Continuous battery detection when not in TTDM Figure 26. Battery Removal with fixed TS = 0.5V CH4: IOUT (1A/Div) Battery voltage swept from 0V to 4.25V to 3.9V. Figure 27. Battery Charge Profile Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 25 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Typical Applications (continued) Vchg Vout 2V/div 1V/div Vin Vchg 2V/div 2V/div 500mV/div Short Detected in 100mA mode and Latched Off IOUT Clamped Current Viset V_0.1 W_OUT 100mV/div Viset 500mV/div 20mV/div ISET Short Detected and Latched Off V_0.1 W_OUT t - time - 5ms/div t - time - 200ms/div CH4: IOUT (0.2A/Div) CH4: IOUT (1A/Div) Figure 28. ISET Shorted During Normal Operation Figure 29. ISET Shorted Prior to USB Power-up Vin Vin 2V/div 2V/div Vchg Vchg 2V/div 2V/div 500mV/div Viset V_0.1W_OUT 20mV/div Viset 500mV/div 20mV/div V_0.1W_OUT t - time - 1ms/div t - time - 500ms/div CH4: IOUT (0.2A/Div) Figure 30. DPM – Adaptor Current Limits – Vin Regulated Vin Vout Figure 31. DPM – USB Current Limits – Vin Regulated to 4.4V 2V/div 1V/div Enters Thermal Regulation Exits Thermal Regulation Vin Viset 1V/div Viset 1V/div V_0.1W_OUT Vchg 50mV/div 1V/div 5V/div Vpg 5V/div t - time - 1s/div The IC temperature rises to 125°C and enters thermal regulation. Charge current is reduced to regulate the IC at 125°C. VIN is reduced, the IC temperature drops, the charge current returns to the programmed value . Figure 32. Thermal Reg. – Vin increases PWR/Iout Reduced 26 Submit Documentation Feedback t - time - 20ms/div VIN swept from 5V to 3.9V to 5V VBAT = 4V Figure 33. Entering and Exiting Sleep mode Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 Typical Applications (continued) 9.2.2 Typical Application Circuit: bq24041, with ASI and ASO IOUT_FAST_CHG = 540mA; IOUT_PRE_CHG = 108mA 1.5kW bq24041 Adaptor 1 IN DC+ OUT 10 System Load 1.5kW GND 2 ISET BAT_EN 9 3 VSS CHG 8 Battery Pack 1kW ++ 1mF OR 4 Auto-Booting ASI ISET2 7 5 PG ASO 6 1mF TTDM/BAT_EN USB Port ISET/100/500 mA VBUS GND GND D+ D+ D- D- Disconnect after Detection VDD Host EN Power Supply Figure 34. Typical Application Circuit: bq24041, with ASI and ASO 9.2.2.1 Design Requirements See Typical Application: bq24040 and bq24045 for design requirements. 9.2.2.2 Detailed Design Procedures See Typical Application: bq24040 and bq24045 for detailed design procedures. Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 27 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com Typical Applications (continued) 9.2.2.3 Application Performance Curves SETUP: bq24041 typical applications schematic; VIN = 5V, VBAT = 3.6V (unless otherwise indicated) Vin Vin 5V/div 5V/div Vout Vout 5V/div Vpg 5V/div 5V/div Vpg 5V/div Vaso Vaso 5V/div 5V/div t - time - 10ms/div t - time - 10ms/div Figure 35. Power-up Timing, bq24041 Figure 36. Power-up Timing – No Battery or Load, bq24041 Vasi Vasi 5V/div 5V/div Vout 5V/div Vout Vpg Vpg 5V/div 5V/div 5V/div Vaso Vas 5V/div 5V/div t - time - 50ms/div t - time - 20ms/div Figure 37. – ASI and OUT Power-up Timing – No Input, bq24041 28 Submit Documentation Feedback Figure 38. ASI and delayed OUT Power-up Timing – No Input, bq24041 Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 bq24040, bq24041, bq24045 www.ti.com SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 10 Power Supply Recommendations The devices are designed to operate from an input voltage supply range between 3.5 V and 28 V and current capability of at least the maximum designed charge current. This input supply should be well regulated. If located more than a few inches from the bq24040x IN and GND terminals, a larger capacitor is recommended. 11 Layout 11.1 Layout Guidelines To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2405x, with short trace runs to both IN, OUT and GND (thermal pad). • All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. • The high current charge paths into IN terminal and from the OUT terminal must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces • The bq2404x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. It is best to use multiple 10mil vias in the power pad of the IC and close enough to conduct the heat to the bottom ground plane. The bottom ground place should avoid traces that “cut off” the thermal path. The thinner the PCB the less temperature rise. The EVM PCB has a thickness of 0.031 inches and uses 2 oz. (2.8mil thick) copper on top and bottom, and is a good example of optimal thermal performance. 11.2 Layout Example Figure 39. Layout Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 Submit Documentation Feedback 29 bq24040, bq24041, bq24045 SLUS941F – SEPTEMBER 2009 – REVISED MARCH 2015 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support QFN/SON PCB Attachment Application Report, SLUA271 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY bq24040 Click here Click here Click here Click here Click here bq24041 Click here Click here Click here Click here Click here bq24045 Click here Click here Click here Click here Click here 12.3 Trademarks All trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 30 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated Product Folder Links: bq24040 bq24041 bq24045 PACKAGE OPTION ADDENDUM www.ti.com 20-May-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) BQ24040DSQR ACTIVE WSON DSQ 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 125 NXE BQ24040DSQT ACTIVE WSON DSQ 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 0 to 125 NXE BQ24041DSQR ACTIVE WSON DSQ 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR NXF BQ24041DSQT ACTIVE WSON DSQ 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR NXF BQ24045DSQR ACTIVE WSON DSQ 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SII BQ24045DSQT ACTIVE WSON DSQ 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SII (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 20-May-2016 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 28-Feb-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing BQ24040DSQR WSON DSQ 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ24040DSQT WSON DSQ 10 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ24041DSQR WSON DSQ 10 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 BQ24041DSQT WSON DSQ 10 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 BQ24045DSQR WSON DSQ 10 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 BQ24045DSQT WSON DSQ 10 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 28-Feb-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ24040DSQR WSON DSQ 10 3000 210.0 185.0 35.0 BQ24040DSQT WSON DSQ 10 250 210.0 185.0 35.0 BQ24041DSQR WSON DSQ 10 3000 195.0 200.0 45.0 BQ24041DSQT WSON DSQ 10 250 195.0 200.0 45.0 BQ24045DSQR WSON DSQ 10 3000 210.0 185.0 35.0 BQ24045DSQT WSON DSQ 10 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DSQ0010A WSON - 0.8 mm max height SCALE 5.000 PLASTIC SMALL OUTLINE - NO LEAD 2.1 1.9 B A PIN 1 INDEX AREA 2.1 1.9 0.8 0.7 C SEATING PLANE 0.05 0.00 0.08 C 0.9 0.1 EXPOSED THERMAL PAD SYMM (0.2) TYP 5 6 SYMM 11 2X 1.6 1.5 0.1 8X 0.4 1 PIN 1 ID 10 10X 0.4 10X 0.2 0.25 0.15 0.1 0.05 C A B 4218906/A 04/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com EXAMPLE BOARD LAYOUT DSQ0010A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.9) SEE SOLDER MASK DETAIL 10X (0.5) SYMM 10 10X (0.2) 1 (1.5) 8X (0.4) 11 SYMM (0.5) (R0.05) TYP 5 6 ( 0.2) TYP VIA (1.9) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND METAL UNDER SOLDER MASK METAL EDGE EXPOSED METAL SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK OPENING SOLDER MASK DEFINED SOLDER MASK DETAILS 4218906/A 04/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com EXAMPLE STENCIL DESIGN DSQ0010A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 10X (0.5) 10X (0.2) (0.85) 10 1 8X (0.4) 11 SYMM (1.38) (R0.05) TYP 5 6 SYMM (1.9) SOLDER PASTE EXAMPLE BASED ON 0.125 MM THICK STENCIL SCALE: 20X EXPOSED PAD 11 87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE 4218906/A 04/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. 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