bq24072, bq24073
bq24074, bq24075, bq24079
www.ti.com
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
1.5A USB-FRIENDLY Li-Ion BATTERY CHARGER AND POWER-PATH MANAGEMENT IC
Check for Samples: bq24072, bq24073, bq24074, bq24075, bq24079
FEATURES
DESCRIPTION
•
The bq2407x series of devices are integrated Li-ion
linear chargers and system power path management
devices
targeted
at
space-limited
portable
applications. The devices operate from either a USB
port or AC adapter and support charge currents up to
1.5A. The input voltage range with input overvoltage
protection supports unregulated adapters. The USB
input current limit accuracy and start up sequence
allow the bq2407x to meet USB-IF inrush current
specification. Additionally, the input dynamic power
management (VIN-DPM) prevents the charger from
crashing incorrectly configured USB sources.
•
•
APPLICATIONS
13
OUT
10
11
EN 2
5
BAT
2
3
1 mF
SYSTEM
4.7mF
8
System
ON/OFF
Control
15
bq24075
bq24079
VSS
SYSOFF
4.7mF
PACK+
12
TS
1
TEMP
16
6
4
Smart Phones
Portable Media Players
Portable Navigation Devices
Low-Power Handheld Devices
IN
IN
14
•
•
•
•
1kW
1kW
9
•
•
Typical Application Circuit
CHG
•
.
ISET
•
.
ILM
•
•
EN1
•
7
•
PGOOD
•
The bq2407x features dynamic power path
management (DPPM) that powers the system while
simultaneously and independently charging the
battery. The DPPM circuit reduces the charge current
when the input current limit causes the system output
to fall to the DPPM threshold; thus, supplying the
system load at all times while monitoring the charge
current separately. This feature reduces the number
of charge and discharge cycles on the battery, allows
for proper charge termination and enables the system
to run with a defective or absent battery pack.
TMR
•
•
Fully Compliant USB Charger
– Selectable 100mA and 500mA Maximum
Input Current
– 100mA Maximum Current Limit Ensures
Compliance to USB-IF Standard
– Input based Dynamic Power Management
(VIN-DPM) for Protection Against Poor USB
Sources
28V Input Rating with Overvoltage Protection
Integrated Dynamic Power Path Management
(DPPM) Function Simultaneously and
Independently Powers the System and
Charges the Battery
Supports up to 1.5A Charge Current with
Current Monitoring Output (ISET)
Programmable Input Current Limit up to 1.5A
for Wall Adapters
System Output Tracks Battery Voltage
(bq24072)
Programmable Termination Current (bq24074)
Battery Disconnect Function with SYSOFF
Input (bq24075, bq24079)
Programmable Pre-Charge and Fast-Charge
Safety Timers
Reverse Current, Short-Circuit and Thermal
Protection
NTC Thermistor Input
Proprietary Start Up Sequence Limits Inrush
Current
Status Indication – Charging/Done, Power
Good
Small 3 mm × 3 mm 16 Lead QFN Package
CE
1
1.18kW
1.13kW
PACK-
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2014, Texas Instruments Incorporated
bq24072, bq24073
bq24074, bq24075, bq24079
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
Additionally, the regulated system input enables instant system turn-on when plugged in even with a totally
discharged battery. The power-path management architecture also permits the battery to supplement the system
current requirements when the adapter cannot deliver the peak system currents, enabling the use of a smaller
adapter.
The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge
phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the
internal temperature threshold is exceeded. The charger power stage and charge current sense functions are
fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status
display, and charge termination. The input current limit and charge current are programmable using external
resistors.
ORDERING INFORMATION
PART NUMBER
(1)
(2)
2
(1) (2)
VOVP
VBAT(REG)
VOUT(REG)
VDPPM
OPTIONAL
FUNCTION
MARKING
bq24072RGTR
6.6 V
4.2V
VBAT + 225 mV
VO(REG) – 100 mV
TD
CKP
bq24072RGTT
6.6 V
4.2V
VBAT + 225 mV
VO(REG) – 100 mV
TD
CKP
bq24073RGTR
6.6 V
4.2V
4.4 V
VO(REG) – 100 mV
TD
CKQ
bq24073RGTT
6.6 V
4.2V
4.4 V
VO(REG) – 100 mV
TD
CKQ
bq24074RGTR
10.5 V
4.2V
4.4 V
VO(REG) – 100 mV
ITERM
BZF
bq24074RGTT
10.5 V
4.2V
4.4 V
VO(REG) – 100 mV
ITERM
BZF
bq24075RGTR
6.6 V
4.2V
5.5 V
4.3 V
SYSOFF
CDU
bq24075RGTT
6.6 V
4.2V
5.5 V
4.3 V
SYSOFF
CDU
bq24079RGTR
6.6 V
4.1V
5.5 V
4.3 V
SYSOFF
ODI
bq24079RGTT
6.6 V
4.1V
5.5 V
4.3 V
SYSOFF
ODI
The RGT package is available in the following options:
R - taped and reeled in quantities of 3,000 devices per reel.
T - taped and reeled in quantities of 250 devices per reel.
This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for
use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including
bromine (Br) or antimony (Sb) above 0.1% of total product weight.
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Copyright © 2008–2014, Texas Instruments Incorporated
Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073
bq24074, bq24075, bq24079
www.ti.com
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
ABSOLUTE MAXIMUM RATINGS (1)
over the 0°C to 125°C operating free-air temperature range (unless otherwise noted)
VALUE
VI
Input Voltage
II
Input Current
UNIT
MIN
MAX
IN (with respect to VSS)
–0.3
28
V
BAT (with respect to VSS)
–0.3
5
V
OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM,
TMR, ITERM, SYSOFF, TD (with respect to VSS)
–0.3
7
V
1.6
A
5
A
BAT (Discharge mode)
5
A
BAT (Charging mode)
1.5 (2)
A
15
mA
1.5
kV
IN
OUT
Output Current
(Continuous)
IO
Output Sink Current
CHG, PGOOD
Electrostatic Discharge (HBM) QSS 009-105 (JESD22-A114A) (3)
TJ
Junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
DISSIPATION RATINGS
PACKAGE (1)
RGT
(1)
(2)
(2)
RθJA
RθJC
39.47 °C/W
2.4 °C/W
POWER RATING
TA ≤ 25°C
TA = 85°C
2.3 W
225mW
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2x3 via matrix.
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
4.35
26
’72, ’73, ‘75, '79
4.35
6.4
‘74
4.35
10.2
IN voltage range
VI
IN operating voltage range
UNIT
V
V
IIN
Input current, IN pin
1.5
A
IOUT
Current, OUT pin
4.5
A
IBAT
Current, BAT pin (Discharging)
4.5
A
ICHG
Current, BAT pin (Charging)
TJ
Junction Temperature
RILIM
RISET
Fast-charge current programming resistor
RITERM
Termination current programming resistor
RTMR
Timer programming resistor
(1)
(2)
1.5
(1)
A
–40
125
°C
Maximum input current programming resistor
1100
8000
Ω
(2)
590
5900
Ω
0
15
kΩ
18
72
kΩ
The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting.
Copyright © 2008–2014, Texas Instruments Incorporated
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3
bq24072, bq24073
bq24074, bq24075, bq24079
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
www.ti.com
ELECTRICAL CHARACTERISTICS
Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
3.3
MAX
UNIT
INPUT
UVLO
Undervoltage lock-out
VIN: 0 V → 4 V
3.2
Vhys
Hysteresis on UVLO
VIN: 4 V → 0 V
200
VIN(DT)
Input power detection threshold
Input power detected when VIN > VBAT + VIN(DT)
VBAT = 3.6 V, VIN: 3.5 V → 4 V
55
Vhys
Hysteresis on VIN(DT)
VBAT = 3.6 V, VIN: 4 V → 3.5 V
20
Deglitch time, input power detected status
Time measured from VIN: 0 V → 5 V 1 μs
rise-time to PGOOD = LO
tDGL(PGOOD)
VOVP
Input overvoltage protection threshold
Vhys
Hysteresis on OVP
tDGL(OVP)
Input overvoltage blanking time (OVP fault deglitch)
tREC
Input overvoltage recovery time
80
3.4
V
300
mV
130
mV
mV
1.2
VIN: 5 V → 7 V
(’72, ’73, ’75, '79)
VIN: 5 V → 11 V
(’74)
VIN: 7 V → 5V
(’72, ’73, ’75, '79)
110
VIN: 11 V → 5 V
(’74)
175
ms
6.4
6.6
6.8
10.2
10.5
10.8
V
mV
50
μs
1.2
ms
VIN > UVLO and VIN > VBAT + VIN(DT)
1.3
mA
VIN > UVLO and VIN > VBAT + VIN(DT)
520
mV
Time measured from VIN: 11 V → 5 V with 1 μs
fall-time to PGOOD = LO
ILIM, ISET SHORT CIRCUIT DETECTION (CHECKED DURING STARTUP)
ISC
Current source
VSC
QUIESCENT CURRENT
IBAT(PDWN)
Sleep current into BAT pin
IIN
Standby current into IN pin
ICC
Active supply current, IN pin
CE = LO or HI, input power not detected,
No load on OUT pin, TJ = 85°C
6.5
μA
EN1= HI, EN2=HI, VIN = 6 V, TJ= 85°C
50
EN1= HI, EN2=HI, VIN = 10 V, TJ= 85°C
200
CE = LO, VIN = 6 V, no load on OUT pin,
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)
1.5
mA
μA
POWER PATH
VDO(IN-OUT)
VIN – VOUT
VIN = 4.3 V, IIN = 1A, VBAT = 4.2V
300
475
mV
VDO(BAT-OUT)
VBAT – VOUT
IOUT = 1 A, VIN = 0 V, VBAT > 3 V
50
100
mV
OUT pin voltage regulation (bq24072)
VO(REG)
VIN > VOUT + VDO(IN-OUT), VBAT < 3.2 V
3.3
3.4
3.5
VIN > VOUT + VDO(IN-OUT), VBAT ≥ 3.2 V
VBAT +
150mV
VBAT +
225mV
VBAT +
270mV
4.5
OUT pin voltage regulation (bq24073, bq24074)
VIN > VOUT + VDO(IN-OUT)
4.3
4.4
OUT pin voltage regulation (bq24075, bq24079)
VIN > VOUT + VDO(IN-OUT)
5.4
5.5
5.6
EN1 = LO, EN2 = LO
90
95
100
EN1 = HI, EN2 = LO
450
475
500
V
mA
IINmax
Maximum input current
EN2 = HI, EN1 = LO
KILIM/RILIM
A
ILIM = 500mA to 1.5A
1500
1610
1720
ILIM = 200mA to 500mA
1330
1525
1720
KILIM
Maximum input current factor
AΩ
IINmax
Programmable input current limit range
EN2 = HI, EN1 = LO, RILIM = 8 kΩ to 1.1 kΩ
200
1500
mA
VIN-DPM
Input voltage threshold when input current is
reduced
EN2 = LO, EN1 = X
4.35
4.5
4.63
V
Output voltage threshold when charging current is
reduced
VO(REG) –
180mV
VO(REG) –
100mV
VO(REG) –
30mV
V
VDPPM
4.3
4.4
V
VBSUP1
Enter battery supplement mode
VBAT = 3.6V, RILIM = 1.5kΩ, RLOAD = 10Ω → 2Ω
VOUT ≤ VBAT
–40mV
V
VBSUP2
Exit battery supplement mode
VBAT = 3.6V, RILIM = 1.5kΩ, RLOAD = 2Ω → 10Ω
VOUT ≥
VBAT–20mV
V
VO(SC1)
Output short-circuit detection threshold, power-on
VIN > VUVLO and VIN > VBAT + VIN(DT)
0.8
0.9
1
VO(SC2)
Output short-circuit detection threshold, supplement
mode VBAT – VOUT > VO(SC2) indicates short-circuit
VIN > VUVLO and VIN > VBAT + VIN(DT)
200
250
300
tDGL(SC2)
Deglitch time, supplement mode short circuit
tREC(SC2)
Recovery time, supplement mode short circuit
(’72, ’73, ’74)
(’75, '79)
4
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4.2
V
mV
250
μs
60
ms
Copyright © 2008–2014, Texas Instruments Incorporated
Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073
bq24074, bq24075, bq24079
www.ti.com
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BATTERY CHARGER
IBAT
Source current for BAT pin short-circuit detection
VBAT = 1.5V
VBAT(SC)
BAT pin short-circuit detection threshold
VBAT rising
('72, '73, '74, '75)
VBAT(REG)
Battery charge voltage
VLOWV
Pre-charge to fast-charge transition threshold
tDGL1(LOWV)
Deglitch time on pre-charge to fast-charge transition
tDGL2(LOWV)
Deglitch time on fast-charge to pre-charge transition
Battery fast charge current range
Battery fast charge current
CE = LO, EN1= LO, EN2 = HI,
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin,
thermal loop and DPPM loop not active
ICHG
Fast charge current factor
Pre-charge current
KPRECHG
Pre-charge current factor
Current for external termination-setting resistor
ITERM
Termination current threshold (externally set)
(bq24074)
tDGL(TERM)
mA
2
V
4.16
4.20
4.23
4.059
4.100
4.141
3
3.1
2.9
K Factor for termination detection threshold
(externally set) (bq24074)
CE = LO, (EN1, EN2) ≠ (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal
loop not active
V
25
ms
25
ms
150
1500
KISET/RISET
mA
A
890
975
AΩ
AΩ
KPRECHG/RISET
IBIAS(ITERM)
KITERM
11
1.8
797
Termination comparator detection threshold
(internally set)
ITERM
VIN > VUVLO and VIN > VBAT + VIN(DT)
VBAT(REG) > VBAT > VLOWV, VIN = 5 V CE = LO,
EN1 = LO, EN2 = HI
IPRECHG
7.5
V
('79)
KISET
4
1.6
A
70
88
106
0.09×ICHG
0.1×ICHG
0.11×ICHG
A
CE = LO, (EN1, EN2) = (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal
loop not active
0.027×ICHG
0.033×ICHG
0.040×ICHG
72
75
78
VIN > VUVLO and VIN > VBAT + VIN(DT)
KITERM × RITERM / RISET
μA
A
USB500 or ISET mode(EN1, EN2) ≠ (LO, LO)
CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and
thermal loop not active
0.0225
0.0300
0.0375
USB100 mode (EN1, EN2) = (LO, LO),
CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and
thermal loop not active
0.008
0.0100
0.012
VBAT(REG)
–140mV
VBAT(REG)
–100mV
A
Deglitch time, termination detected
25
VRCH
Recharge detection threshold
tDGL(RCH)
Deglitch time, recharge threshold detected
VIN > VUVLO and VIN > VBAT + VIN(DT)
tDGL(NO-IN)
Delay time, input power loss to OUT LDO turn-off
VBAT = 3.6 V. Time measured from
VIN: 5 V → 3 V 1 μs fall-time
IBAT(DET)
Sink current for battery detection
VBAT = 2.5V
tDET
Battery detection timer
BAT high or low
5
ms
VBAT(REG)
–60mV
V
62.5
ms
20
ms
7.5
10
250
mA
ms
BATTERY CHARGING TIMERS
tPRECHG
Pre-charge safety timer value
TMR = floating
1440
1800
2160
s
tMAXCHG
Charge safety timer value
TMR = floating
14400
18000
21600
s
tPRECHG
Pre-charge safety timer value
18 kΩ < RTMR < 72 kΩ
RTMR × KTMR
tMAXCHG
Charge safety timer value
18 kΩ < RTMR < 72 kΩ
10×R TMR ×KTMR
KTMR
Timer factor
36
48
s
s
60
s/kΩ
BATTERY-PACK NTC MONITOR (1)
INTC
NTC bias current
VIN > UVLO and VIN > VBAT + VIN(DT)
VHOT
High temperature trip point
Battery charging, VTS Falling
VHYS(HOT)
Hysteresis on high trip point
Battery charging, VTS Rising from VHOT
VCOLD
Low temperature trip point
Battery charging, VTS Rising
VHYS(COLD)
Hysteresis on low trip point
Battery charging, VTS Falling from VCOLD
tDGL(TS)
Deglitch time, pack temperature fault detection
TS fault detected to charger disable
VDIS(TS)
TS function disable threshold (bq24072, bq24073)
TS unconnected
72
75
78
μA
270
300
330
mV
2000
2100
30
mV
2200
mV
300
mV
50
ms
VIN - 200mV
V
125
°C
155
°C
20
°C
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
TJ(OFF)
Thermal shutdown temperature
TJ(OFF-HYS)
Thermal shutdown hysteresis
(1)
TJ Rising
These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.
Copyright © 2008–2014, Texas Instruments Incorporated
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5
bq24072, bq24073
bq24074, bq24075, bq24079
SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
VIL
Logic LOW input voltage
0
0.4
VIH
Logic HIGH input voltage
1.4
6
V
V
IIL
Input sink current
VIL= 0V
1
μA
IIH
Input source current
VIH= 1.4V
10
μA
ISINK = 5 mA
0.4
V
LOGIC LEVELS ON PGOOD, CHG
VOL
Output LOW voltage
ISET
ITERM
TMR
IN
bq24072 11
bq24073
10
3
4
9
7
8
1
16 15 14 13
12
2
11
bq24074
3
10
4
9
5
VSS
6
EN2
EN1
PGOOD
5
TS
BAT
BAT
CE
6
7
ILIM
OUT
OUT
CHG
TS
BAT
BAT
CE
1
16 15 14 13
12
2
11
bq24075
bq24079 10
3
4
9
5
8
6
7
ILIM
OUT
OUT
CHG
8
VSS
2
ILIM
OUT
OUT
CHG
VSS
16 15 14 13
12
EN2
EN1
PGOOD
1
EN2
EN1
PGOOD
ISET
TD
TMR
IN
TS
BAT
BAT
CE
ISET
SYSOFF
TMR
IN
RGT PACKAGE
(Top View)
PIN FUNCTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
'72, '73
'74
'75, '79
1
1
1
I
BAT
2, 3
2, 3
2, 3
I/O
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the
battery. Bypass BAT to VSS with a 4.7 μF to 47 μF ceramic capacitor.
CE
4
4
4
I
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby
mode. In standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low
logic level to enable the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE
unconnected to ensure proper operation.
EN2
5
5
5
I
EN1
6
6
6
I
PGOOD
7
7
7
O
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is
detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to
the desired logic voltage rail using a 1kΩ-100kΩ resistor, or use with an LED for visual indication.
VSS
8
8
8
–
Ground. Connect to the thermal pad and to the ground rail of the circuit.
CHG
9
9
9
O
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high
impedance when charging is complete and when charger is disabled. Connect CHG to the desired logic
voltage rail using a 1kΩ-100kΩ resistor, or use with an LED for visual indication.
OUT
10, 11
10, 11
10, 11
O
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and
above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT except
when SYSOFF is high (bq24075 and bq24079 only). Connect OUT to the system load. Bypass OUT to VSS
with a 4.7 μF to 47 μF ceramic capacitor.
ILIM
12
12
12
I
Adjustable Current Limit Programming Input. Connect a 1100 Ω to 8 kΩ resistor from ILIM to VSS to program
the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery
charge current. Leaving ILIM unconnected disables all charging.
IN
13
13
13
I
Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating
range is 4.35V to 6.6V (bq24072, bq24073, bq24075, and bq24079) or 4.35V to 10.5V (bq23074). The input
can accept voltages up to 26V without damage but operation is suspended. Connect bypass capacitor 1 μF
to 10 μF to VSS.
TS
6
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External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors
a 10kΩ NTC thermistor. For applications that do not utilize the TS function, connect a 10kΩ fixed resistor
from TS to VSS to maintain a valid voltage level on TS.
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable
USB compliance. See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled
down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Copyright © 2008–2014, Texas Instruments Incorporated
Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073
bq24074, bq24075, bq24079
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
PIN FUNCTIONS (continued)
PIN
NAME
NO.
I/O
DESCRIPTION
'72, '73
'74
'75, '79
TMR
14
14
14
I
Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS
to disable all safety timers. Connect a 18 kΩ to 72 kΩ resistor between TMR and VSS to program the timers
a desired length. Leave TMR unconnected to set the timers to the default values.
TD
15
–
–
I
Termination Disable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable
charger termination. TD is checked during startup only and cannot be changed during operation. See the TD
section in this datasheet for a description of the behavior when termination is disabled. TD is internally pulled
down to VSS with ~285 kΩ. Do not leave TD unconnected to ensure proper operation.
ITERM
–
15
–
I
Termination Current Programming Input. Connect a 0 Ω to 15 kΩ resistor from ITERM to VSS to program the
termination current. Leave ITERM unconnected to set the termination current to the default 10% termination
threshold.
SYSOFF
–
–
15
I
System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output.
When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation.
SYSOFF is internally pulled up to VBAT through a large resistor (~5 MΩ). Do not leave SYSOFF unconnected
to ensure proper operation.
ISET
16
16
16
I/O
Fast Charge Current Programming Input. Connect a 590 Ω to 5.9 kΩ resistor from ISET to VSS to program
the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at
ISET reflects the actual charging current and can be used to monitor charge current. See the CHARGE
CURRENT TRANSLATOR section for more details.
–
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device.
The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not
use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all
times.
Thermal
Pad
Table 1. EN1/EN2 Settings
EN2
EN1
0
0
Maximum input current into IN pin
100 mA. USB100 mode
0
1
500 mA. USB500 mode
1
0
Set by an external resistor from ILIM to VSS
1
1
Standby (USB suspend mode)
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
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SIMPLIFIED BLOCK DIAGRAM
250mV
VO(SC1)
VBAT
OUT-SC1
t DGL(SC2)
OUT-SC2
Q1
IN
OUT
EN2
Short Detect
225mV
Precharge
VIN-LOW
USB100
USB500
ILIM
ISET
2.25V
Fastcharge
TJ
VREF- ILIM
USB-susp
TJ(REG)
Short Detect
V DPPM
V O(REG)
V OUT
EN2
EN1
Q2
V BAT (REG)
VBAT
BAT
VOUT
CHARGEPUMP
I BIAS- ITERM
40mV
VLOWV
225mV
(’72, ’73, ’75)
ITERM
bq24074
VRCH
~3V
SYSOFF
bq24075
bq24079
Supplement
VBAT(SC)
tDGL(RCH)
tDGL2(LOWV)
VIN
tDGL1(LOWV)
tDGL(TERM)
I TERM-floating
BAT-SC
VBAT + VIN-DT
tDGL(NO-IN)
t DGL(PGOOD)
V UVLO
INTC
V HOT
Charge Control
TS
t DGL(TS)
VCOLD
V OVP
tBLK(OVP)
VDIS(TS)
EN1
EN2
USB Suspend
TD
(bq24072,
bq24073)
CE
CHG
Halt timers
VIPRECHG
VICHG
Dynamically
Controlled
Oscillator
Reset timers
PGOOD
V ISET
Fast-Charge
Timer
Timer fault
TMR
Pre-Charge
Timer
~100mV
8
Timers disabled
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
TYPICAL CHARACTERISTICS
VIN = 6V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.
ADAPTER PLUG-IN
BATTERY CONNECTED
RLOAD = 10Ω
VIN
5 V/div
BATTERY DETECTION
BATTERY INSERTED
VCHG
BATTERY DETECTION
BATTERY REMOVED
5 V/div
VCHG
5 V/div
Charging Initiated
VOUT
4.4 V
1 A/div
500 mV/div
VBAT
3.6 V
IBAT
VPGOOD
1 A/div
IBAT
5 V/div
500 mA/div
IBAT
2 V/div
VBAT
Battery Inserted
Battery Detection Mode
4 ms/div
2 V/div
Battery
Removed
VBAT
Battery Detection Mode
400 ms/div
400 ms/div
Figure 1.
Figure 2.
Figure 3.
ENTERING AND EXITING DPPM
MODE
RLOAD = 20Ω to 9Ω
ENTERING AND EXITING BATTERY
SUPPLEMENT MODE
RLOAD = 25ΩTO 4.5Ω
bq24074
ENTERING AND EXITING BATTERY
SUPPLEMENT MODE
RLOAD = 20ΩTO 4.5Ω
bq24072
IOUT
500 mA/div
IOUT
IBAT
IBAT
1 A/div
Supplement Mode
500 mA/div
1 A/div
IOUT
IBAT
Supplement Mode
500 mA/div
VOUT
3.825 V
200 mV/div
VOUT
4.4 V
VOUT
4.4 V
VBAT
3.8 V
400 ms/div
500 mV/div
200 mV/div
VBAT
3.6 V
Tracking to VBAT +225 mV
1 ms/div
1 ms/div
Figure 4.
Figure 5.
Figure 6.
CHARGER ON/OF USING CE
OVP FAULT
VIN = 6V to 15V
RLOAD = 10Ω
SYSTEM ON/OFF WITH INPUT
CONNECTED
VIN = 6V
bq24075, bq24079
VCE
5 V/div
VCHG
5 V/div
1 V/div
VBAT
3.6 V
IBAT
500 mA/div
Mandatory Precharge
500 mA/div
10 V/div
VIN
VOUT
4.4 V
VBAT
4.2 V
5 V/div
VSYSOFF
VOUT
5.5 V
500 mV/div
2 V/div
VBAT
4V
500 mA/div
IBAT
1 A/div
IBAT
400 ms/div
10 ms/div
40 ms/div
Figure 7.
Figure 8.
Copyright © 2008–2014, Texas Instruments Incorporated
Figure 9.
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9
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
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TYPICAL CHARACTERISTICS (continued)
VIN = 6V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.
SYSTEM ON/OFF WITH INPUT NOT
CONNECTED
VIN = 0V
bq24075, bq24079
THERMAL REGULATION
5 V/div
0.7
500
0.6
IL = 1 A
400
IBAT - mA
VBAT
4V
600
Dropout Voltage - VIN-VOUT
VSYSOFF
DROPOUT VOLTAGE
vs
TEMPERATURE
300
2 V/div
200
VOUT
100
Battery Powering
System
System Power Off
IBAT
0
500 mA/div
120
125
130
135
Temperature - oC
140
145
0.5
0.4
0.3
0.2
0.1
4 ms/div
0
0
125
Figure 10.
Figure 11.
Figure 12.
DROPOUT VOLTAGE
vs
TEMPERATURE
NO INPUT SUPPLY
bq24072
OUTPUT REGULATION VOLTAGE
vs
BATTERY VOLTAGE
bq24072
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
4.6
120
3.80
VIN = 5 V
IL = 1 A
VIN = 5 V,
VBAT = 3.5 V,
IL = 1 A
3.78
4.4
100
3.76
VBAT = 3 V
60
VBAT = 3.9 V
40
4.2
VO - Output Voltage - V
80
VO - Output Voltage - V
Dropout Voltage - VBAT-VOUT
25
100
50
75
TJ - Junction Temperature - °C
4
3.8
3.6
3.4
3.74
3.72
3.70
3.68
3.66
3.64
20
3.2
0
3
3.62
0
50
75
100
25
TJ - Junction Temperature - °C
2
125
3
3.5
4
VBAT - Battery Voltage - V
3.60
4.5
0
25
50
75
100
Figure 14.
Figure 15.
bq24073/ 74
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
bq24075, bq24079
OUTPUT REGULATION VOLTAGE
vs
TEMPERATURE
BAT REGULATION VOLTAGE
vs
TEMPERATURE
5.75
VIN = 5 V,
IL = 1 A
4.43
5.70
4.210
VIN = 6 V,
IL = 1 A
4.38
4.35
VBAT - Regulation Voltage - V
VO - Output Voltage - V
5.65
4.40
5.60
5.55
5.50
5.45
5.40
5.35
4.33
125
TJ - Junction Temperature - °C
Figure 13.
4.45
VO - Output Voltage - V
2.5
4.205
4.200
4.195
4.190
4.185
5.30
4.30
0
25
50
75
100
TJ - Junction Temperature - °C
Figure 16.
10
125
5.25
0
25
50
75
100
TJ - Junction Temperature - °C
125
4.180
0
10
15
20
25
30
TJ - Junction Temperature - °C
Figure 17.
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Figure 18.
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Product Folder Links: bq24072 bq24073 bq24074 bq24075 bq24079
bq24072, bq24073
bq24074, bq24075, bq24079
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
TYPICAL CHARACTERISTICS (continued)
VIN = 6V, EN1=1, EN2=0, bq24073 application circuit, TA = 25°C, unless otherwise noted.
bq24072/ 73/ 75/ 79
OVERVOLTAGE PROTECTION
THRESHOLD
vs
TEMPERATURE
bq24074
OVERVOLTAGE PROTECTION
THRESHOLD
vs
TEMPERATURE
10.70
VI Rising
6.60
6.55
VI Falling
6.50
700
10.60
VI Rising
10.55
10.50
10.45
VI Falling
10.40
10.35
10.30
USB500
400
300
200
0
0
125
500
USB100
10.20
25
50
75
100
TJ - Junction Temperature - °C
600
100
10.25
25
75
50
100
TJ - Junction Temperature - °C
5
125
6
7
8
9
VI - Input Voltage - V
10
Figure 19.
Figure 20.
Figure 21.
FASTCHARGE CURRENT
vs
BATTERY VOLTAGE
FASTCHARGE CURRENT
vs
BATTERY VOLTAGE
PRECHARGE CURRENT
vs
BATTERY VOLTAGE
105
310
1.05
RISET = 900 W
RISET = 3 kW
1.03
1.01
0.99
0.97
RISET = 900 W
104
305
IBAT - Precharge Current - A
IBAT - Fast Charge Current - A
IBAT - Fast Charge Current - A
RILIM
10.65
ILIM - Input Current - mA
6.65
6.45
0
800
10.5 V
6.6 V
VOVP - Output Voltage Threshold - V
VOVP - Output Voltage Threshold - V
6.70
bq24074
INPUT CURRENT LIMIT
vs
INPUT VOLTAGE
300
295
290
285
103
102
101
100
99
98
97
96
0.95
280
3
3.2
3.6
3.8
4
3.4
VBAT - Battery Voltage - V
95
3
4.2
Figure 22.
3.2
3.4
3.6
3.8
4
VBAT - Battery Voltage - V
4.2
2
2.2
2.4
2.6
2.8
3
VBAT - Battery Voltage - V
Figure 23.
Figure 24.
PRECHARGE CURRENT
vs
BATTERY VOLTAGE
31.5
RISET = 3 kW
IBAT - Precharge Current - A
31
30.5
30
29.5
29
28.5
2
2.2
2.4
2.6
2.8
VBAT - Battery Voltage - V
3
Figure 25.
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11
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
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APPLICATION CIRCUITS
VIN = UVLO to VOVP, IFASTCHG = 800mA, IIN(MAX) = 1.3A, Battery Temperature Charge Range = 0°C to 50°C, 6.25
hour Fastcharge Safety Timer
R4
1.5 kW
R5
1.5 kW
DC+
PGOOD
Adaptor
IN
C1
1 mF
GND
CHG
SYSTEM
OUT
C2
4.7 mF
VSS
bq24072
bq24073
HOST
EN2
EN1
TS
TD
CE
BAT
PACK-
R1
46.4 kW
ISET
TMR
C3
4.7 mF
ILM
PACK+
TEMP
R2
1.18 kW
R3
1.13 kW
Figure 26. Using bq24072/ bq24073 in a Host Controlled Charger Application
12
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
VIN = UVLO to VOVP, IFASTCHG = 800mA, IIN(MAX) = 1.3A, ITERM = 110mA, Battery Temperature Charge
Range = 0°C to 50°C, Safety Timers disabled
R4
1.5 kW
R5
1.5 kW
DC+
IN
C1
1 mF
GND
PGOOD
Adaptor
CHG
SYSTEM
OUT
C2
4.7 mF
VSS
bq24074
EN2
EN1
TS
TMR
CE
ILM
C3
4.7mF
ITERM
PACK+
TEMP
R1
4.12 kW
PACK-
ISET
BAT
R2
1.18 kW
R3
1.13 kW
Figure 27. Using bq24074 in a Stand Alone Charger Application
VIN = UVLO to VOVP, IFASTCHG = 800mA, IIN(MAX) = 1.3A, Battery Temperature Charge Range = 0°C to 50°C,
6.25 hour Fastcharge Safety Timer
R4
1.5 kW
R5
1.5 kW
SYSTEM
IN
C1
1 mF
GND
CHG
DC+
PGOOD
Adaptor
OUT
C2
4.7 mF
VSS
bq24075
bq24079
HOST
EN2
EN1
TS
SYSOFF
CE
BAT
PACK-
R1
46.4 kW
ISET
TMR
C3
4.7 mF
ILM
PACK+
TEMP
R2
1.18 kW
R3
1.13 kW
Figure 28. Using bq24075 or bq24079 to Disconnect the Battery from the System
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EXPLANATION OF DEGLITCH TIMES AND COMPARATOR HYSTERESIS
Figures not to scale
VOVP
VOVP - Vhys(OVP)
VIN
Typical Input Voltage
Operating Range
t < tDGL(OVP)
VBAT + VIN(DT)
VBAT + VIN(DT) - Vhys(INDT)
UVLO
UVLO - Vhys(UVLO)
PGOOD
tDGL(PGOOD)
tDGL(OVP)
tDGL(NO-IN)
tDGL(PGOOD)
Figure 29. Power-Up, Power-Down, Power Good Indication
tDGL1(LOWV)
VBAT
VLOWV
t < tDGL1(LOWV)
tDGL1(LOWV)
tDGL2(LOWV)
ICHG
Fast-Charge
Fast-Charge
IPRE-CHG
t < tDGL2(LOWV)
Pre-Charge
Pre-Charge
Figure 30. Pre- to Fast-Charge, Fast- to Pre-Charge Transition – tDGL1(LOWV), tDGL2(LOWV)
VBAT
VRCH
Re-Charge
t < tDGL(RCH)
tDGL(RCH)
Figure 31. Recharge – tDGL(RCH)
14
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
Turn
Q2 OFF
Force
Q2 ON
tREC(SC2)
Turn
Q2 OFF
tREC(SC2)
Force
Q2 ON
VBAT - VOUT
Recover
VO(SC2)
t < tDGL(SC2)
tDGL(SC2)
tDGL(SC2)
t < tDGL(SC2)
Figure 32. OUT Short-Circuit – Supplement Mode
VCOLD
VCOLD - Vhys(COLD)
t < tDGL(TS)
VTS
Suspend
Charging
tDGL(TS)
Resume
Charging
VHOT - Vhys(HOT)
VHOT
Figure 33. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
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DETAILED FUNCTIONAL DESCRIPTION
The bq2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted
at space-limited portable applications. The device powers the system while simultaneously and independently
charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for
proper charge termination and enables the system to run with a defective or absent battery pack. It also allows
instant system turn-on even with a totally discharged battery. The input power source for charging the battery
and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path
Management (DPPM), which shares the source current between the system and battery charging, and
automatically reduces the charging current if the system load increases. When charging from a USB port, the
input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below a
threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to
supplement the system current requirements when the adapter cannot deliver the peak system currents.
UNDERVOLTAGE LOCKOUT (UVLO)
The bq2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage
threshold (UVLO).
During the power down mode the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the
VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
POWER ON
When VIN exceeds the UVLO threshold, the bq2407x powers up. While VIN is below VBAT + VIN(DT), the host
commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT
pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to
OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for
overload conditions on OUT.
Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If
SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload
conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a
short circuit at OUT. When VOUT is above VSC, the FET Q1 switches to the current limit threshold set by EN1,
EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as
well as the input voltage conditions.
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
PGOOD = Hi-Z
CHG = Hi-Z
BATTFET ON
UVLO VOVP for a period long than
tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance.
Once the OVP condition is removed, a new power on sequence starts (See the POWER ON section). The safety
timers are reset and a new charge cycle will be indicated by the CHG output.
DYNAMIC POWER-PATH MANAGEMENT
The bq2407x features an OUT output that powers the external load connected to the battery. This output is
active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a
source connected to IN to charge the battery and a battery source only.
INPUT SOURCE CONNECTED (ADAPTER or USB)
With a source connected, the dynamic power-path management (DPPM) circuitry of the bq2407x monitors the
input current continuously. The OUT output for the bq24073/ 74/ 75/ 79 is regulated to a fixed voltage (VO(REG)).
For the bq24072, OUT is regulated to 200mV above the voltage at BAT. When the BAT voltage falls below 3.2V,
OUT is clamped to 3.4V. This allows for proper startup of the system load even with a discharged battery. The
current into IN is shared between charging the battery and powering the system load at OUT. The bq2407x has
internal selectable current limits of 100mA (USB100) and 500mA (USB500) for charging from USB ports, as well
as a resistor-programmable input current limit.
USB100 Current Limit
The bq2407x is USB IF compliant for the inrush current testing. The USB spec allows up to 10μF to be hard
started, which establishes 50μC as the maximum inrush charge value when exceeding 100mA. The input current
limit for the bq2407x prevents the input current from exceeding this limit, even with system capacitances greater
than 10μF. Note that the input capacitance to the device must be selected small enough to prevent a violation
( VLOWV
No
tPRECHARGE
Elapsed?
Yes
End Charge
Flash CHG
Start Fastcharge
ICHARGE set by ISET
No
IBAT < ITERM
No
t FASTCHARGE
Elapsed?
Yes
End Charge
Flash CHG
Charge Done
CHG = Hi-Z
TD = Low
(’72, ’73 Only)
(’74, ’75 = YES)
No
Yes
Termination Reached
BATTFET Off
Wait for VBAT < VRCH
No
VBAT < VRCH
Yes
Run Battery Detection
Battery Detected?
No
Yes
Figure 40. Battery Charging Flow Diagram
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ADJUSTABLE TERMINATION THRESHOLD (ITERM Input, bq24074)
The termination current threshold in the bq24074 is user-programmable. Set the termination current by
connecting a resistor from ITERM to VSS. For USB100 mode (EN1 = EN2 = Low), the termination current value
is calculated as:
ITERM = 0.01 × RITERM/ RISET
(1)
In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as:
ITERM = 0.03 × RITERM/ RISET
(1)
The termination current is programmable up to 50% of the fastcharge current. The RITERM resistor must be less
than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current.
TERMINATION DISABLE (TD Input, bq24072, bq24073)
The bq24072 and bq24073 contain a TD input that allows termination to be enabled/ disabled. Connect TD to a
logic high to disable charge termination. When termination is disabled, the device goes through the pre-charge,
fast-charge and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the
output voltage at BAT equal to VBAT(REG), and charging current does not terminate. The charge current is set by
ICHG or IINmax, whichever is less. Battery detection is not performed. The CHG output is high impedance once
the current falls below ITERM and does not go low until the input power or CE are toggled. When termination is
disabled, the pre-charge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS
pin functionality) is disabled if the TD pin is high and the TS pin is unconnected or pulled up to VIN.
BATTERY DETECTION AND RECHARGE
The bq2407x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the
battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run.
During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the voltage on
BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the
protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT < VRCH,
then the protector closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be missing
and the detection routine continues.
BATTERY DISCONNECT (SYSOFF Input, bq24075, bq24079)
The bq24075 and bq24079 feature a SYSOFF input that allows the user to turn the FET Q2 off and disconnect
the battery from the OUT pin. This is useful for disconnecting the system load from the battery, factory
programming where the battery is not installed or for host side impedance track fuel gauging, such as bq27500,
where the battery open circuit voltage level must be detected before the battery charges or discharges. The
/CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal operation.
SYSOFF is internally pulled to VBAT through ~5 MΩ resistor.
DYNAMIC CHARGE TIMERS (TMR Input)
The bq2407x devices contain internal safety timers for the pre-charge and fast-charge phases to prevent
potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.
The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated
using the following equation:
tPRECHG = KTMR × RTMR
tMAXCHG = 10 × KTMR × RTMR
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation. For the bq24072 and bq24073, the timers are
disabled when TD is connected to a high logic level.
During the fast charge phase, several events increase the timer durations.
1. The system load current activates the DPPM loop which reduces the available charging current
2. The input current is reduced because the input voltage has fallen to VIN(LOW)
3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
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During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half
the frequency and the counter counts half as fast resulting in only one minute of "counting" time.
If the pre charge timer expires before the battery voltage reaches VLOWV, the bq2407x indicates a fault condition.
Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is indicated.
The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by
toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.
STATUS INDICATORS (PGOOD, CHG)
The bq2407x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid
input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside
of this range, PGOOD is high impedance.
The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG pin on (low - LED on),
whereas all refresh (subsequent) charges will result in the CHG pin off (open - LED off). In addition, the CHG
signals timer faults by flashing at approximately 2 Hz.
Table 2. PGOOD STATUS INDICATOR
Input State
PGOOD Output
VIN < VUVLO
Hi impedance
VUVLO < VIN < VIN(DT)
Hi impedance
VIN(DT) < VIN < VOVP
Low
VIN > VOVP
Hi impedance
Table 3. CHG STATUS INDICATOR
Charge State
CHG Output
Charging
Charging suspended by thermal loop
Safety timers expired
Low (for first charge cycle)
Flashing at 2Hz
Charging done
Recharging after termination
IC disabled or no valid input power
Hi impedance
Battery absent
THERMAL REGULATION AND THERMAL SHUTDOWN
The bq2407x contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds
TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing
further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a
"hiccup" mode. During thermal regulation, the safety timers are slowed down proportionately to the reduction in
current limit.
Note that this feature monitors the die temperature of the bq2407x. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is
shown in Figure 41. Battery termination is disabled during thermal regulation.
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PRECHARGE
THERMAL
REGULATION
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CC FAST
CHARGE
CV TAPER
DONE
VO(REG)
IO(CHG)
Battery Voltage
Battery Current
V(LOWV)
HI-z
I(PRECHG)
I(TERM)
TJ(REG)
IC Junction Temperature, TJ
Figure 41. Charge Cycle Modified by Thermal Loop
26
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
BATTERY PACK TEMPERATURE MONITORING
The bq2407x features an external battery pack temperature monitoring input. The TS input connects to the NTC
thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature
conditions. During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any
time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers
maintain their values but suspend counting. When the voltage measured at TS returns to within the operation
window, charging is resumed and the timers continue counting. When charging is suspended due to a battery
pack temperature fault, the CHG pin remains low and continues to indicate charging.
For the bq24072 and bq24073, battery pack temperature sensing is disabled when termination is disabled (TD =
High) and the voltage at TS is greater than VDIS(TS). For applications that do not require the TS monitoring
function, connect a 10kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain charging.
The allowed temperature range for 103AT-2 type thermistor is 0°C to 50°C. However, the user may increase the
range by adding two external resistors. See Figure 42 for the circuit details. The values for Rs and Rp are
calculated using the following equations:
æ
ì
üö
VH ´ VC
2
´ (RTC - RTH )ý ÷
çç (RTH +RTC ) - 4 íRTH ´ RTC +
÷
(VH - VC ) ´ ITS
î
þø
è
2
-(RTH + RTC ) ±
Rs =
Rp =
(2)
VH ´ (R TH + RS )
ITS ´ (R TH + RS ) - VH
(3)
Where:
RTH: Thermistor Hot Trip Value found in thermistor data sheet
RTC: Thermistor Cold Trip Value found in thermistor data sheet
VH: IC's Hot Trip Threshold = 0.3V nominal
VC: IC's Cold Trip Threshold = 2.1V nominal
ITS: IC's Output Current Bias = 75µA nominal
NTC Thermsitor Semitec 103AT-4
Rs and Rp 1% values were chosen closest to calculated values
Cold Temp Resistance and
Trip Threshold; Ω (°C)
Hot Temp Resistance and Trip
Threshold; Ω (°C)
External Bias Resistor, Rs (Ω)
External Bias Resistor, Rp (Ω)
28000 (–0.6)
4000 (51)
0
∞
28480 (–1)
3536 (55)
487
845000
28480 (–1)
3021 (60)
1000
549000
33890 (–5)
4026 (51)
76.8
158000
33890 (–5)
3536 (55)
576
150000
33890 (–5)
3021 (60)
1100
140000
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RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. Note
that the temperature window cannot be tightened more than using only the thermistor connected to TS, it
can only be extended.
I NTC
bq2407x
RS
TS
PACK+
TEMP
+
VCOLD
RP
+
PACK-
VHOT
Figure 42. Extended TS Pin Thresholds
28
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SLUS810I – SEPTEMBER 2008 – REVISED JANUARY 2014
APPLICATIONS INFORMATION
bq2407x CHARGER DESIGN EXAMPLE
See Figure 26 to Figure 28 for Schematics of the Design Example.
Requirements
•
•
•
•
•
•
Supply voltage = 5V
Fast charge current of approximately 800 mA; ISET - pin 16
Input Current Limit =1.3A; ILIM - pin 12
Termination Current Threshold = 110mA; ITERM – pin 15 (bq24074 only)
Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14
TS – Battery Temperature Sense = 10kΩ NTC (103AT-2)
Calculations
Program the Fast Charge Current (ISET):
RISET = KISET / ICHG
KISET = 890 AΩ from the electrical characteristics table.
RISET = 890AΩ/0.8A = 1.1125 kΩ
Select the closest standard value, which for this case is 1.13kΩ. Connect this resistor between ISET (pin 16) and
VSS.
Program the Input Current Limit (ILIM)
RILIM = KILIM / II_MAX
KILIM = 1550 AΩ from the electrical characteristics table.
RISET = 1550AΩ / 1.3A = 1.192 kΩ
Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12) and
VSS.
Program the Termination Current Threshold (ITERM) (bq24074 only)
RITERM = ITERM × RISET / 0.030
RISET = 1.13 kΩ from the above calculation.
RITERM = 110mA × 1.13 kΩ / 0.030 = 4.143 kΩ
Select the closest standard value, which for this case is 4.12kΩ. Connect this resistor between ITERM (pin 15)
and VSS. Note that when in USB100 mode (EN1 = EN2 = VSS), the termination threshold is 1/3 of the normal
threshold.
Program 6.25-hour Fast-Charge Safety Timer (TMR)
RTMR = tMAXCHG / (10 × KTMR )
KTMR = 48 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 46.8kΩ
Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 2) and
VSS.
TS Function
Use a 10kΩ NTC thermistor in the battery pack (103AT-2). For applications that do not require the TS monitoring
function, connect a 10kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain charging.
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CHG and PGOOD
LED Status: connect a 1.5kΩ resistor in series with a LED between OUT and CHG to indicate charging status.
Connect a 1.5kΩ resistor in series with a LED between OUT and PGOOD to indicate when a valid input source is
connected.
Processor Monitoring Status: connect a pullup resistor (on the order of 100 kΩ) between the processor’s power
rail and CHG and PGOOD
Termination Disable (TD) (bq24072, bq24073 only)
Connect TD high to disable termination. Connect TD low to enable termination.
System ON/OFF (SYSOFF) (bq24075 or bq24079 only)
Connect SYSOFF high to disconnect the battery from the system load. Connect SYSOFF low for normal
operation
SELECTING IN, OUT AND BAT pin CAPACITORS
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output and battery pins. Using the values shown on the application diagram, is recommended. After
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast
high amplitude pulsed load applications. Note if designed high input voltage sources (bad adaptors or wrong
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16V capacitor may be adequate for a 30V transient (verify tested rating with capacitor manufacturer).
THERMAL PACKAGE
The bq24072/3/4/5 family is packaged in a thermally enhanced MLP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad
should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the
application note entitled: QFN/SON PCB Attachment Application Note (SLUA271). The most common measure
of package thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the
air surrounding the package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can influence the measurement and calculation of θJA include:
1.
2.
3.
4.
5.
Whether or not the device is board mounted
Trace size, composition, thickness, and geometry
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage
increases to ≉3.4V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4V is a good minimum voltage to
use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the
PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of
time. The fast charge current will start to taper off if the part goes into thermal regulation.
30
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The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
(3)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.
Half-Wave Adaptors
Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the bq2407x
family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This
feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage
for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input
from dropping out. Additional input capacitance may be needed.
Sleep Mode
When the input is between UVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for
>20mS the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will
not discharge the battery, other than the leakage on the BAT pin. If one has a full 1000mAHr battery and the
leakage is 10μA, then it would take 1000mAHr/10μA = 100000 hours (11.4 years) to discharge the battery. The
battery’s self discharge is typically 5 times higher than this.
Layout Tips
•
•
•
•
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2407x, with short
trace runs to both IN, OUT and GND (thermal pad).
All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces
The bq2407x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad
to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is
also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full
PCB design guidelines for this package are provided in the application note entitled: QFN/SON PCB
Attachment Application Note (SLUA271).
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REVISION HISTORY
Note: Page numbers of current revision may differ from previous versions.
Changes from Original (September 2008) to Revision A
Page
•
Changed device Features. .................................................................................................................................................... 1
•
Changed Description. ........................................................................................................................................................... 1
•
Changed Typical Application Circuit ..................................................................................................................................... 1
•
Changed description of CHG pin. ......................................................................................................................................... 6
•
Changed SYSOFF Description. ............................................................................................................................................ 7
•
Changed the Simplified Block Diagram ................................................................................................................................ 8
•
Added Figure 4 through Figure 11. ....................................................................................................................................... 9
•
Changed APPLICATION CIRCUITS section. ..................................................................................................................... 12
•
Added Using bq24075 to Disconnect the Battery from the System, Figure 28. ................................................................. 13
•
Changed DETAILED FUNCTIONAL DESCRIPTION section. ............................................................................................ 16
•
Changed text in section - STATUS INDICATORS (PGOOD, CHG) .................................................................................. 25
•
Changed Table - CHG STATUS INDICATOR .................................................................................................................... 25
•
Changed Equation 2 and Equation 3 .................................................................................................................................. 27
•
Changed section - Half-Wave Adaptors ............................................................................................................................. 31
Changes from Revision A (December 2008) to Revision B
•
Page
Changed VBAT(REG) max value From 4.24 V To: 4.23 V ........................................................................................................ 5
Changes from Revision B (January 2009) to Revision C
•
Page
Changed Maximum input current factor values. ................................................................................................................... 4
Changes from Revision C (March 2009) to Revision D
•
Page
Added Device number bq24079. .......................................................................................................................................... 1
Changes from Revision D (June 2009) to Revision E
Page
•
Changed globally RT1 and RT2 to Rs and Rp ................................................................................................................... 27
•
Added equations 2 and 3 plus explanations and table ....................................................................................................... 27
Changes from Revision E (August 2010) to Revision F
•
Page
Changed 10 x 45 s/kΩ to 10 x 48 s/kΩ under section Program 6.25hour......(TMR) ......................................................... 29
Changes from Revision F (September 2010) to Revision G
•
Page
Added ESD human body model specification to Abs Maximum Ratings table. ................................................................... 3
Changes from Revision G (July 2011) to Revision H
•
32
Page
Changed ICHG Battery fast charge current range MIN specification from "300 mA" to "150 mA" ......................................... 5
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Changes from Revision H (December 2013) to Revision I
Page
•
Changed RISET spec MAX value from "3000" to "5900" in the Recommended Operating Conditions table. ....................... 3
•
Changed resistor value from "3 kΩ" to "5.9 kΩ" in the Pin Functions table ISET Description paragraph. ........................... 7
•
Changed resistor value from "3 kΩ" to "5.9 kΩ" in the Battery Charging section paragraph. ............................................ 22
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PACKAGE OPTION ADDENDUM
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10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ24072RGTR
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKP
BQ24072RGTRG4
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKP
BQ24072RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKP
BQ24072RGTTG4
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKP
BQ24073RGTR
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKQ
BQ24073RGTRG4
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKQ
BQ24073RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKQ
BQ24073RGTTG4
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CKQ
BQ24074RGTR
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BZF
BQ24074RGTRG4
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BZF
BQ24074RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BZF
BQ24075RGTR
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CDU
BQ24075RGTRG4
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CDU
BQ24075RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CDU
BQ24075RGTTG4
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CDU
BQ24079RGTR
ACTIVE
QFN
RGT
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ODI
BQ24079RGTT
ACTIVE
QFN
RGT
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ODI
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF BQ24075 :
• Automotive: BQ24075-Q1
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
23-May-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
BQ24072RGTR
QFN
RGT
16
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24072RGTT
QFN
RGT
16
250
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24073RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24073RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24074RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24074RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24075RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24075RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24075RGTT
QFN
RGT
16
250
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24075RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24079RGTR
QFN
RGT
16
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
BQ24079RGTT
QFN
RGT
16
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-May-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ24072RGTR
QFN
RGT
16
3000
367.0
367.0
35.0
BQ24072RGTT
QFN
RGT
16
250
338.0
355.0
50.0
BQ24073RGTR
QFN
RGT
16
3000
367.0
367.0
35.0
BQ24073RGTT
QFN
RGT
16
250
210.0
185.0
35.0
BQ24074RGTR
QFN
RGT
16
3000
367.0
367.0
35.0
BQ24074RGTT
QFN
RGT
16
250
210.0
185.0
35.0
BQ24075RGTR
QFN
RGT
16
3000
338.0
355.0
50.0
BQ24075RGTR
QFN
RGT
16
3000
367.0
367.0
35.0
BQ24075RGTT
QFN
RGT
16
250
338.0
355.0
50.0
BQ24075RGTT
QFN
RGT
16
250
210.0
185.0
35.0
BQ24079RGTR
QFN
RGT
16
3000
367.0
367.0
35.0
BQ24079RGTT
QFN
RGT
16
250
210.0
185.0
35.0
Pack Materials-Page 2
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