BQ24074RGTT

BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 BQ2407x Standalone 1-Cell 1.5-A Linear Battery Chargers with Power Path • • • • 2 Applications For all available packages, see the orderable addendum at the end of the data sheet. 1 kW 1 kW IN IN 13 OUT 10 11 EN 2 5 BAT 2 3 1 mF SYSTEM 4.7 mF 8 System ON/OFF Control 15 BQ24075 BQ24079 VSS SYSOFF 4.7 mF 12 TS 1 TEMP PACK+ 16 6 3 Description (1) 4 TWS Charging case and headphones Gaming accessory Video doorbells, IP network cameras Asset tracking and fleet management Portable medical devices 3.00 mm × 3.00 mm BQ24079 14 • • • • • VQFN (16) BQ24075 9 • BQ24074 CHG • BQ24073 ISET • • • BODY SIZE (NOM) BQ24072 ILM • PACKAGE 7 • Device Information PART NUMBER(1) PGOOD • • The BQ2407x features dynamic power path management (DPPM) that powers the system while simultaneously and independently charging the battery. The DPPM circuit reduces the charge current when the input current limit causes the system output to fall to the DPPM threshold; thus, supplying the system load at all times while monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination and enables the system to run with a defective or absent battery pack. EN1 • Fully compliant USB charger – Selectable 100-mA and 500-mA maximum input current – 100-mA Maximum current limit ensures compliance to USB-IF standard – Input-based dynamic power management (VINDPM) for protection against poor USB sources Functional Safety-Capable (BQ24074) – Documentation available to aid functional safety system design 28-V Input rating with overvoltage protection Integrated dynamic power path management (DPPM) function simultaneously and independently powers the system and charges the battery Supports up to 1.5-A charge current with current monitoring output (ISET) Programmable input current limit up to 1.5 A for wall adapters System output tracks battery voltage (BQ24072) Programmable termination current (BQ24074) Battery disconnect function with SYSOFF input (BQ24075, BQ24079) Programmable pre-charge and fast-charge safety timers Reverse current, short-circuit and thermal protection NTC thermistor input Proprietary start-up sequence limits inrush current Status indication – charging/done, power good Safety-Related Certification: – IEC 62368-1 Certification (BQ24072) TMR • IF inrush current specifications. Additionally, the input dynamic power management (VIN-DPM) prevents the charger from crashing incorrectly configured USB sources. CE 1 Features 1.18 kW 1.13 kW PACK- Typical Application Circuit The BQ2407x series of devices are integrated Li-Ion linear chargers and system power path management devices targeted at space-limited portable applications. The devices operate from either a USB port or an AC adapter and support charge currents up to 1.5 A. The input voltage range with input overvoltage protection supports unregulated adapters. The USB input current limit accuracy and start up sequence allow the BQ2407x to meet USBAn IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Description (continued).................................................. 5 6 Device Comparison Table...............................................6 7 Pin Configuration and Functions...................................7 8 Specifications................................................................ 10 8.1 Absolute Maximum Ratings(1) .................................. 10 8.2 ESD Ratings............................................................. 10 8.3 Recommended Operating Conditions.......................10 8.4 Thermal Information.................................................. 11 8.5 Electrical Characteristics...........................................12 8.6 Typical Characteristics.............................................. 14 9 Detailed Description......................................................17 9.1 Overview................................................................... 17 9.2 Functional Block Diagram......................................... 18 9.3 Feature Description...................................................19 9.4 Device Functional Modes..........................................31 10 Application and Implementation................................ 33 10.1 Application Information........................................... 33 10.2 Typical Application.................................................. 33 10.3 System Examples................................................... 38 11 Power Supply Recommendations..............................39 12 Layout...........................................................................40 12.1 Layout Guidelines................................................... 40 12.2 Layout Example...................................................... 41 12.3 Thermal Considerations..........................................42 13 Device and Documentation Support..........................43 13.1 Device Support....................................................... 43 13.2 Receiving Notification of Documentation Updates..43 13.3 Support Resources................................................. 43 13.4 Trademarks............................................................. 43 13.5 Electrostatic Discharge Caution..............................43 13.6 Glossary..................................................................43 14 Mechanical, Packaging, and Orderable Information.................................................................... 43 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision M (August 2019) to Revision N (October 2021) Page • Added Functional Safety-Capable (BQ24074) to Features ............................................................................... 1 • Added Safety-Related Certification: IEC 62368-1 Certification (BQ24072) to Features ....................................1 • Changed Applications.........................................................................................................................................1 • Changed BQ24079T information and package in Section 6 ..............................................................................6 • Added IBAT(PDWN) TYP value.............................................................................................................................12 • Added IIN TYP values....................................................................................................................................... 12 • Added ICC TYP value........................................................................................................................................ 12 Changes from Revision L (June 2018) to Revision M (August 2019) Page • Changed the document title ...............................................................................................................................1 • Changed the Device Comparison Table............................................................................................................. 6 • Deleted the Dissipation Ratings table............................................................................................................... 11 • Changed VIN-LOW To VIN-DPM in the Functional Block Diagram ....................................................................... 18 • Changed text From: "the DPPM loop or the VIN-(LOW) loop." To: "the DPPM loop or the VIN-DPM loop." in the Battery Charging secton................................................................................................................................... 24 • Chganged text From: " input voltage has fallen to VIN(LOW)" To: "input voltage has fallen to VIN-DPM" in the Dynamic Charge Timers (TMR Input) scrtion................................................................................................... 27 • Changed Equation 11 ...................................................................................................................................... 42 Changes from Revision K (March 2015) to Revision L (June 2018) Page • Deleted MARKINGS from the Device Comparison Table................................................................................... 6 • Added the RGT0016B and RGT0016C package information to the Device Comparison Table.........................6 • Changed the Pinout images and descriptions ................................................................................................... 7 • Change description of the CE pin From: "Connect CE to a high logic level to place the battery charger in standby mode. In standby mode,..." To ""Connect CE to a high logic level to disable battery charging. OUT is active and battery supplement mode is still available.".......................................................................................7 • "Changed text in the third paragraph of the Power On section From: When VOUT is above VSC,..." To: "When VOUT is above VO(SC1),..."..................................................................................................................................19 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com • • • SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Changed text From: "The valid resistor range is 590 Ω to 5.9 kΩ." To: "The valid resistor range is 590 Ω to 8.9 kΩ." in the Battery Charging section.................................................................................................................24 Changed From: VIN(DT) To: VBAT + VIN(DT) in Table 9-1 ....................................................................................28 Changed INTC To: ITS in Figure 9-9 .................................................................................................................. 29 Changes from Revision J (January 2015) to Revision K (March 2015) Page • Deleted package type code from Device Comparison Table. See the POA at the end of the data sheet. ........ 6 • Changed ICHG Battery fast charge current range MIN specification from "150 mA" to "100 mA"..................... 12 Changes from Revision I (January 2014) to Revision J (January 2015) Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1 Changes from Revision H (December 2013) to Revision I (January 2014) Page • Changed resistor value from "3 kΩ" to "8.9 kΩ" in the Pin Functions table ISET Description paragraph...........7 • Changed RISET spec MAX value from "3000" to "8900" in the Recommended Operating Conditions table.... 10 • Changed resistor value from "3 kΩ" to "5.9 kΩ" in the Battery Charging section paragraph............................ 24 Changes from Revision G (July 2011) to Revision H (December 2013) Page • Changed ICHG Battery fast charge current range MIN specification from "300 mA" to "150 mA"..................... 12 Changes from Revision F (September 2010) to Revision G (July 2011) Page • Added ESD human body model specification to Abs Maximum Ratings table.................................................10 Changes from Revision E (August 2010) to Revision F (September 2010) Page • Changed 10 x 45 s/kΩ to 10 x 48 s/kΩ under section Program 6.25hour......(TMR)........................................ 34 Changes from Revision D (June 2009) to Revision E (August 2010) Page • Changed globally RT1 and RT2 to Rs and Rp..................................................................................................29 • Added equations 2 and 3 plus explanations and table..................................................................................... 29 Changes from Revision C (March 2009) to Revision D (June 2009) Page • Added Device number BQ24079........................................................................................................................ 1 Changes from Revision B (January 2009) to Revision C (March 2009) Page • Changed Maximum input current factor values. .............................................................................................. 12 Changes from Revision A (December 2008) to Revision B (January 2009) Page • Changed VBAT(REG) max value From 4.24 V To: 4.23 V....................................................................................12 Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 3 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Changes from Revision * (September 2008) to Revision A (December 2008) Page • Changed device Features...................................................................................................................................1 • Changed Description.......................................................................................................................................... 1 • Changed Typical Application Circuit................................................................................................................... 1 • Changed description of CHG pin........................................................................................................................ 7 • Changed SYSOFF Description...........................................................................................................................7 • Added Figure 10-5 through Figure 8-1............................................................................................................. 14 • Changed DETAILED FUNCTIONAL DESCRIPTION section........................................................................... 17 • Changed the Functional Block Diagram .......................................................................................................... 18 • Changed text in section - STATUS INDICATORS ( PGOOD, CHG).................................................................28 • Changed Table - CHG STATUS INDICATOR................................................................................................... 28 • Changed Equation 8 and Equation 9 ...............................................................................................................29 • Changed APPLICATION CIRCUITS section.................................................................................................... 33 • Added Using BQ24075 to Disconnect the Battery from the System, Figure 10-13.......................................... 38 • Changed section - Half-Wave Adaptors............................................................................................................39 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 5 Description (continued) Additionally, the regulated system input enables instant system turn-on when plugged in even with a totally discharged battery. The power path management architecture also lets the battery supplement the system current requirements when the adapter cannot deliver the peak system currents, thus enabling the use of a smaller adapter. The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the internal temperature threshold is exceeded. The charger power stage and charge current sense functions are fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status display, and charge termination. The input current limit and charge current are programmable using external resistors. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 5 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 6 Device Comparison Table VOVP VBAT(REG) VOUT(REG) VDPPM BQ24072 6.6 V 4.2 V VBAT + 225 mV VO(REG) – 100 mV BQ24073 6.6 V 4.2 V 4.4 V VO(REG) – 100 mV TD BQ24074 10.5 V 4.2 V 4.4 V VO(REG) – 100 mV ITERM BQ24075 6.6 V 4.2 V 5.5 V 4.3 V BQ24076 6.6 V 4.4 V VBAT + 225 mV VO(REG) – 100 mV SYSOFF BQ24078 6.6 V 4.35 V VBAT + 225 mV VO(REG) – 100 mV SYSOFF SYSOFF (1) (2) 6 OPTIONAL FUNCTION PART NUMBER (1) (2) BQ24079 6.6 V 4.1 V 5.5 V 4.3 V BQ24072T 6.6 V 4.2 V VBAT + 225 mV VO(REG) – 100 mV BQ24075T 6.6 V 4.2 V 5.5 V 4.3 V BQ24079T 6.6 V 4.1 V 5.5 V 4.3 V TS METHOD PACKAGE TD Current Based SYSOFF RGT0016C TD Voltage Based SYSOFF SYSOFF For all available packages, see the orderable addendum at the end of the data sheet This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 TS 1 BAT 2 ISET TD TMR IN 16 15 14 13 7 Pin Configuration and Functions 12 ILIM 11 OUT 10 OUT 9 CHG Thermal 6 7 8 PGOOD VSS 4 EN1 CE Pad 5 3 EN2 BAT Not to scale TS 1 BAT 2 ISET ITERM TMR IN 16 15 14 13 Figure 7-1. BQ24072, BQ24073 RGT0016B Package 16 Pins Top View 12 ILIM 11 OUT 10 OUT 9 CHG Thermal 6 7 8 PGOOD VSS 4 EN1 CE Pad 5 3 EN2 BAT Not to scale Figure 7-2. BQ24074 RGT0016B Package 16 Pins Top View Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 7 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com TS 1 BAT 2 ISET SYSOFF TMR IN 16 15 14 13 SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 12 ILIM 11 OUT 10 OUT 9 CHG Thermal 6 7 8 PGOOD VSS 4 EN1 CE Pad 5 3 EN2 BAT Not to scale Figure 7-3. BQ24075 RGT0016C Package, BQ24079 RGT0016B Package 16 Pins Top View Table 7-1. Pin Functions PIN NAME DESCRIPTION '74 '75, '79 BAT 2, 3 2, 3 2, 3 I/O CE 4 4 4 I Charge Enable Active-Low Input. Connect CE to a high logic level to disable battery charging. OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable the battery charger. CE is internally pulled down with approximately 285 kΩ. Do not leave CE unconnected to ensure proper operation. CHG 9 9 9 O Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance when charging is complete and when charger is disabled. Connect CHG to the desired logic voltage rail using a 1kΩ-100kΩ resistor, or use with an LED for visual indication. EN1 6 6 6 I EN2 5 5 5 I ILIM 12 12 12 I Adjustable Current Limit Programming Input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to program the maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current. Leaving ILIM unconnected disables all charging. IN 13 13 13 I Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating range is 4.35 V to 6.6 V (BQ24072, BQ24073, BQ24075, and BQ24079) or 4.35 V to 10.5 V (bq24074). The input can accept voltages up to 26 V without damage but operation is suspended. Connect bypass capacitor 1 μF to 10 μF to VSS. Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor. Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB compliance. See Table 7-2 for the description of the operation states. EN1 and EN2 are internally pulled down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation. ISET 16 16 16 I/O Fast Charge Current Programming Input. Connect a 590-Ω to 8.9-kΩ resistor from ISET to VSS to program the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual charging current and can be used to monitor charge current. See Section 9.3.5.1 for more details. ITERM – 15 – I Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination current. Leave ITERM unconnected to set the termination current to the default 10% termination threshold. 10, 11 10, 11 10, 11 O System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT except when SYSOFF is high (BQ24075 and BQ24079 only). Connect OUT to the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor. PGOOD 7 7 7 O Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication. SYSOFF – – 15 I System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output. When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation. SYSOFF is internally pulled up to VBAT through a large resistor (approximately 5 MΩ). Do not leave SYSOFF unconnected to ensure proper operation. OUT 8 I/O '72, '73 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Table 7-1. Pin Functions (continued) PIN I/O DESCRIPTION – I Termination Disable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger termination. TD is checked during startup only and cannot be changed during operation. See the TD section in this datasheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with approximately 285 kΩ. Do not leave TD unconnected to ensure proper operation. — — – There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times. 14 14 14 I Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS to disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave TMR unconnected to set the timers to the default values. TS 1 1 1 I External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10kΩ NTC thermistor. For applications that do not use the TS function, connect a 10-kΩ fixed resistor from TS to VSS to maintain a valid voltage level on TS. VSS 8 8 8 – Ground. Connect to the thermal pad and to the ground rail of the circuit. NAME '72, '73 '74 '75, '79 TD 15 – Thermal Pad — TMR Table 7-2. EN1/EN2 Settings EN2 EN1 MAXIMUM INPUT CURRENT INTO IN PIN 0 0 100 mA. USB100 mode 0 1 500 mA. USB500 mode 1 0 Set by an external resistor from ILIM to VSS 1 1 Standby (USB suspend mode) Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 9 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8 Specifications 8.1 Absolute Maximum Ratings(1) over the 0°C to 125°C operating free-air temperature range (unless otherwise noted) VI Input Voltage II Input Current MIN MAX UNIT IN (with respect to VSS) –0.3 28 V BAT (with respect to VSS) –0.3 5 V OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, ITERM, SYSOFF, TD (with respect to VSS) –0.3 7 V 1.6 A 5 A BAT (Discharge mode) 5 A BAT (Charging mode) 1.5(2) A IN OUT Output Current (Continuous) IO 15 mA TJ Output Sink Current Junction temperature –40 150 °C Tstg Storage temperature –65 150 °C (1) (2) CHG, PGOOD Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Section 8.3 is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge current may not be reached. 8.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101(2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 8.3 Recommended Operating Conditions MIN IN voltage range VI IN operating voltage range MAX 4.35 26 ’72, ’73, ‘75, '79 4.35 6.4 ‘74 4.35 10.2 UNIT V V IIN Input current, IN pin 1.5 A IOUT Current, OUT pin 4.5 A IBAT Current, BAT pin (Discharging) ICHG Current, BAT pin (Charging) TJ Junction Temperature RILIM Maximum input current programming resistor RISET Fast-charge current programming resistor RITERM Termination current programming resistor RTMR Timer programming resistor (1) (2) 10 (1) 4.5 A 1.5(2) A –40 125 °C 1100 8000 Ω 590 8900 Ω 0 15 kΩ 18 72 kΩ Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting. The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge current may not be reached. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.4 Thermal Information BQ2407x THERMAL METRIC(1) RGT UNIT 16 PINS RθJA Junction-to-ambient thermal resistance 44.5 RθJC(top) Junction-to-case (top) thermal resistance 54.2 RθJB Junction-to-board thermal resistance 17.2 ψJT Junction-to-top characterization parameter 1.0 ψJB Junction-to-board characterization parameter 17.1 RθJC(bot) Junction-to-case (bottom) thermal resistance 3.8 (1) °C/W For more information about traditional and new thermal metrics, see the Semiconductor IC Package Thermal Metrics application report. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 11 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.5 Electrical Characteristics Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP 3.3 MAX UNIT INPUT UVLO Undervoltage lock-out VIN: 0 V → 4 V 3.2 Vhys Hysteresis on UVLO VIN: 4 V → 0 V 200 VIN(DT) Input power detection threshold Input power detected when VIN > VBAT + VIN(DT) VBAT = 3.6 V, VIN: 3.5 V → 4 V 55 Vhys Hysteresis on VIN(DT) VBAT = 3.6 V, VIN: 4 V → 3.5 V 20 Deglitch time, input power detected status Time measured from VIN: 0 V → 5 V 1 μs rise-time to PGOOD = LO tDGL(PGOOD) VOVP Input overvoltage protection threshold Vhys Hysteresis on OVP tDGL(OVP) Input overvoltage blanking time (OVP fault deglitch) tREC Input overvoltage recovery time 80 3.4 V 300 mV 130 mV mV 1.2 VIN: 5 V → 7 V (’72, ’73, ’75, '79) VIN: 5 V → 11 V (’74) VIN: 7 V → 5V (’72, ’73, ’75, '79) 110 VIN: 11 V → 5 V (’74) 175 ms 6.4 6.6 6.8 10.2 10.5 10.8 V mV 50 μs 1.2 ms VIN > UVLO and VIN > VBAT + VIN(DT) 1.3 mA VIN > UVLO and VIN > VBAT + VIN(DT) 520 mV CE = LO or HI, input power not detected, No load on OUT pin, TJ = 85°C 4.3 Time measured from VIN: 11 V → 5 V with 1 μs fall-time to PGOOD = LO ILIM, ISET SHORT-CIRCUIT DETECTION (CHECKED DURING STARTUP) ISC Current source VSC QUIESCENT CURRENT IBAT(PDWN) Sleep current into BAT pin IIN Standby current into IN pin ICC Active supply current, IN pin 6.5 μA EN1= HI, EN2=HI, VIN = 6 V, TJ= 85°C 41.3 50 EN1= HI, EN2=HI, VIN = 10 V, TJ= 85°C 99.8 200 CE = LO, VIN = 6 V, no load on OUT pin, VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI) 1.1 1.5 mA 300 475 mV 50 100 mV μA POWER PATH VDO(IN-OUT) VIN – VOUT VIN = 4.3 V, IIN = 1 A, VBAT = 4.2 V VDO(BAT-OUT) VBAT – VOUT IOUT = 1 A, VIN = 0 V, VBAT > 3 V OUT pin voltage regulation (BQ24072) VO(REG) IINmax VIN > VOUT + VDO(IN-OUT), VBAT < 3.2 V 3.3 3.4 3.5 VIN > VOUT + VDO(IN-OUT), VBAT ≥ 3.2 V VBAT + 150mV VBAT + 225mV VBAT + 270mV 4.5 OUT pin voltage regulation (BQ24073, BQ24074) VIN > VOUT + VDO(IN-OUT) 4.3 4.4 OUT pin voltage regulation (BQ24075, BQ24079) VIN > VOUT + VDO(IN-OUT) 5.4 5.5 5.6 EN1 = LO, EN2 = LO 90 95 100 EN1 = HI, EN2 = LO 450 475 500 Maximum input current EN2 = HI, EN1 = LO 1500 1610 1720 ILIM = 200 mA to 500 mA 1330 1525 1720 Maximum input current factor IINmax Programmable input current limit range VIN-DPM Input voltage threshold when input current is reduced EN2 = LO, EN1 = X Output voltage threshold when charging current is reduced EN2 = HI, EN1 = LO, RILIM = 8 kΩ to 1.1 kΩ (’72, ’73, ’74) 200 1500 mA 4.5 4.63 V VO(REG) – 180mV VO(REG) – 100mV VO(REG) – 30mV V 4.3 4.4 V (’75, '79) 4.2 VBSUP1 Enter battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω → 2 Ω VBSUP2 Exit battery supplement mode VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω → 10 Ω VOUT ≥ VBAT– 20mV VO(SC1) Output short-circuit detection threshold, power-on VIN > VUVLO and VIN > VBAT + VIN(DT) 0.8 0.9 1 VO(SC2) Output short-circuit detection threshold, supplement mode VBAT – VOUT > VO(SC2) indicates short-circuit VIN > VUVLO and VIN > VBAT + VIN(DT) 200 250 300 tDGL(SC2) Deglitch time, supplement mode short circuit tREC(SC2) Recovery time, supplement mode short circuit Submit Document Feedback AΩ 4.35 VOUT ≤ VBAT – 40mV 12 mA A ILIM = 500 mA to 1.5 A KILIM VDPPM KILIM/RILIM V V V V mV 250 μs 60 ms Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.5 Electrical Characteristics (continued) Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT BATTERY CHARGER IBAT Source current for BAT pin short-circuit detection VBAT = 1.5 V VBAT(SC) BAT pin short-circuit detection threshold VBAT rising Battery charge voltage VLOWV Pre-charge to fast-charge transition threshold tDGL1(LOWV) Deglitch time on pre-charge to fast-charge transition tDGL2(LOWV) Deglitch time on fast-charge to pre-charge transition mA 2 V 4.16 4.20 4.23 ('79) 4.059 4.100 4.141 VIN > VUVLO and VIN > VBAT + VIN(DT) 2.9 3 3.1 25 Battery fast charge current CE = LO, EN1= LO, EN2 = HI, VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, no load on OUT pin, thermal loop and DPPM loop not active Fast charge current factor IPRECHG Pre-charge current KPRECHG Pre-charge current factor 1500 KISET/RISET IBIAS(ITERM) Current for external termination-setting resistor ITERM Termination current threshold (externally set) (BQ24074) K Factor for termination detection threshold (externally set) (BQ24074) 890 975 AΩ AΩ A 70 88 106 CE = LO, (EN1, EN2) ≠ (LO, LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active 0.09×ICHG 0.1×ICHG 0.11×ICHG CE = LO, (EN1, EN2) = (LO, LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active 0.027×ICHG A VIN > VUVLO and VIN > VBAT + VIN(DT) 72 0.033×ICHG 0.040×ICHG 75 78 KITERM × RITERM / RISET 0.0225 0.0300 0.0375 USB100 mode (EN1, EN2) = (LO, LO), CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active 0.008 0.0100 0.012 A Deglitch time, termination detected 25 Recharge detection threshold tDGL(RCH) Deglitch time, recharge threshold detected VIN > VUVLO and VIN > VBAT + VIN(DT) tDGL(NO-IN) Delay time, input power loss to OUT LDO turn-off VBAT = 3.6 V. Time measured from VIN: 5 V → 3 V 1 μs fall-time IBAT(DET) Sink current for battery detection VBAT = 2.5 V tDET Battery detection timer BAT high or low μA A USB500 or ISET mode(EN1, EN2) ≠ (LO, LO) CE = LO, VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and thermal loop not active VRCH mA A KPRECHG/RISET Termination comparator detection threshold (internally set) V ms 100 797 V ms 25 VBAT(REG) > VBAT > VLOWV, VIN = 5 V CE = LO, EN1 = LO, EN2 = HI KISET tDGL(TERM) 11 1.8 Battery fast charge current range ICHG KITERM 7.5 ('72, '73, '74, '75) VBAT(REG) ITERM 4 1.6 VBAT(REG) – 140mV 5 ms VBAT(REG) – VBAT(REG) – 100mV 60mV V 62.5 ms 20 ms 7.5 10 250 mA ms BATTERY CHARGING TIMERS tPRECHG Pre-charge safety timer value TMR = floating 1440 1800 2160 s tMAXCHG Charge safety timer value TMR = floating 14400 18000 21600 s tPRECHG Pre-charge safety timer value 18 kΩ < RTMR < 72 kΩ RTMR × KTMR tMAXCHG Charge safety timer value 18 kΩ < RTMR < 72 kΩ 10×R TMR ×KTMR KTMR Timer factor 36 48 s s 60 s/kΩ BATTERY-PACK NTC MONITOR(1) INTC NTC bias current VIN > UVLO and VIN > VBAT + VIN(DT) VHOT High temperature trip point Battery charging, VTS Falling VHYS(HOT) Hysteresis on high trip point Battery charging, VTS Rising from VHOT VCOLD Low temperature trip point Battery charging, VTS Rising VHYS(COLD) Hysteresis on low trip point Battery charging, VTS Falling from VCOLD tDGL(TS) Deglitch time, pack temperature fault detection TS fault detected to charger disable VDIS(TS) TS function disable threshold (BQ24072, BQ24073) TS unconnected 72 75 78 μA 270 300 330 mV 2000 2100 30 mV 2200 mV 300 mV 50 ms VIN - 200mV V 125 °C 155 °C 20 °C THERMAL REGULATION TJ(REG) Temperature regulation limit TJ(OFF) Thermal shutdown temperature TJ(OFF-HYS) Thermal shutdown hysteresis TJ Rising Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 13 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.5 Electrical Characteristics (continued) Over junction temperature range (0° ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD VIL Logic LOW input voltage 0 0.4 VIH Logic HIGH input voltage 1.4 6 V V IIL Input sink current VIL= 0 V 1 μA IIH Input source current VIH= 1.4 V 10 μA ISINK = 5 mA 0.4 V LOGIC LEVELS ON PGOOD, CHG VOL (1) Output LOW voltage These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC with an R25 of 10 kΩ. 8.6 Typical Characteristics VIN = 6 V, EN1=1, EN2=0, BQ24073 application circuit, TA = 25°C, unless otherwise noted. 600 0.7 500 0.6 Dropout Voltage - VIN-VOUT IBAT - mA IL = 1 A 400 300 200 100 0 0.5 0.4 0.3 0.2 0.1 120 125 130 135 Temperature - oC 140 0 145 Figure 8-1. Thermal Regulation 0 25 100 50 75 TJ - Junction Temperature - °C 125 Figure 8-2. Dropout Voltage vs Temperature 4.6 120 VIN = 5 V IL = 1 A 4.4 80 VO - Output Voltage - V Dropout Voltage - VBAT-VOUT 100 VBAT = 3 V 60 VBAT = 3.9 V 40 20 4 3.8 3.6 3.4 3.2 3 0 0 50 75 100 25 TJ - Junction Temperature - °C 125 Figure 8-3. Dropout Voltage vs Temperature No Input Supply 14 4.2 Submit Document Feedback 2 2.5 3 3.5 4 VBAT - Battery Voltage - V 4.5 Figure 8-4. BQ24072 Output Regulation Voltage vs Battery Voltage Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.6 Typical Characteristics (continued) VIN = 6 V, EN1=1, EN2=0, BQ24073 application circuit, TA = 25°C, unless otherwise noted. 4.45 3.80 VIN = 5 V, VBAT = 3.5 V, IL = 1 A 3.78 VO - Output Voltage - V VO - Output Voltage - V 3.76 VIN = 5 V, IL = 1 A 4.43 3.74 3.72 3.70 3.68 3.66 3.64 4.40 4.38 4.35 4.33 3.62 4.30 3.60 0 25 50 75 100 0 125 Figure 8-5. BQ24072 Output Regulation Voltage vs Temperature 100 125 4.210 VIN = 6 V, IL = 1 A VBAT - Regulation Voltage - V 5.65 VO - Output Voltage - V 75 Figure 8-6. BQ24073/ 74 Output Regulation Voltage vs Temperature 5.75 5.70 50 25 TJ - Junction Temperature - °C TJ - Junction Temperature - °C 5.60 5.55 5.50 5.45 5.40 5.35 4.205 4.200 4.195 4.190 4.185 5.30 5.25 0 25 50 75 100 TJ - Junction Temperature - °C 4.180 0 125 15 20 25 30 Figure 8-8. BAT Regulation Voltage vs Temperature 6.70 10.70 10.5 V 6.6 V VOVP - Output Voltage Threshold - V VOVP - Output Voltage Threshold - V 10 TJ - Junction Temperature - °C Figure 8-7. BQ24075, BQ24079 Output Regulation Voltage vs Temperature 6.65 VI Rising 6.60 6.55 VI Falling 6.50 6.45 0 5 10.65 10.60 VI Rising 10.55 10.50 10.45 VI Falling 10.40 10.35 10.30 10.25 10.20 25 50 75 100 TJ - Junction Temperature - °C 125 Figure 8-9. BQ24072/ 73/ 75/ 79 Overvoltage Protection Threshold vs Temperature 0 25 75 50 100 TJ - Junction Temperature - °C 125 Figure 8-10. BQ24074 Overvoltage Protection Threshold vs Temperature Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 15 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 8.6 Typical Characteristics (continued) VIN = 6 V, EN1=1, EN2=0, BQ24073 application circuit, TA = 25°C, unless otherwise noted. 1.05 800 RISET = 900 W RILIM IBAT - Fast Charge Current - A ILIM - Input Current - mA 700 600 500 USB500 400 300 200 USB100 1.03 1.01 0.99 0.97 100 0 0.95 5 6 7 8 9 VI - Input Voltage - V 10 3 Figure 8-11. BQ24074 Input Current Limit vs Input Voltage 3.6 3.8 4 3.4 VBAT - Battery Voltage - V 4.2 Figure 8-12. Fastcharge Current vs Battery Voltage 105 310 RISET = 3 kW RISET = 900 W 104 305 IBAT - Precharge Current - A IBAT - Fast Charge Current - A 3.2 300 295 290 285 103 102 101 100 99 98 97 96 280 95 3 3.2 3.4 3.6 3.8 4 VBAT - Battery Voltage - V 2 4.2 2.2 2.4 2.6 2.8 3 VBAT - Battery Voltage - V Figure 8-13. Fastcharge Current vs Battery Voltage Figure 8-14. Precharge Current vs Battery Voltage 31.5 RISET = 3 kW IBAT - Precharge Current - A 31 30.5 30 29.5 29 28.5 2 2.2 2.4 2.6 2.8 VBAT - Battery Voltage - V 3 Figure 8-15. Precharge Current vs Battery Voltage 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 9 Detailed Description 9.1 Overview The BQ2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted at space-limited portable applications. The device powers the system while simultaneously and independently charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for proper charge termination and enables the system to run with a defective or absent battery pack. This feature also allows instant system turn-on even with a totally discharged battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path Management (DPPM), which shares the source current between the system and battery charging, and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below a threshold, thus preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 17 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 9.2 Functional Block Diagram 250mV VO(SC1) VBAT OUT-SC1 t DGL(SC2) OUT-SC2 Q1 IN OUT EN2 Short Detect 225mV Precharge VIN-DPM USB100 USB500 ILIM ISET 2.25V Fastcharge TJ VREF-ILIM USB-susp TJ(REG) Short Detect V DPPM V O(REG) V OUT EN2 EN1 Q2 V BAT (REG) VBAT BAT VOUT CHARGEPUMP I BIAS- ITERM 40mV VLOWV 225mV (’72, ’73, ’75) ITERM BQ24074 VRCH ~3V SYSOFF BQ24075 BQ24079 Supplement VBAT(SC) tDGL(RCH) tDGL2(LOWV) VIN tDGL1(LOWV) tDGL(TERM) I TERM-floating BAT-SC VBAT + VIN-DT tDGL(NO-IN) t DGL(PGOOD) V UVLO INTC V HOT Charge Control TS t DGL(TS) VCOLD V OVP tBLK(OVP) VDIS(TS) EN1 EN2 USB Suspend TD (BQ24072, BQ24073) CE CHG Halt timers VIPRECHG VICHG Dynamically Controlled Oscillator Reset timers PGOOD V ISET Fast-Charge Timer Timer fault TMR Pre-Charge Timer ~100mV 18 Timers disabled Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 9.3 Feature Description 9.3.1 Undervoltage Lockout (UVLO) The BQ2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage threshold (UVLO). During the power down mode the host commands at the control inputs ( CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. 9.3.2 Power On When VIN exceeds the UVLO threshold, the BQ2407x powers up. While VIN is below VBAT + VIN(DT), the host commands at the control inputs ( CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1, and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT. When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins. If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a short circuit at OUT. When VOUT is above VO(SC1), the FET Q1 switches to the current limit threshold set by EN1, EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as well as the input voltage conditions. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 19 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 PGOOD = Hi-Z CHG = Hi-Z BATTFET ON UVLO VOVP for a period long than tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance. Once the OVP condition is removed, a new power on sequence starts (see Section 9.3.2). The safety timers are reset and a new charge cycle will be indicated by the CHG output. 9.3.4 Dynamic Power Path Management The BQ2407x features an OUT output that powers the external load connected to the battery. This output is active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a source connected to IN to charge the battery and a battery source only. 9.3.4.1 Input Source Connected (ADAPTER or USB) With a source connected, the dynamic power path management (DPPM) circuitry of the BQ2407x monitors the input current continuously. The OUT output for the BQ24073/ 74/ 75/ 79 is regulated to a fixed voltage (VO(REG)). For the BQ24072, OUT is regulated to 200 mV above the voltage at BAT. When the BAT voltage falls below 3.2 V, OUT is clamped to 3.4 V. This allows for proper startup of the system load even with a discharged battery. The current into IN is shared between charging the battery and powering the system load at OUT. The BQ2407x has internal selectable current limits of 100 mA (USB100) and 500 mA (USB500) for charging from USB ports, as well as a resistor-programmable input current limit. USB100 Current Limit The BQ2407x is USB IF compliant for the inrush current testing. The USB specification allows up to 10 μF to be hard started, which establishes 50 μC as the maximum inrush charge value when exceeding 100 mA. The input current limit for the BQ2407x prevents the input current from exceeding this limit, even with system capacitances greater than 10 μF. The input capacitance to the device must be selected small enough to prevent a violation ( VLOWV No tPRECHARGE Elapsed? Yes End Charge Flash CHG Start Fastcharge ICHARGE set by ISET No IBAT < ITERM No t FASTCHARGE Elapsed? Yes End Charge Flash CHG Charge Done CHG = Hi-Z TD = Low (’72, ’73 Only) (’74, ’75 = YES) No Yes Termination Reached BATTFET Off Wait for VBAT < VRCH No VBAT < VRCH Yes Run Battery Detection Battery Detected? No Yes Figure 9-7. Battery Charging Flow Diagram 26 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 9.3.5.2 Adjustable Termination Threshold (ITERM Input, BQ24074) The termination current threshold in the BQ24074 is user-programmable. Set the termination current by connecting a resistor from ITERM to VSS. For USB100 mode (EN1 = EN2 = Low), the termination current value is calculated as: ITERM = 0.01 × RITERM/ RISET (4) In the other input current limit modes (EN1 ≠ EN2), the termination current value is calculated as: ITERM = 0.03 × RITERM/ RISET (5) The termination current is programmable up to 50% of the fastcharge current. The RITERM resistor must be less than 15 kΩ. Leave ITERM unconnected to select the default internally set termination current. 9.3.5.3 Termination Disable (TD Input, BQ24072, BQ24073) The BQ24072 and BQ24073 contain a TD input that allows termination to be enabled/ disabled. Connect TD to a logic high to disable charge termination. When termination is disabled, the device goes through the pre-charge, fast-charge and CV phases, then remains in the CV phase. During the CV phase, the charger maintains the output voltage at BAT equal to VBAT(REG), and charging current does not terminate. The charge current is set by ICHG or IINmax, whichever is less. Battery detection is not performed. The CHG output is high impedance once the current falls below ITERM and does not go low until the input power or CE are toggled. When termination is disabled, the pre-charge and fast-charge safety timers are also disabled. Battery pack temperature sensing (TS pin functionality) is disabled if the TD pin is high and the TS pin is unconnected or pulled up to VIN. 9.3.5.4 Battery Detection and Recharge The BQ2407x automatically detects if a battery is connected or removed. Once a charge cycle is complete, the battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection routine is run. During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the voltage on BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT < VRCH, then the protector closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be missing and the detection routine continues. 9.3.5.5 Battery Disconnect (SYSOFF Input, BQ24075, BQ24079) The BQ24075 and BQ24079 feature a SYSOFF input that allows the user to turn the FET Q2 off and disconnect the battery from the OUT pin. This is useful for disconnecting the system load from the battery, factory programming where the battery is not installed or for host side impedance track fuel gauging, such as bq27500, where the battery open circuit voltage level must be detected before the battery charges or discharges. The /CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal operation. SYSOFF is internally pulled to VBAT through ~5 MΩ resistor. 9.3.5.6 Dynamic Charge Timers (TMR Input) The BQ2407x devices contain internal safety timers for the pre-charge and fast-charge phases to prevent potential damage to the battery and the system. The timers begin at the start of the respective charge cycles. The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated using the following equation: tPRECHG = KTMR × RTMR (6) tMAXCHG = 10 × KTMR × RTMR (7) Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS. Reset the timers by toggling the CE pin, or by toggling EN1, EN2 pin to put the device in and out of USB suspend mode (EN1 = HI, EN2 = HI). Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 27 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally to the charge current when the device enters thermal regulation. For the BQ24072 and BQ24073, the timers are disabled when TD is connected to a high logic level. During the fast charge phase, several events increase the timer durations. • The system load current activates the DPPM loop which reduces the available charging current • The input current is reduced because the input voltage has fallen to VIN-DPM • The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG) During each of these events, the internal timers are slowed down proportionately to the reduction in charging current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half the frequency and the counter counts half as fast resulting in only one minute of "counting" time. If the pre charge timer expires before the battery voltage reaches VLOWV, the BQ2407x indicates a fault condition. Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is indicated. The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event. 9.3.5.7 Status Indicators ( PGOOD, CHG) The BQ2407x contains two open-drain outputs that signal its status. The PGOOD output signals when a valid input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is outside of this range, PGOOD is high impedance. The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG pin on (low - LED on), whereas all refresh (subsequent) charges will result in the CHG pin off (open - LED off). In addition, the CHG signals timer faults by flashing at approximately 2 Hz. Table 9-1. PGOOD Status Indicator INPUT STATE PGOOD OUTPUT VIN < VUVLO High-impedance VUVLO < VIN < VBAT + VIN(DT) High-impedance VBAT + VIN(DT) < VIN < VOVP Low VIN > VOVP High-impedance Table 9-2. CHG Status Indicator CHARGE STATE Charging Charging suspended by thermal loop Safety timers expired CHG OUTPUT Low (for first charge cycle) Flashing at 2 Hz Charging done Recharging after termination IC disabled or no valid input power High-impedance Battery absent 9.3.5.8 Thermal Regulation and Thermal Shutdown The BQ2407x contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds TJ(REG), the device automatically reduces the charging current to prevent the die temperature from increasing further. In some cases, the die temperature continues to rise despite the operation of the thermal loop, particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a "hiccup" mode. During thermal regulation, the safety timers are slowed down proportionately to the reduction in current limit. 28 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 Note that this feature monitors the die temperature of the BQ2407x. This is not synonymous with ambient temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is shown in Figure 9-8. Battery termination is disabled during thermal regulation. PRECHARGE THERMAL REGULATION CC FAST CHARGE CV TAPER DONE VO(REG) IO(CHG) Battery Voltage Battery Current V(LOWV) HI-z I(PRECHG) I(TERM) TJ(REG) IC Junction Temperature, TJ Figure 9-8. Charge Cycle Modified by Thermal Loop 9.3.6 Battery Pack Temperature Monitoring The BQ2407x features an external battery pack temperature monitoring input. The TS input connects to the NTC thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature conditions. During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers maintain their values but suspend counting. When the voltage measured at TS returns to within the operation window, charging is resumed and the timers continue counting. When charging is suspended due to a battery pack temperature fault, the CHG pin remains low and continues to indicate charging. For the BQ24072 and BQ24073, battery pack temperature sensing is disabled when termination is disabled (TD = High) and the voltage at TS is greater than VDIS(TS). For applications that do not require the TS monitoring function, connect a 10-kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain charging. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 29 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 The allowed temperature range for 103AT-2 type thermistor is 0°C to 50°C. However, the user may increase the range by adding two external resistors. See Figure 9-9 for the circuit details. The values for Rs and Rp are calculated using the following equations: æ ì üö VH ´ VC 2 ´ (RTC - RTH )ý ÷ çç (RTH +RTC ) - 4 íRTH ´ RTC + ÷ (VH - VC ) ´ ITS î þø è 2 -(RTH + RTC ) ± Rs = Rp = (8) VH ´ (R TH + RS ) ITS ´ (R TH + RS ) - VH (9) where • • • • • • RTH: Thermistor Hot Trip Value found in thermistor data sheet RTC: Thermistor Cold Trip Value found in thermistor data sheet VH: IC's Hot Trip Threshold = 0.3 V nominal VC: IC's Cold Trip Threshold = 2.1 V nominal ITS: IC's Output Current Bias = 75 µA nominal NTC Thermsitor Semitec 103AT-4 Rs and Rp 1% values were chosen closest to calculated values in Table 9-3. Table 9-3. Calculated Values COLD TEMP RESISTANCE AND HOT TEMP RESISTANCE AND TRIP THRESHOLD; Ω (°C) TRIP THRESHOLD; Ω (°C) EXTERNAL BIAS RESISTOR, Rs (Ω) EXTERNAL BIAS RESISTOR, Rp (Ω) 0 ∞ 28000 (–0.6) 4000 (51) 28480 (–1) 3536 (55) 487 845000 28480 (–1) 3021 (60) 1000 549000 33890 (–5) 4026 (51) 76.8 158000 33890 (–5) 3536 (55) 576 150000 33890 (–5) 3021 (60) 1100 140000 RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively. The temperature window cannot be tightened more than using only the thermistor connected to TS, it can only be extended. Figure 9-9. Extended TS Pin Thresholds 30 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 9.4 Device Functional Modes 9.4.1 Sleep Mode When the input is between UVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for >20 mS the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will not discharge the battery, other than the leakage on the BAT pin. If one has a full 1000-mAHr battery and the leakage is 10 μA, then it would take 1000 mAHr / 10 μA = 100000 hours (11.4 years) to discharge the battery. The self-discharge of the battery is typically five times higher than this. 9.4.2 Explanation of Deglitch Times and Comparator Hysteresis Note Figure 9-10 to Figure 9-14 are not to scale. VOVP VOVP - Vhys(OVP) VIN Typical Input Voltage Operating Range t < tDGL(OVP) VBAT + VIN(DT) VBAT + VIN(DT) - Vhys(INDT) UVLO UVLO - Vhys(UVLO) PGOOD tDGL(PGOOD) tDGL(OVP) tDGL(NO-IN) tDGL(PGOOD) Figure 9-10. Power-Up, Power-Down, Power Good Indication tDGL1(LOWV) VBAT VLOWV t < tDGL1(LOWV) tDGL1(LOWV) tDGL2(LOWV) ICHG Fast-Charge Fast-Charge IPRE-CHG t < tDGL2(LOWV) Pre-Charge Pre-Charge Figure 9-11. Precharge to Fast-Charge, Fast- to Pre-Charge Transition – tDGL1(LOWV), tDGL2(LOWV) Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 31 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 VBAT VRCH Re-Charge t < tDGL(RCH) tDGL(RCH) Figure 9-12. Recharge – tDGL(RCH) Turn Q2 OFF Force Q2 ON tREC(SC2) Turn Q2 OFF tREC(SC2) Force Q2 ON VBAT - VOUT Recover VO(SC2) t < tDGL(SC2) tDGL(SC2) tDGL(SC2) t < tDGL(SC2) Figure 9-13. OUT Short-Circuit – Supplement Mode VCOLD VCOLD - Vhys(COLD) t < tDGL(TS) VTS Suspend Charging tDGL(TS) Resume Charging VHOT - Vhys(HOT) VHOT Figure 9-14. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 10 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 10.1 Application Information The BQ2407x devices power the system while simultaneously and independently charging the battery. The input power source for charging the battery and running the system can be an AC adapter or a USB port. The devices feature dynamic power-path management (DPPM), which shares the source current between the system and battery charging and automatically reduces the charging current if the system load increases. When charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current limit if the input voltage falls below a threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to supplement the system current requirements when the adapter cannot deliver the peak system currents. The BQ2407x is configurable to be host controlled for selecting different input current limits based on the input source connected, or a fully stand alone device for applications that do not support multiple types of input sources. 10.2 Typical Application VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C, 6.25-hour Fastcharge Safety Timer R5 1.5 kW R4 1.5 kW DC+ PGOOD Adaptor IN C1 1 mF GND CHG SYSTEM OUT C2 4.7 mF VSS BQ24072 BQ24073 HOST EN2 EN1 TS TD CE BAT R1 46.4 kW ISET TMR PACK- ILM PACK+ TEMP C3 4.7 mF R2 1.18 kW R3 1.13 kW Figure 10-1. Using BQ24072/ BQ24073 in a Host-Controlled Charger Application Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 33 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 10.2.1 Design Requirements • • • • • • Supply voltage = 5 V Fast charge current of approximately 800 mA; ISET - pin 16 Input Current Limit =1.3 A; ILIM - pin 12 Termination Current Threshold = 110 mA; ITERM – pin 15 (BQ24074 only) Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14 TS – Battery Temperature Sense = 10 kΩ NTC (103AT-2) 10.2.2 Detailed Design Procedure 10.2.2.1 BQ2407x Charger Design Example See Figure 10-1 to Figure 10-13 for Schematics of the Design Example. 10.2.2.1.1 Termination Disable (TD) (BQ24072, BQ24073 only) Connect TD high to disable termination. Connect TD low to enable termination. 10.2.2.1.2 System ON/OFF (SYSOFF) (BQ24075 or BQ24079 only) Connect SYSOFF high to disconnect the battery from the system load. Connect SYSOFF low for normal operation 10.2.2.2 Calculations 10.2.2.2.1 Program the Fast Charge Current (ISET): RISET = KISET / ICHG KISET = 890 AΩ from the electrical characteristics table. RISET = 890 AΩ / 0.8 A = 1.1125 kΩ Select the closest standard value, which for this case is 1.13 kΩ. Connect this resistor between ISET (pin 16) and VSS. 10.2.2.2.2 Program the Input Current Limit (ILIM) RILIM = KILIM / II_MAX KILIM = 1550 AΩ from the electrical characteristics table. RISET = 1550 AΩ / 1.3 A = 1.192 kΩ Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12) and VSS. 10.2.2.2.3 Program the Termination Current Threshold (ITERM) (BQ24074 only) RITERM = ITERM × RISET / 0.030 RISET = 1.13 kΩ from the above calculation. RITERM = 110 mA × 1.13 kΩ / 0.030 = 4.143 kΩ Select the closest standard value, which for this case is 4.12 kΩ. Connect this resistor between ITERM (pin 15) and VSS. Note that when in USB100 mode (EN1 = EN2 = VSS), the termination threshold is 1/3 of the normal threshold. 10.2.2.2.4 Program 6.25-hour Fast-Charge Safety Timer (TMR) RTMR = tMAXCHG / (10 × KTMR ) KTMR = 48 s/kΩ from the electrical characteristics table. RTMR = (6.25 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 46.8 kΩ Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 14) and VSS. 34 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 10.2.2.3 TS Function Use a 10-kΩ NTC thermistor in the battery pack (103AT-2). For applications that do not require the TS monitoring function, connect a 10-kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain charging. 10.2.2.4 CHG and PGOOD LED Status: Connect a 1.5-kΩ resistor in series with a LED between OUT and CHG to indicate charging status. Connect a 1.5-kΩ resistor in series with a LED between OUT and PGOOD to indicate when a valid input source is connected. Processor Monitoring Status: Connect a pullup resistor (on the order of 100 kΩ) between the power rail of the processor and CHG and PGOOD. 10.2.2.5 Selecting IN, OUT, and BAT Pin Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input, output and battery pins. Using the values shown on the application diagram, is recommended. After evaluation of these voltage signals with real system operational conditions, one can determine if capacitance values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast high amplitude pulsed load applications. Note if designed high input voltage sources (bad adaptors or wrong adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer). Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 35 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 10.2.3 Application Curves VIN 5 V/div VCHG 5 V/div Charging Initiated VOUT 4.4 V 1 A/div 500 mV/div VBAT 3.6 V IBAT VPGOOD 5 V/div 2 V/div VBAT Battery Inserted 500 mA/div IBAT Battery Detection Mode 4 ms/div 400 ms/div Figure 10-3. Battery Detection Battery Inserted RLOAD = 10 Ω Figure 10-2. Adapter Plug-In Battery Connected VCHG 5 V/div IOUT 500 mA/div IBAT 500 mA/div VOUT 4.4 V 200 mV/div 1 A/div IBAT VBAT 2 V/div Battery Removed Battery Detection Mode 400 ms/div 400 ms/div Figure 10-4. Battery Detection Battery Removed RLOAD = 20 Ω to 9 Ω Figure 10-5. Entering and Exiting DPPM Mode IOUT IBAT Supplement Mode 1 A/div IOUT 500 mA/div IBAT 1 A/div Supplement Mode VOUT 3.825 V VOUT 4.4 V VBAT 3.8 V 500 mV/div 200 mV/div VBAT 3.6 V Tracking to VBAT +225 mV 1 ms/div 1 ms/div 36 500 mA/div RLOAD = 25 Ω to 4.5 Ω RLOAD = 20 Ω to 4.5 Ω Figure 10-6. Entering and Exiting Battery Supplement Mode BQ24074 Figure 10-7. Entering and Exiting Battery Supplement Mode BQ24072 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 VCE 5 V/div VCHG 5 V/div 1 V/div VBAT 3.6 V IBAT Mandatory Precharge 500 mA/div 10 V/div VIN VOUT 4.4 V VBAT 4.2 V 500 mV/div IBAT 1 A/div 10 ms/div 40 ms/div Figure 10-8. Charger ON/OFF Using CE VIN = 6 V to 15 V RLOAD = 10 Ω Figure 10-9. OVP Fault VSYSOFF VOUT 5.5 V 5 V/div VSYSOFF 2 V/div VBAT 4V VBAT 4V 5 V/div 2 V/div VOUT Battery Powering System 500 mA/div System Power Off IBAT IBAT 400 ms/div Figure 10-10. System ON/OFF With Input Connected VIN = 6 V BQ24075, BQ24079 500 mA/div 4 ms/div Figure 10-11. System ON/OFF With Input Not Connected VIN = 0 V BQ24075, BQ24079 Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 37 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 10.3 System Examples 10.3.1 Standalone Charger VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, ITERM = 110 mA, Battery Temperature Charge Range = 0°C to 50°C, Safety Timers disabled. R4 1.5 kW R5 1.5 kW DC+ PGOOD Adaptor IN C1 1 mF GND CHG SYSTEM OUT C2 4.7 mF VSS BQ24074 EN2 EN1 TS TMR CE ILM ITERM PACK+ TEMP R1 4.12 kW PACK- ISET BAT C3 4.7mF R2 1.18 kW R3 1.13 kW Figure 10-12. Using BQ24074 in a Standalone Charger Application 10.3.2 Disconnecting the Battery From the System VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C, 6.25 hour Fastcharge Safety Timer. R4 1.5 kW R5 1.5 kW SYSTEM IN C1 1 mF GND CHG DC+ PGOOD Adaptor OUT C2 4.7 mF VSS BQ24075 BQ24079 HOST EN2 EN1 TS SYSOFF CE BAT R1 46.4 kW ISET TMR PACK- ILM PACK+ TEMP C3 4.7 mF R2 1.18 kW R3 1.13 kW Figure 10-13. Using BQ24075 or BQ24079 to Disconnect the Battery From the System 38 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 11 Power Supply Recommendations Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the battery voltage during part of the cycle. To enable operation with adapters under those conditions, the BQ2407x family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input from dropping out. Additional input capacitance may be needed. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 39 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 12 Layout 12.1 Layout Guidelines • • • • 40 To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter capacitors from OUT to GND (thermal pad) should be placed as close as possible to the BQ2407x, with short trace runs to both IN, OUT and GND (thermal pad). All low-current GND connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces The BQ2407x family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full PCB design guidelines for this package are provided in the QFN/SON PCB Attachment Application Note. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 12.2 Layout Example Figure 12-1. Layout Schematic Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 41 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 12.3 Thermal Considerations The BQ24072/3/4/5 family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the QFN/SON PCB Attachment Application Note. The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: θJA = (TJ - T) / P (10) where • • • TJ = chip junction temperature T = ambient temperature P = device power dissipation Factors that can influence the measurement and calculation of θJA include: • • • • • Whether or not the device is board mounted Trace size, composition, thickness, and geometry Orientation of the device (horizontal or vertical) Volume of the ambient air surrounding the device under test and airflow Whether other surfaces are in close proximity to the device being tested Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of time. The fast charge current will start to taper off if the part goes into thermal regulation. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal PowerFET. It can be calculated from the following equation when a battery pack is being charged : P = [V(IN) – V(OUT)] × [I(OUT) + I(BAT)] + [V(OUT) – V(BAT)] × I(BAT) (11) The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop is always active. 42 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 BQ24072, BQ24073, BQ24074, BQ24075, BQ24079 www.ti.com SLUS810N – SEPTEMBER 2008 – REVISED OCTOBER 2021 13 Device and Documentation Support 13.1 Device Support 13.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 13.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 13.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 13.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 13.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 13.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ24072 BQ24073 BQ24074 BQ24075 BQ24079 Submit Document Feedback 43 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) BQ24072RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CKP BQ24072RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CKP BQ24073RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ BQ24073RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ BQ24073RGTTG4 ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CKQ BQ24074RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK) BQ24074RGTRG4 ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK) BQ24074RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 (BZF, NXK) BQ24075RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU BQ24075RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CDU BQ24079RGTR ACTIVE VQFN RGT 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 ODI BQ24079RGTT ACTIVE VQFN RGT 16 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 ODI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of