BQ24091, BQ24092, BQ24093, BQ24095, BQ24090
BQ24091, SLUS968H
BQ24092,
BQ24093,
BQ24095,
– JANUARY
2010
– REVISED BQ24090
APRIL 2021
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SLUS968H – JANUARY 2010 – REVISED APRIL 2021
BQ2409x 1-A, Single-Input, Single-Cell Li-Ion and Li-Pol Battery Chargers
1 Features
2 Applications
•
•
•
•
•
•
•
Charging
– 1% charge voltage accuracy
– 10% charge current accuracy
– Pin selectable USB 100-mA and 500-mA
maximum input current limit
– Programmable termination and precharge
threshold
Protection
– 6.6-V overvoltage protection
– Input voltage dynamic power management
– 125°C thermal regulation; 150°C thermal
shutdown protection
– OUT short-circuit protection and ISET short
detection
– Operation over JEITA range via battery NTC
– ½ fast-charge-current at cold, 4.06 V at hot,
BQ092/3
– Fixed 10-hour safety timer
System
– Automatic Termination and Timer Disable Mode
(TTDM) for absent battery pack with thermistor
– Status indication – charging/done
– Available in a small 10-pin MSOP package
Smart phones
PDAs
MP3 players
Low-power handheld devices
3 Description
The BQ2409x series of devices are highly integrated
Li-ion and Li-Pol linear chargers devices targeted
at space-limited portable applications. The devices
operate from either a USB port or AC adapter.
The high input voltage range with input overvoltage
protection supports low-cost unregulated adapters.
The BQ2409x has a single power output that charges
the battery. A system load can be placed in parallel
with the battery as long as the average system load
does not keep the battery from charging fully during
the 10-hour safety timer.
The battery is charged in three phases: conditioning,
constant current and constant voltage. In all charge
phases, an internal control loop monitors the IC
junction temperature and reduces the charge current
if an internal temperature threshold is exceeded.
Device Information(1)
PART NUMBER
BQ2409x
(1)
PACKAGE
BODY SIZE (NOM)
HVSSOP (10)
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
1.5kW
BQ2409x
Adaptor
1 IN
DC+
OUT 10
1.5kW
GND
1mF
1kW
2 ISET
TS 9
3 VSS
CHG 8
System Load
Battery Pack
++
1mF
4 PRETERM ISET2 7
OR
5 PG
NC 6
VDD
2kW
TTDM
USB Port
ISET/100/500mA
VBUS
GND
GND
D+
D+
D-
Disconnect after Detection
D-
Host
An©IMPORTANT
NOTICEIncorporated
at the end of this data sheet addresses availability, warranty, changes, use in
safety-critical
applications,
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2021 Texas Instruments
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SLUS968H – JANUARY 2010 – REVISED APRIL 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Description (continued).................................................. 4
6 Device Options................................................................ 5
7 Pin Configuration and Functions...................................5
8 Specifications.................................................................. 6
8.1 Absolute Maximum Ratings(1) .................................... 6
8.2 ESD Ratings............................................................... 6
8.3 Recommended Operating Conditions(1) .................... 7
8.4 Thermal Information....................................................7
8.5 Dissipation Ratings(1) (2) .............................................7
8.6 Electrical Characteristics.............................................7
8.7 Typical Characteristics.............................................. 12
9 Detailed Description......................................................15
9.1 Overview................................................................... 15
9.2 Functional Block Diagram......................................... 17
9.3 Feature Description...................................................18
9.4 Device Functional Modes..........................................24
10 Application and Implementation................................ 27
10.1 Application Information........................................... 27
10.2 Typical Application.................................................. 27
11 Power Supply Recommendations..............................30
12 Layout...........................................................................31
12.1 Layout Guidelines................................................... 31
12.2 Layout Example...................................................... 31
12.3 Thermal Considerations..........................................31
13 Device and Documentation Support..........................33
13.1 Device Support....................................................... 33
13.2 Receiving Notification of Documentation Updates..33
13.3 Support Resources................................................. 33
13.4 Trademarks............................................................. 33
13.5 Electrostatic Discharge Caution..............................33
13.6 Glossary..................................................................33
4 Revision History
Changes from Revision G (August 2015) to Revision H (April 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Changed the package size From: 5 x 3 mm2 To 3 x 3 mm2 in the Section 6 table.............................................5
• Changed IBD-SINK MIN value From: 7 mA to 6 mA in the Electrical Characteristics table................................... 7
• Changed IIH MAX value From: 8 μA to 9.5 μA in the Electrical Characteristics table.........................................7
Changes from Revision F (December 2014) to Revision G (August 2015)
Page
• Changed BQ24095 VO(REG) value From: 4.20 V To: 4.35 V in the Section 6 table ............................................5
Changes from Revision E (September 2013) to Revision F (December 2014)
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 1
Changes from Revision D (December 2012) to Revision E (September 2013)
Page
• Deleted the MARKING column from the ORDERING INFORMATION table, and added table note 1............... 4
Changes from Revision C (May 2012) to Revision D (December 2012)
Page
• Added bq24095 to the ORDERING INFORMATION table................................................................................. 4
• Changed BQ24090/2 to BQ24090/2/5 for TS pin description in Pin Functions table......................................... 5
• Changed the KISET entry in the Electrical Characteristics table..........................................................................7
• Deleted Line Regulation typical characteristics graph ..................................................................................... 13
• Changed Current Regulation Overtemperature graph to Load Regulation - BQ24095 graph..........................13
Changes from Revision B (June 2010) to Revision C (May 2012)
Page
• Changed all instances of Li-ion To: Li-ion and Li-Pol..........................................................................................1
Changes from Revision A (February 2010) to Revision B (June 2010)
Page
• Changed the device number on the front page circuit From: BQ24090 To: BQ2409x .......................................1
2
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•
SLUS968H – JANUARY 2010 – REVISED APRIL 2021
Changed the ORDERING INFORMATION table Marking column From: Product Preview To: bq24092 and
bq24093..............................................................................................................................................................4
Changes from Revision * (January 2010) to Revision A (February 2010)
Page
• Changed VDO(IN-OUT), MAX value From: 500 mV To: 520 mV in the Electrical Characteristics table ................ 7
• Changed IPRE-TERM MAX value From: 79 µA to 81µA in the Electrical Characteristics table............................. 7
• Changed VCLAMP(TS) MIN value From: 1900 mV to 1800 mV in the Electrical Characteristics table.................. 7
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5 Description (continued)
The charger power stage and charge current sense functions are fully integrated. The charger function has high
accuracy current and voltage regulation loops, charge status display, and charge termination. The pre-charge
current and termination current threshold are programmed via an external resistor. The fast charge current value
is also programmable via an external resistor.
4
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SLUS968H – JANUARY 2010 – REVISED APRIL 2021
6 Device Options
PART
NUMBER
VO(REG)
VOVP
JEITA
TS/CE
PG
PACKAGE
BQ24090
4.20 V
6.6 V
No
10 kΩ NTC
Yes
10 pin 3 x 3 mm2
BQ24091
4.20 V
6.6 V
No
100 kΩ NTC
Yes
10 pin 3 x 3 mm2
BQ24092
4.20 V
6.6 V
Yes
10 kΩ NTC
Yes
10 pin 3 x 3 mm2
BQ24093
4.20 V
6.6 V
Yes
100 kΩ NTC
Yes
10 pin 3 x 3 mm2
BQ24095
4.35 V
6.6 V
No
10 kΩ NTC
Yes
10 pin 3 x 3 mm2
7 Pin Configuration and Functions
BQ2409x
1 IN
OUT 10
2 ISET
TS 9
3 VSS
CHG 8
4 PRETERM ISET2 7
5 PG
NC 6
Figure 7-1. DGQ Package 10 Pins Top View
Table 7-1. Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
CHG
8
O
Low (FET on) indicates charging and Open Drain (FET off) indicates no charging or charge complete.
IN
1
I
Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass
capacitors 1 μF to 10 μF, connect from IN to VSS.
ISET
2
I
Programs the fast-charge current setting. External resistor from ISET to VSS defines fast charge current
value. Range is 10.8 kΩ (50 mA) to 540 Ω (1000 mA).
ISET2
7
I
Programming the input/output current limit for the USB or adaptor source:
high = 500 mA max, low = ISET, FLOAT = 100 mA max.
NC
6
OUT
10
O
Battery connection. System load may be connected. Average load should not be excessive, allowing
battery to charge within the 10 hour safety timer window. Expected range of bypass capacitors 1 μF to 10
μF.
PG
5
O
Low (FET on) indicates the input voltage is above UVLO and the OUT (battery) voltage.
PRE-TERM
4
I
Programs the current termination threshold (5 to 50% of Iout which is set by ISET) and sets the precharge current to twice the termination current level.
Expected range of programming resistor is 1 kΩ to 10 kΩ (2k: Ipgm/10 for term; Ipgm/5 for precharge).
NA Do not make a connection to this pin (for internal use) – do not route through this pin.
TS
9
I
Temperature sense pin connected to BQ24090/2/5 -10k at 25°C NTC thermistor and BQ24091/3 -100 k
at 25°C NTC thermistor, in the battery pack. Floating TS pin or pulling high puts part in TTDM Charger
Mode and disable TS monitoring, timers and termination. Pulling pin low disables the IC. If NTC sensing
is not needed, connect this pin to VSS through an external 10-kΩ/100-kΩ resistor. A 250 kΩ from TS to
ground will prevent IC entering TTDM mode when battery with thermistor is removed.
VSS
3
–
Ground terminal
Thermal Pad
and Package
—
—
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the
device. The thermal pad must be connected to the same potential as the VSS pin on the printed
circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be
connected to ground at all times.
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8 Specifications
8.1 Absolute Maximum Ratings(1)
over operating free-air temperature (unless otherwise noted)
Input voltage(2)
MIN
MAX
UNIT
IN (with respect to VSS)
–0.3
12
V
OUT (with respect to VSS)
–0.3
7
V
PRE-TERM, ISET, ISET2, TS, CHG, PG, ASI, ASO
(with respect to VSS)
–0.3
7
V
Input current
IN
1.25
A
Output current (continuous)
OUT
1.25
A
Output sink current
CHG
15
mA
Junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to the network ground terminal unless otherwise noted.
8.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
6
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±3000
Charged-device model (CDM), per JEDEC specification JESD22C101(2)
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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8.3 Recommended Operating Conditions(1)
MIN
IN voltage range
VIN
IN operating voltage range, Restricted by VDPM and VOVP
MAX
UNIT
3.5
12
V
4.45
6.45
V
IIN
Input current, IN pin
1.0
A
IOUT
Current, OUT pin
1.0
A
TJ
Junction temperature
0
125
°C
RPRE-TERM
Programs precharge and termination current thresholds
1
10
kΩ
0.540
49.9
kΩ
1.66
258
kΩ
RISET
Fast-charge current programming resistor
RTS
10-kΩ NTC thermistor range without entering BAT_EN or TTDM
(1)
Operation with VIN less than 4.5 V or in drop-out may result in reduced performance.
8.4 Thermal Information
BQ2409x
THERMAL
METRIC(1)
DGQ
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
71.2
RθJC(top)
Junction-to-case (top) thermal resistance
53.9
RθJB
Junction-to-board thermal resistance
45.2
ψJT
Junction-to-top characterization parameter
3.5
ψJB
Junction-to-board characterization parameter
44.9
RθJC(bot)
Junction-to-case (bottom) thermal resistance
19.2
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
8.5 Dissipation Ratings(1) (2)
PACKAGE
RθJA
RθJC
TA ≤ 25°C
POWER RATING
DERATING FACTOR
TA > 25°C
5 x 3 mm MSOP
52°C/W
48°C/W
1.92 W
19.2 mW/°C
(1)
(2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is
connected to the ground plane by a 2×3 via matrix
8.6 Electrical Characteristics
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
UVLO
Undervoltage lock-out exit
VIN: 0 V → 4 V update based on sim/char
3.15
3.3
3.45
V
VHYS_UVLO
Hysteresis on VUVLO_RISE falling
VIN: 4 V→0 V,
VUVLO_FALL = VUVLO_RISE –VHYS-UVLO
175
227
280
mV
VIN-DT
Input power good detection threshold
is VOUT + VIN-DT
(Input power good if VIN > VOUT + VIN-DT);
VOUT = 3.6 V, VIN: 3.5 V → 4 V
30
80
145
mV
VHYS-INDT
Hysteresis on VIN-DT falling
VOUT = 3.6 V, VIN: 4 V → 3.5 V
31
mV
tDGL(PG_PWR)
Deglitch time on exiting sleep.
Time measured from VIN: 0 V → 5 V 1-μs rise time to
PG = low, VOUT = 3.6 V
45
μs
tDGL(PG_NO-
Deglitch time on VHYS-INDT power
down. Same as entering sleep.
Time measured from VIN: 5 V → 3.2 V 1-μs fall time
to PG = OC, VOUT = 3.6 V
29
ms
PWR)
VOVP
Input overvoltage protection threshold
VIN: 5 V → 7 V
tDGL(OVP-SET)
Input overvoltage blanking time
VIN: 5 V → 7 V
6.5
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6.65
113
6.8
V
μs
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8.6 Electrical Characteristics (continued)
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
VHYS-OVP
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Hysteresis on OVP
VIN: 7 V → 5 V
95
mV
tDGL(OVP-REC)
Deglitch time exiting OVP
Time measured from VIN: 7 V → 5 V 1-μs fall-time to
PG = LO
30
μs
VIN-DPM
USB/Adaptor low input voltage
protection. Restricts lout at VIN-DPM
IIN-USB-CL
Feature active in USB Mode; Limit input source
current to 50 mA; VOUT = 3.5 V; RISET = 825 Ω
4.34
4.4
4.46
Feature active in Adaptor Mode; Limit input source
current to 50 mA; VOUT = 3.5 V; RISET = 825 Ω
4.24
4.3
4.36
V
USB input I-Limit 100 mA
ISET2 = Float; RISET = 825 Ω
85
92
100
USB input I-Limit 500 mA
ISET2 = High; RISET = 825 Ω
430
462
500
280
mA
ISET SHORT CIRCUIT TEST
RISET_SHORT
Highest resistor value considered a
fault (short). Monitored for Iout>90 mA
Riset: 600 Ω → 250 Ω, IOUT latches off, cycle power
to reset.
tDGL_SHORT
Deglitch time transition from ISET
short to Iout disable
Clear fault by cycling IN or TS/ BAT_EN
IOUT_CL
Maximum OUT current limit Regulation VIN = 5 V, VOUT = 3.6 V, VISET2 = Low, RISET:
(Clamp)
600 Ω → 250 Ω, Iout latches off after tDGL-SHORT
500
1
1.05
Ω
ms
1.4
A
0.85
V
BATTERY SHORT PROTECTION
VOUT(SC)
OUT pin short-circuit detection
threshold/ precharge threshold
VOUT: 3 V → 0.5 V, no deglitch
VOUT(SC-HYS)
OUT pin short hysteresis
Recovery ≥ VOUT(SC) + VOUT(SC-HYS); rising, no
deglitch
IOUT(SC)
Source current to OUT pin during
short-circuit detection
0.75
0.8
77
10
15
mV
20
mA
QUIESCENT CURRENT
IOUT(PDWN)
Battery current into OUT pin
VIN = 0 V
1
IOUT(DONE)
OUT pin current, charging terminated
VIN = 6 V, VOUT > VOUT(REG)
6
IIN(STDBY)
Standby current into IN pin
TS = LO, VIN ≤ 6 V
Active supply current, IN pin
TS = open, VIN = 6 V, TTDM – no load on OUT pin,
VOUT > VOUT(REG), IC enabled
ICC
μA
125
μA
0.8
1.0
mA
BATTERY CHARGER FAST-CHARGE
Battery regulation voltage
(BQ24090/1/2/3)
VIN = 5.5 V, IOUT = 25 mA, (VTS-45°C≤ VTS ≤ VTS-0°C)
4.16
4.2
4.23
Battery regulation voltage (BQ24095)
VIN = 5.5 V, IOUT = 25 mA
4.30
4.35
4.40
VO_HT(REG)
Battery hot regulation Voltage,
BQ24092/3
VIN = 5.5 V, IOUT = 25 mA, VTS-60°C≤ VTS ≤ VTS-45°C
4.02
4.06
4.1
IOUT(RANGE)
Programmed Output fast charge
current range
VOUT(REG) > VOUT > VLOWV; VIN = 5 V, ISET2=Lo,
RISET = 540 to 10.8 kΩ
VDO(IN-OUT)
Drop-Out, VIN – VOUT
Adjust VIN down until IOUT = 0.5 A, VOUT = 4.15 V,
RISET = 540, ISET2 = Lo (Adaptor Mode); TJ ≤ 100°C
IOUT
Output fast charge formula
VOUT(REG)
Fast charge current factor for
BQ24090, 91, 92, 93
KISET
Fast charge current factor for
BQ24095
KISET
10
325
VOUT(REG) > VOUT > VLOWV; VIN = 5 V, ISET2 = Lo
RISET = KISET /IOUT; 50 < IOUT < 1000 mA
540
V
1000
mA
520
mV
KISET/RISET
510
V
A
565
RISET = KISET /IOUT; 25 < IOUT < 50 mA
480
527
580
RISET = KISET /IOUT; 10 < IOUT < 25 mA
350
520
680
585
RISET = KISET /IOUT; 50 < IOUT < 1000 mA
510
560
RISET = KISET /IOUT; 25 < IOUT < 50 mA
480
557
596
RISET = KISET /IOUT; 10 < IOUT < 25 mA
350
555
680
2.4
2.5
2.6
AΩ
AΩ
PRECHARGE – SET BY PRETERM PIN
8
VLOWV
Pre-charge to fast-charge transition
threshold
tDGL1(LOWV)
Deglitch time on pre-charge to fastcharge transition
70
μs
tDGL2(LOWV)
Deglitch time on fast-charge to precharge transition
32
ms
IPRE-TERM
Refer to the Termination Section
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8.6 Electrical Characteristics (continued)
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
%PRECHG
KPRE-CHG
TEST CONDITIONS
Pre-charge current, default setting
VOUT < VLOWV; RISET = 1080 Ω;
RPRE-TERM= High Z
Pre-charge current formula
RPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%)
% Pre-charge Factor
MIN
18
TYP
MAX
20
UNIT
22
%IOUTCC
RPRE-TERM/KPRE-CHG%
VOUT < VLOWV, VIN = 5 V, RPRE-TERM = 2 k to 10 kΩ;
RISET = 1080 Ω, RPRE-TERM = KPRE-CHG × %IFAST-CHG,
where %IFAST-CHG is 20 to 100%
90
100
110
Ω/%
VOUT < VLOWV, VIN = 5 V, RPRE-TERM = 1 k to 2 kΩ;
RISET = 1080 Ω, RPRE-TERM = KPRE-CHG × %IFAST-CHG,
where %IFAST-CHG is 10% to 20%
84
100
117
Ω/%
9
10
11
%IOUT-
TERMINATION – SET BY PRE-TERM PIN
%TERM
KTERM
IPRE-TERM
Termination threshold current, default
setting
VOUT > VRCH; RISET = 1 k;
RPRE-TERM = High Z
Termination current threshold Formula
RPRE-TERM = KTERM (Ω/%) × %TERM (%)
% Term factor
VOUT > VRCH, VIN = 5 V, RPRE-TERM = 2 k to 10 kΩ;
RISET = 750 Ω KTERM × %IFAST-CHG, where %IFASTCHG is 10 to 50%
182
200
216
VOUT > VRCH, VIN = 5 V, RPRE-TERM = 1 k to 2 kΩ;
RISET = 750 Ω KTERM × %Iset, where %Iset is 5 to
10%
174
199
224
71
75
81
Current for programming the term. and
pre-chg with resistor. ITerm-Start is the
RPRE-TERM = 2 k, VOUT = 4.15 V
initial PRE-TERM current.
%TERM
Termination current formula
tDGL(TERM)
Deglitch time, termination detected
ITerm-Start
Elevated PRE-TERM current for, tTermStart, during start of charge to prevent
recharge of full battery
tTerm-Start
Elevated termination threshold initially
active for tTerm-Start
CC
RPRE-TERM/ KTERM
Ω/%
μA
RTERM/ KTERM%
29
80
85
ms
92
1.25
μA
min
RECHARGE OR REFRESH
Recharge detection threshold – normal
VIN = 5V, VTS = 0.5 V, VOUT: 4.25 V → VRCH
temp
VO(REG)V
-0.0
VO(REG)-0.095 O(REG)
0.120
70
V
Recharge detection threshold – hot
temp
VIN = 5 V, VTS = 0.2V, VOUT: 4.15 V → VRCH
VO(REG)V
-0.0
VO(REG)-0.105 O(REG)
0.130
80
V
tDGL1(RCH)
Deglitch time, recharge threshold
detected
VIN = 5 V, VTS = 0.5 V, VOUT: 4.25 V → 3.5 V in 1μs;
tDGL(RCH) is time to ISET ramp
29
ms
tDGL2(RCH)
Deglitch time, recharge threshold
detected in OUT-Detect Mode
VIN = 5 V, VTS = 0.5V, VOUT = 3.5 V inserted;
tDGL(RCH) is time to ISET ramp
3.6
ms
VRCH
BATTERY DETECT ROUTINE
VREG-BD
VOUT reduced regulation during
battery detect
IBD-SINK
Sink current during VREG-BD
tDGL(HI/LOW
REG)
VO(REG)VO(REG)-0.400
0.450
VIN = 5 V, VTS = 0.5 V, battery absent
6
Regulation time at VREG or VREG-BD
VO(REG)-35
0
10
25
V
mA
ms
VBD-HI
High battery detection threshold
VIN = 5 V, VTS = 0.5 V, battery absent
VO(REG)
V
-0.0
VO(REG)-0.100 O(REG)
-0.150
50
V
VBD-LO
Low battery detection threshold
VIN = 5 V, VTS = 0.5 V, battery absent
VREG-BD
+0.50
VREG-BD +0.1
VREG-BD
+0.15
V
BATTERY CHARGING TIMERS AND FAULT TIMERS
tPRECHG
Pre-charge safety timer value
Restarts when entering pre-charge; always enabled
when in pre-charge
1700
1940
2250
s
tMAXCH
Charge safety timer value
Clears fault or resets at UVLO, TS/ BAT_EN disable,
OUT short, exiting LOWV and refresh
34000
38800
45000
s
BATTERY-PACK NTC MONITOR (Note 1); TS pin: 10 k and 100 k NTC
INTC-10k
NTC bias current, BQ24090/2/5
VTS = 0.3 V
48
50
52
μA
INTC-100k
NTC bias current, BQ24091/3
VTS = 0.3 V
4.8
5.0
5.2
μA
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8.6 Electrical Characteristics (continued)
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INTC-DIS-10k
10k NTC bias current when Charging
is disabled, BQ24090/2/5
VTS = 0 V
27
30
34
μA
INTC-DIS-100k
100k NTC bias current when Charging
VTS = 0 V
is disabled, BQ24091/3
4.4
5.0
5.8
μA
INTC is reduced prior to entering
INTC-FLDBK-10k TTDM to keep cold thermistor from
entering TTDM, BQ24090/2/5
VTS: Set to 1.525 V
4
5
6.5
μA
INTC is reduced prior to entering
TTDM to keep cold thermistor from
entering TTDM, BQ24091/3
VTS: Set to 1.525 V
1.1
1.5
1.9
μA
Termination and Timer Disable Mode
Threshold – enter
VTS: 0.5 V → 1.7 V; timer held in Reset
1550
1600
1650
mV
INTCFLDBK-100k
VTTDM(TS)
VHYS-TTDM(TS) Hysteresis exiting TTDM
VTS: 1.7 V → 0.5 V; timer enabled
VCLAMP(TS)
VTS = Open (float)
tDGL(TTDM)
TS maximum voltage clamp
100
1800
Deglitch exit TTDM between states
Deglitch enter TTDM between states
VTS_I-FLDBK
TS voltage where INTC is reduce to
keep thermistor from entering TTDM
CTS
Optional capacitance – ESD
INTC adjustment (90 to 10%; 45 to 6.6 μS) takes
place near this spec threshold. VTS: 1.425 V → 1.525
V
1950
ms
μs
1475
mV
0.22
μF
Low temperature CHG pending
VHYS-0°C
Hysteresis at 0°C
Charge pending to low temp charging;
VTS: 1.5 V → 1 V
VTS-10°C
Low temperature, half charge,
BQ24092/3
Normal charging to low temp charging;
VTS: 0.5 V → 1 V
VHYS-10°C
Hysteresis at 10°C, BQ24092/3
Low temp charging to normal CHG;
VTS: 1.0 V → 0.5 V
VTS-45°C
High temperature at 4.1V
Normal charging to high temp CHG;
VTS: 0.5 V → 0.2 V
VHYS-45°C
Hysteresis at 45°C
High temp charging to normal CHG;
VTS: 0.2 V → 0.5 V
VTS-60°C
High temperature disable, BQ24092/3
High temp charge to pending;
VTS: 0.2 V → 0.1 V
VHYS-60°C
Hysteresis at 60°C, BQ24092/3
Charge pending to high temp CHG;
VTS: 0.1 V → 0.2 V
tDGL(TS_10C)
Deglitch for TS thresholds: 10C,
BQ24092/3
Normal to cold operation; VTS: 0.6 V → 1 V
50
Cold to normal operation; VTS: 1 V → 0.6 V
12
tDGL(TS)
Deglitch for TS thresholds: 0/45/60C.
Battery charging
30
VTS-EN-10k
Charge Enable Threshold, (10k NTC)
VTS: 0 V → 0.175 V
VTSDIS_HYS-10k
HYS below VTS-EN-10k to Disable, (10k
NTC)
VTS: 0.125 V → 0 V
VTS-EN-100k
Charge Enable Threshold, BQ24090/2 VTS: 0 V → 0.175 V
VTS-
HYS below VTS-EN-100k to Disable,
BQ24091/3
1230
1255
86
765
790
278
815
178
293
88
186
VTS: 0.125 V → 0 V
150
mV
mV
ms
ms
96
12
140
mV
mV
11.5
80
mV
mV
10.7
170
mV
mV
35
263
mV
8
VTS-0°C
DIS_HYS-100k
2000
57
Low temp charging to pending;
VTS: 1.0 V → 1.5 V
1205
mV
mV
mV
160
50
mV
mV
THERMAL REGULATION
TJ(REG)
Temperature regulation limit
125
°C
TJ(OFF)
Thermal shutdown temperature
155
°C
TJ(OFF-HYS)
Thermal shutdown hysteresis
20
°C
LOGIC LEVELS ON ISET2
VIL
Logic LOW input voltage
Sink 8 μA
VIH
Logic HIGH input voltage
Source 8 μA
IIL
Sink current required for LO
VISET2= 0.4 V
IIH
Source current required for HI
VISET2= 1.4 V
VFLT
ISET2 Float voltage
10
0.4
1.4
2
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1.1
575
V
V
900
μA
9.5
μA
1225
mV
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8.6 Electrical Characteristics (continued)
over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOGIC LEVELS ON CHG AND PG
VOL
Output LOW voltage
ISINK = 5 mA
ILEAK
Leakage current into IC
V CHG = 5 V, V PG = 5 V
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0.4
V
1
μA
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8.7 Typical Characteristics
SETUP: BQ2409x typical applications schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise indicated)
8.7.1 Power Up, Power Down, OVP, Disable and Enable Waveforms
Vin
Vin
5V/div
5V/div
Vchg
2V/div
2V/div
Vchg
Vpg
2V/div
Vpg
Viset
2V/div
Viset 2V/div
2V/div
t - time - 100ms/div
t - time - 20ms/div
Figure 8-1. OVP 8-V Adaptor - Hot Plug
Figure 8-2. OVP from Normal Power-Up Operation
– VIN 0 V → 5 V → 6.8 V → 5 V
Vpg
Vpg
2V/div
5V/div
Vchg
Vchg
2V/div
2V/div
Vout
2V/div
500mV/div
Vts
Battery Detect Mode
Viset
Vin
2V/div
5V/div
t - time - 50ms/div
10-kΩ resistor from TS to GND.
t - time - 20ms/div
Fixed 10-kΩ resistor, between TS and GND.
10-kΩ is shorted to disable the IC.
Figure 8-3. TS Enable and Disable
Figure 8-4. Hot Plug Source with No Battery –
Battery Detection
Vout
Vin
2V/div
Vchg
Vout
500mV/div
Viset
1 Battery Detect Cycle
1V/div
5V/div
1V/div
Viset
1V/div
Vts
1V/div
Vts
Entered TTDM
2V/div
12
t - time - 5ms/div
t - time - 10ms/div
Figure 8-5. Battery Removal – GND Removed 1st,
42-Ω Load
Figure 8-6. Battery Removal with OUT and TS
Disconnect 1st, with 100-Ω Load
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8.7.2 Protection Circuits Waveforms
Vchg
Vin
2V/div
2V/div
Vchg
Vin
2V/div
2V/div
Short Detected in 100mA
mode and Latched Off
Viset
500mV/div
500mV/div
V_0.1 W_OUT
20mV/div
Viset
20mV/div
V_0.1W_OUT
t - time - 500ms/div
t - time - 5ms/div
Figure 8-8. DPM – USB Current Limits – Vin
Regulated to 4.4 V
CH4: Iout (0.2 A/Div)
Figure 8-7. ISET Shorted Prior to USB Power Up
Vin
Vout
2V/div
1V/div
Enters
Thermal
Regulation
Exits
Thermal
Regulation
Vin
1V/div
Viset
1V/div
Viset
Vchg
1V/div
5V/div
Vpg
V_0.1W_OUT
5V/div
50mV/div
t - time - 20ms/div
t - time - 1s/div
The IC temperature rises to 125°C and enters thermal
regulation. Charge current is reduced to regulate the IC at
125°C. VIN is reduced, the IC temperature drops, the charge
current returns to the programmed value.
Figure 8-9. Thermal Regulation – Vin increases
PWR/Iout Reduced
VIN swept from 5 V to 3.9 V to 5 V
VBAT = 4 V
Figure 8-10. Entering and Exiting Sleep Mode
546
4.2
K iset
544
4.199
Vreg @ 25°C
Low to High Currents
(may occur in recharge to fast charge transion)
540
Kiset - W
VOUT - Output Voltage - V
542
538
High to Low Currents
(may occur in Voltage Regulation - Taper Current)
536
534
532
4.198
Vreg @ 85°C
4.197
4.196
4.195
Vreg @ 0°C
4.194
4.193
530
528
0
.15
4.192
0.2
0.4
IO - Output Current - A
0.6
0.8
Figure 8-11. KISET for Low and High Currents
0
0.2
0.4
0.6
IO - Output Current - A
0.8
1
Figure 8-12. Load Regulation Overtemperature
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4.360
Vreg @ 85°C
4.358
VO - Output Voltage - V
4.356
4.354
Vreg @ 25°C
4.352
4.350
4.348
4.346
4.344
Vreg @ 0°C
4.342
4.340
0
0.2
0.4
0.6
IO - Output Current - A
0.8
1
Figure 8-13. Load Regulation – BQ24095
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9 Detailed Description
9.1 Overview
The BQ2409x is a highly-integrated family of single cell Li-ion and Li-pol chargers. The charger can be used
to charge a battery, power a system or both. The charger has three phases of charging: Precharge to recover
a fully discharged battery, fast-charge constant current to supply the buck charge safely and voltage regulation
to safely reach full capacity. The charger is very flexible, allowing programming of the fast-charge current and
Precharge/Termination Current. This charger is designed to work with a USB connection or Adaptor (DC out).
The charger also checks to see if a battery is present.
The charger also comes with a full set of safety features: JEITA temperature standard, overvoltage protection,
DPM-IN, safety timers, and ISET short protection. All of these features and more are described in detail below.
The charger is designed for a single power path from the input to the output to charge a single cell Li-ion or
Li-pol battery pack. Upon application of a 5-V DC power source the ISET and OUT short checks are performed
to assure a proper charge cycle.
If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning
cycle begins. The amount of precharge current can be programmed using the PRE-TERM pin which programs
a percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system
load is connected across the battery stealing the battery current. The precharge current can be set higher to
account for the system loading while allowing the battery to be properly conditioned. The PRE-TERM pin is a
dual function pin which sets the precharge current level and the termination threshold level. The termination
"current threshold" is always half of the precharge programmed current level.
Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast-charge current
is applied. The fast-charge constant current is programmed using the ISET pin. The constant current provides
the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage. If the
IC reaches 125°C the IC enters thermal regulation, slows the timer clock by half and reduce the charge current
as needed to keep the temperature from rising any further. Figure 9-1 shows the charging profile with thermal
regulation. Typically under normal operating conditions, the junction temperature of the IC is less than 125°C
and thermal regulation is not entered.
Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at
the regulation voltage until the current tapers to the termination threshold. The termination can be disabled if
desired. The CHG pin is low (LED on) during the first charge cycle only and turns off once the termination
threshold is reached, regardless if termination, for charge current, is enabled or disabled.
Further details are mentioned in .Section 9.3.
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VO(REG)
PreConditioning
Phase
Thermal
Regulation
Phase
Current
Regulation
Phase
Voltage Regulation and
Charge Termination
Phase
DONE
IO(OUT)
FAST-CHARGE
CURRENT
PRE-CHARGE
CURRENT AND
TERMINATION
THRESHOLD
Battery
Voltage,
V(OUT)
Battery Current,
I(OUT)
Charge
Complete
Status,
Charger
Off
VO(LOWV)
I(TERM)
IO(PRECHG)
T(THREG)
0A
Temperature, Tj
T(PRECHG)
T(CHG)
DONE
Figure 9-1. Charging Profile with Thermal Regulation
16
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9.2 Functional Block Diagram
Internal Charge
Current Sense
w/ Multiple Outputs
IN
OUT
80 mV
+
_
OUT
Input
Power
Detect
IN
OUT
+
_
+
_
+
-
IN-DPMREF
Charge
Pump
IOUT x 1.5 V
540 AW
OUTREGREF
TJ°C
+
_
FAST CHARGE
125°CREF
PRE-CHARGE
ISET
IN
+
_
1.5V
Pre-CHG Reference
TJoC
+
_
Term Reference
75mA
+
_
USB100/500REF
USB Sense
Resistor
+
_
150oCREF
Thermal Shutdown
+
Charge
Pump
X2 Gain (1: 2)
Term:Pre-CHGX2
PRE-TERM
Increased from 75mA to 85mA for
1st minute of charge.
IN
+
_
+
OUT
VTERM_EN
CHG
OVPREF
+
_
+
_
ON:
OFF:
ISET2 (LO = ISET, HI = USB500,
0.9V Float
On During
1st Charge Only
CHARGE
CONTROL
FLOAT = USB100)
PG
VCOLD-10 C
o
+
_
o
+
_
VHOT-45 C
HI = Half CHG (JEITA)
HI = 4.06Vreg (JEITA)
VCOLD-FLT
+
_
+
_
VHOT-FLT
LO = TTDM MODE
HI = Suspend CHG
TS
VTTDM
TS - bq24090
VCE
+
_
+
_
HI=CHIP DISABLE
VDISABLE
+
_
Cold Temperature
Sink Current
= 45mA _ VCLAMP = 1.4V
Disable
Sink Current
= 20mA
+
5 mA
+
_
45mA
Bq24090 is as shown
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9.3 Feature Description
9.3.1 Power Down or Undervoltage Lockout (UVLO)
The BQ2409x family is in power-down mode if the IN pin voltage is less than UVLO. The part is considered dead
and all the pins are high impedance. Once the IN voltage rises above the UVLO threshold the IC will enter Sleep
Mode or Active Mode depending on the OUT pin (battery) voltage.
9.3.2 UVLO
The BQ2409x family is in power-down mode if the IN pin voltage is less than VUVLO. The part is considered dead
and all the pins are high impedance.
9.3.3 Power Up
The IC is alive after the IN voltage ramps above UVLO (see Sleep Mode), resets all logic and timers, and
starts to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the
UVLO and sleep states where the IC declares power good, starts the qualification charge at 100 mA, sets the
input current limit threshold base on the ISET2 pin, starts the safety timer, and enables the CHG pin. See Figure
9-2.
9.3.4 Sleep Mode
If the IN pin voltage is between than VOUT + VDT and UVLO, the charge current is disabled, the safety timer
counting stops (not reset) and the PG and CHG pins are high impedance. As the input voltage rises and the
charger exits Sleep Mode, the PG pin goes low, the safety timer continues to count, charge is enabled, and the
CHG pin returns to its previous state. See Figure 9-3.
9.3.5 New Charge Cycle
A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin),
exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping
below the VRCH threshold. The CHG pin is active low only during the first charge cycle, therefore exiting TTDM
or a dropping below VRCH will not turn on the CHG pin FET, if the CHG pin is already high impedance.
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VSS
1.8V
Disabled
4.06 V
HOT
Operation
Normal
Operation
4.06 V
HOT
Operation
HOT
Fault
Disabled
Normal
Operation
Cold
Operation
Cold
Fault
LDO
Mode
Cold
Fault
tDGL(TTDM)
Enter
Normal
Operation
Cold
Operation
t < tDGL(IS)
Normal
Operation
LDO
Mode
tDGL(TTDM)
Enter
tDGL(TTDM)
Exit
LDO
t < tDGL(TTDM)
Exit
LDOHYS
tDGL(TS)
tDGL(TS)
tDGL(TS1_IOC)
Cold to Normal
0°C
0°CHYS
tDGL(TS_IOC)
Rising
tDGL(TS_IOC)
Falling
10°C
10°CHYS
tDGL(TS)
tDGL(TS)
tDGL(TS)
45°CHYS
45°C
tDGL(TS)
tDGL(TS)
60°CHYS
Dots Show Threshold Trip Points
fllowed by a deglitch time before
transitioning into a new mode.
60°C
EN
DISHYS
0V
t
Drawing Not to Scale
Figure 9-2. TS Battery Temperature Bias Threshold and Deglitch Timers
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Apply Input
Power
Is power good?
VBAT +VDT < VIN < VOVP
& VUVLO < VIN
No
Turn on PG FET
PG pin LOW
Yes
Is chip enabled?
VTS > VEN
No
Yes
Set Input Current Limit to 100 mA
and Start Charge
Perform ISET & OUT short tests
Remember ISET2 State
Set charge current
based on ISET2 truth
table.
Return to
Charge
Figure 9-3. BQ2409x Power-Up Flow Diagram
9.3.6 Overvoltage Protection (OVP) – Continuously Monitored
If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP).
The timer ends and the CHG and PG pin goes to a high impedance state. Once the overvoltage returns to a
normal voltage, the PG pin goes low, timer continues, charge continues and the CHG pin goes low after a 25ms
deglitch. PG pin is optional on some packages.
9.3.7 Power Good Indication ( PG)
After application of a 5-V source, the input voltage rises above the UVLO and sleep thresholds (VIN > VBAT +
VDT), but is less than OVP (VIN < VOVP,), then the PG FET turns on and provides a low impedance path to
ground. See Figure 8-1, Figure 8-2, and Figure 8-10.
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9.3.8 CHG Pin Indication
The charge pin has an internal open drain FET which is on (pulls down to VSS) during the first charge only
(independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current
tapers to the termination threshold set by the PRE-TERM resistor.
The charge pin is high impedance in Sleep Mode and OVP (if PG is high impedance) and return to its previous
state once the condition is removed.
Cycling input power, pulling the TS pin low and releasing or entering Precharge Mode causes the CHG pin to go
reset (go low if power is good and a discharged battery is attached) and is considered the start of a first charge.
9.3.9 CHG and PG LED Pullup Source
For host monitoring, a pullup resistor is used between the STATUS pin and the VCC of the host and for a visual
indication a resistor in series with an LED is connected between the STATUS pin and a power source. If the
CHG or PG source is capable of exceeding 7 V, a 6.2-V Zener diode should be used to clamp the voltage. If the
source is the OUT pin, note that as the battery changes voltage, the brightness of the LEDs vary.
Table 9-1. CHG Pullup Source
CHARGING STATE
CHG FET/LED
1st Charge
ON
Refresh Charge
OVP
OFF
SLEEP
TEMP FAULT
ON for 1st Charge
Table 9-2. PG LED Pullup Source
VIN POWER-GOOD STATE
PG FET/LED
UVLO
SLEEP Mode
OFF
OVP Mode
Normal Input (VOUT + VDT < VIN <
VOUP)
ON
PG is independent of chip disable
9.3.10 IN-DPM (VIN-DPM or IN–DPM)
The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching
its current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass
FET starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source
with voltage less than VIN-DPM to power the out pin. This works well with current limited adaptors and USB ports
as long as the nominal voltage is above 4.3 V and 4.4 V respectively. This is an added safety feature that helps
protect the source from excessive loads.
9.3.11 OUT
The charger OUT pin provides current to the battery and to the system, if present. This IC can be used to charge
the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the loads
do not exceed the available current. The OUT pin is a current limited source and is inherently protected against
shorts. If the system load ever exceeds the output programmed current threshold, the output will be discharged
unless there is sufficient capacitance or a charged battery present to supplement the excessive load.
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9.3.12 ISET
An external resistor is used to program the output current (50 to 1000 mA) and can be used as a current monitor.
RISET = KISET / IOUT
where
•
•
IOUT is the desired fast charge current
KISET is a gain factor found in the electrical specification
For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Figure 8-11
shows the transition from low current to higher current. Going from higher currents to low currents, there is
hysteresis and the transition occurs around 0.15 A.
The ISET resistor is short protected and will detect a resistance lower than ≉340 Ω. The detection requires at
least 80 mA of output current. If a short is detected, then the IC will latch off and can only be reset by cycling
the power. The OUT current is internally clamped to a maximum current between 1.1 A and 1.35 A and is
independent of the ISET short detection circuitry, as shown in Figure 9-5. Also, see Figure 10-4 and Figure 8-7.
4.5
o
For < 45 C, 4.2V Regulation
No Operation
During Cold
Fault
3.5
3
60oC to 45oC
HOT TEMP
4.06V
Regulation
VOUT
2.5
< 48oC
1.5
1
0.5
0
0
o
10oC
60oC
Termination
Disable
2
0C
100% of Programmed
Current
} IC Disable
} Hot Fault
Normalized OUT Current and VREG - V
4
50%
Cold
Fault
IOUT
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
VTS - Voltage - V
Figure 9-4. Operation Over TS Bias Voltage
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1.8
1.6
IO - Output Current - A
1.4
IOUT Clamp min - max
IOUT Fault min - max
SLUS968H – JANUARY 2010 – REVISED APRIL 2021
1.2
IOUT Internal Clamp Range
1
0.8
IOUT Programmed
max
0.6
ISET Short
Fault
Range
min
0.4
0.2
Non Restricted
Operating Area
0
100
1000
10000
ISET - W
Figure 9-5. Programmed/Clamped Out Current
9.3.13 PRE_TERM – Precharge and Termination Programmable Threshold
PRE_TERM is used to program both the precharge current and the termination current threshold. The precharge
current level is a factor of two higher than the termination current level. The termination can be set between 5%
and 50% of the programmed output current level set by ISET. If left floating the termination and precharge are
set internally at 10 and 20% respectively. The precharge-to-fast-charge, Vlowv threshold is set to 2.5 V.
RPRE-TERM = %Term × KTERM = %Pre-CHG × KPRE-CHG
(2)
where
•
•
•
%Term is the percent of fast charge current where termination occurs
%Pre-CHG is the percent of fast charge current that is desired during precharge
KTERM and KPRE-CHG are gain factors found in the electrical specifications
9.3.14 ISET2
ISET2 is a 3-state input and programs the input current limit/regulation threshold. A low will program a regulated
fast-charge current via the ISET resistor and is the maximum allowed input and output current for any ISET2
setting, Float programs a 100-mA current limit and high programs a 500-mA current limit.
Below are two configurations for driving the 3-state ISET2 pin:
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VCC
VCC
R1
To
ISET2
To ISET2
Drive
Logic
Q1
OR
Drive
Logic
R1 Divider
set to 0.9 V
Which is the
Float Voltage
R2
Q2
Copyright © 2016, Texas Instruments Incorporated
Figure 9-6. Configurations for Driving the 3-State ISET2 Pin
9.3.15 TS
The BQ2409x family contains an NTC monitoring function. The TS function for BQ24090, BQ24091, and
BQ24095 follows the classic temperature range and disable charge when the battery temperature is outside
of the 0°C and 45°C operating temperature window. The TS function for BQ24092 and BQ24093 is designed to
follow the new JEITA temperature standard for Li-ion and Li-pol batteries. There are now four thresholds, 60°C,
45°C, 10°C, and 0°C. Normal operation occurs between 10°C and 45°C. If between 0°C and 10°C the charge
current level is cut in half, and if between 45°C and 60°C the regulation voltage is reduced to 4.1 V max, see
Figure 9-4.
The BQ2409x family has devices to monitor 10-k and 100-k NTC thermistors. The BQ24090/2/5 are designed
to work with a 10-k NTC. For these devices, the TS feature is implemented using an internal 50-μA current
source to bias the thermistor (designed for use with a 10-k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi
TH05-3H103F) connected from the TS pin to VSS. If this feature is not needed, a fixed 10-k can be placed
between TS and VSS to allow normal operation. This may be done if the host is monitoring the thermistor and
then the host would determine when to pull the TS pin low to disable charge. The BQ24091/3 are designed to
work with a 100-k NTC. For these devices, the TS feature is implemented using an internal 5-μA current source
to bias the thermistor (designed for use with a 100-k NTC β = 3370) connected from the TS pin to VSS. If this
feature is not needed, a fixed 100-k can be placed between TS and VSS to allow normal operation. This may be
done if the host is monitoring the thermistor and then the host would determine when to pull the TS pin low to
disable charge.
The TS pin has two additional features when the TS pin is pulled low or floated/driven high. A low disables
charge (similar to a high on the BAT_EN feature) and a high puts the charger in TTDM.
Above 60°C or below 0°C the charge is disabled. Once the thermistor reaches ≈–10°C the TS current folds back
to keep a cold thermistor (between –10°C and –50°C) from placing the IC in the TTDM Mode. If the TS pin is
pulled low into Disable Mode, the current is reduced to ≈30 μA, see Figure 9-2. Since the ITS current is fixed
along with the temperature thresholds, it is not possible to use thermistor values other than the 10-k or 100-k
(depending on the IC) NTC (at 25°C).
9.4 Device Functional Modes
9.4.1 Termination and Timer Disable Mode (TTDM) - TS Pin High
The battery charger is in TTDM when the TS pin goes high from removing the thermistor (removing battery
pack/floating the TS pin) or by pulling the TS pin up to the TTDM threshold.
When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect
routine is run to see if the battery was removed or not. If the battery was removed, then the CHG pin will go to its
high impedance state if not already there. If a battery is detected, the CHG pin does not change states until the
current tapers to the termination threshold, where the CHG pin goes to its high impedance state if not already
there (the regulated output will remain on).
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The charging profile does not change (still has precharge, fast-charge constant current and constant voltage
modes). This implies the battery is still charged safely and the current is allowed to taper to zero.
When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle
begins and the CHG LED turns on.
If TTDM is not desired upon removing the battery with the thermistor, one can add a 237-k resistor between TS
and VSS to disable TTDM. This keeps the current source from driving the TS pin into TTDM. This creates ≈0.1°C
error at hot and a ≈3°C error at cold.
9.4.2 Timers
The precharge timer is set to 30 minutes. The precharge current, can be programmed to offset any system load,
making sure that the 30 minutes is adequate.
The fast-charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation,
IN-DPM or if in USB current limit. The timer clock slows by a factor of 2, resulting in a clock than counts half as
fast when in these modes. If either the 30 minute or ten hour timer times out, the charging is terminated and the
CHG pin goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power, or
going into and out of TTDM.
9.4.3 Termination
Once the OUT pin goes above VRCH, (reaches voltage regulation) and the current tapers down to the
termination threshold, the CHG pin goes high impedance and a battery detect route is run to determine if the
battery was removed or the battery is full. If the battery is present, the charge current terminates. If the battery
was removed along with the thermistor, then the TS pin is driven high and the charge enters TTDM. If the battery
was removed and the TS pin is held in the active region, then the battery detect routine continues until a battery
is inserted.
9.4.4 Battery Detect Routine
The battery detect routine should check for a missing battery while keeping the OUT pin at a useable voltage.
Whenever the battery is missing the CHG pin should be high impedance.
The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the
time if the battery is missing and not in TTDM. On power up, if battery voltage is greater than VRCH threshold, a
battery detect routine is run to determine if a battery is present.
The battery detect routine is disabled while the IC is in TTDM or has a TS fault. See Figure 9-7 for the battery
detect flow diagram.
9.4.5 Refresh Threshold
After termination, if the OUT pin voltage drops to VRCH (100 mV below regulation) then a new charge is initiated,
but the CHG pin remains at a high impedance (off).
9.4.6 Starting a Charge on a Full Battery
The termination threshold is raised by ≉14%, for the first minute of a charge cycle so if a full battery is removed
and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries
that have relaxed many hours may take several minutes to taper to the termination threshold and terminate
charge.
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Start
BATT_DETECT
Start 25ms timer
Timer Expired?
No
Yes
Is VOUTVREG-300mV?
Battery Present
Turn off Sink Current
Return to flow
No
Battery Absent
Don’t Signal Charge
Turn off Sink Current
Return to Flow
Figure 9-7. Battery Detect Routine
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
The BQ2409x series of devices are highly integrated Li-ion and Li-pol linear chargers devices targeted at
space-limited portable applications. The devices operate from either a USB port or AC adapter. The high input
voltage range with input overvoltage protection supports low-cost unregulated adaptors. These devices have a
single power output that charges the battery. A system load can be placed in parallel with the battery as long as
the average system load does not keep the battery from charging fully during the 10 hour safety timer.
10.2 Typical Application
1.5kW
BQ24090
Adaptor
1 IN
DC+
OUT 10
1.5kW
GND
2 ISET
TS 9
3 VSS
CHG 8
System Load
Battery Pack
++
1mF
1kW
1mF
4 PRETERM ISET2 7
OR
5 PG
NC 6
VDD
2kW
TTDM
USB Port
ISET/100/500 mA
VBUS
GND
GND
D+
D+
D-
D-
Host
Figure 10-1. Typical Application Schematic
10.2.1 Design Requirements
•
•
•
•
•
Supply voltage = 5 V
Fast charge current: IOUT-FC = 540 mA; ISET - pin 2
Termination current threshold: %IOUT-FC = 10% of fast charge or approximately 54 mA
Pre-charge current by default is twice the termination current or approximately 108 mA
TS – battery temperature sense = 10k NTC (103AT)
10.2.2 Detailed Design Procedure
10.2.2.1 Calculations
10.2.2.1.1 Program the Fast Charge Current, ISET:
RISET = [K(ISET) / I(OUT)]
from electrical characteristics table. . . K(SET) = 540 AΩ
RISET = [540AΩ/0.54A] = 1.0 kΩ
Selecting the closest standard value, use a 1-kΩ resistor between ISET (pin 16) and VSS.
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10.2.2.1.2 Program the Termination Current Threshold, ITERM:
RPRE-TERM = K(TERM) × %IOUT-FC
RPRE-TERM = 200 Ω/% × 10% = 2 kΩ
Selecting the closest standard value, use a 2-kΩ resistor between ITERM (pin 15) and Vss.
One can arrive at the same value by using 20% for a pre-charge value (factor of 2 difference).
RPRE-TERM = K(PRE-CHG) × %IOUT-FC
RPRE-TERM = 100 Ω/% × 20%= 2 kΩ
10.2.2.1.3 TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT).
To disable the temp sense function, use a fixed 10-kΩ resistor between the TS (Pin 1) and Vss.
10.2.2.1.4 CHG and PG
LED Status: connect a 1.5-kΩ resistor in series with a LED between the OUT pin and the CHG pin.
Connect a 1.5-kΩ resistor in series with a LED between the OUT pin and the PG pin.
Processor Monitoring: Connect a pull-up resistor between the processor power rail and the CHG pin.
Connect a pull-up resistor between the processor power rail and the PG pin.
10.2.2.2 Selecting IN and OUT Pin Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input and output pins. Using the values shown on the application diagram, is recommended. After evaluation
of these voltage signals with real system operational conditions, one can determine if capacitance values can
be adjusted toward the minimum recommended values (DC load application) or higher values for fast high
amplitude pulsed load applications. Note if designed for high input voltage sources (bad adaptors or wrong
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).
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10.2.3 Application Curves
Vout
1V/div
1V/div
Vout
Vchg
Vchg
Battery Declared Absent
5V/div
5V/div
Viset
Viset
1V/div
Battery
Threshold
Reached
1V/div
V_0.1 W_OUT
V_0.1 W_OUT
100mV/div
100mV/div
t - time - 500ms/div
t - time - 20ms/div
Continuous battery detection when not in TTDM.
CH4: Iout (1 A/Div)
Battery voltage swept from 0 V to 4.25 V to 3.9 V.
Figure 10-2. Battery Removal with Fixed TS = 0.5 V
Vout
Figure 10-3. Battery Charge Profile
Vin
1V/div
2V/div
Vchg
Vchg 2V/div
2V/div
500mV/div
500mV/div
IOUT Clamped Current
Viset
Viset
V_0.1W_OUT
V_0.1 W_OUT
20mV/div
100mV/div
ISET Short Detected
and Latched Off
t - time - 1ms/div
t - time - 200ms/div
CH4: Iout (0.2 A/Div)
CH4: Iout (1 A/Div)
Figure 10-4. ISET Shorted During Normal
Operation
Figure 10-5. DPM – Adaptor Current Limits – Vin
Regulated
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11 Power Supply Recommendations
The devices are designed to operate from an input voltage supply range between 3.5 V and 12 V and current
capability of at least the maximum designed charge current. This input supply should be well regulated. If located
more than a few inches from the BQ2409x IN and GND terminals, a larger capacitor is recommended.
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12 Layout
12.1 Layout Guidelines
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the BQ2409x, with short
trace runs to both IN, OUT and GND (thermal pad).
•
•
•
All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces
The BQ2409x family is packaged in a thermally enhanced MLP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal
pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground
connection. It is best to use multiple 10mil vias in the power pad of the IC and in close proximity to conduct
the heat to the bottom ground plane. The bottom ground place should avoid traces that “cut off” the thermal
path. The thinner the PCB the less temperature rise. The EVM PCB has a thickness of 0.031 inches and
uses 2 oz. (2.8 mil thick) copper on top and bottom, and is a good example of optimal thermal performance.
12.2 Layout Example
Figure 12-1. PCB Layout Example
12.3 Thermal Considerations
The BQ2409x family is packaged in a thermally enhanced MSOP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad
should be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the
PowerPAD Thermally Enhanced Package Application Report. The most common measure of package thermal
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performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air surrounding
the package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ – T) / P
(3)
where
•
•
•
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can influence the measurement and calculation of θJA include:
•
•
•
•
•
Whether or not the device is board mounted
Trace size, composition, thickness, and geometry
Orientation of the device (horizontal or vertical)
Volume of the ambient air surrounding the device under test and airflow
Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-ion and Li-pol batteries the maximum power dissipation is typically seen at the
beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack
voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes
a few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum
voltage to use. This is verified, with the system and a fully discharged battery, by plotting temperature on the
bottom of the PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a
function of time. The fast charge current will start to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.
12.3.1 Leakage Current Effects on Battery Capacity
To determine how fast a leakage current on the battery will discharge the battery is an easy calculation. The
time from full to discharge can be calculated by dividing the amp-hour capacity of the battery by the leakage
current. For a 0.75-AHr battery and a 10-μA leakage current (750 mAHr/0.010 mA = 75000 Hours), it would take
75 k hours or 8.8 years to discharge. In reality the self discharge of the cell would be much faster so the 10--μA
leakage would be considered negligible.
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
13.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ24090DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
0 to 125
24090
BQ24090DGQT
ACTIVE
HVSSOP
DGQ
10
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
0 to 125
24090
BQ24091DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24091
BQ24091DGQT
ACTIVE
HVSSOP
DGQ
10
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24091
BQ24092DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24092
BQ24092DGQT
ACTIVE
HVSSOP
DGQ
10
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24092
BQ24093DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24093
BQ24093DGQT
ACTIVE
HVSSOP
DGQ
10
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 150
24093
BQ24095DGQR
ACTIVE
HVSSOP
DGQ
10
2500
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 125
24095
BQ24095DGQT
ACTIVE
HVSSOP
DGQ
10
250
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
0 to 125
24095
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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